Ricardo S. Ferreira

65 papers A 2B 5C 8Misc 1Journal 17Unranked 32

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A Survey on Edge-Aware Graph Learning Methods. IEEE Trans. Netw. Sci. Eng. Wagner A. Junior, Fabio Ramos, Alex Borges Vieira, José Augusto Miranda Nacif, Ricardo S. Ferreira
2025	—	`conf`	A Comprehensive Analysis of Wire Performance in Silicon Dangling Bonds. SBCCI Emanuel V. C. Ruella, João Gabriel O. Bicalho, Ricardo S. Ferreira, Omar P. Vilela Neto, José Augusto Miranda Nacif
2025	—	`conf`	Bridging the Gap: Accelerating Random Forests on FPGAs with High-Bandwidth Memory. LASCAS Ícaro G. S. Moreira, Lucas Bragança, Olavo A. B. Silva, Alysson K. C. Silva, Ricardo S. Ferreira, José Augusto Miranda Nacif
2025	—	`conf`	Cloud4AuRoRA: an Open and Interactive Framework for UAV Simulation and Control. ICAR Leonardo Fagundes-Junior, Gaia A. Jeremias, Ricardo S. Ferreira, Alexandre Santos Brandão
2025	—	`conf`	Development of More Robust and Stable Logic Gates Using Novel Parameter Values for SiDB. LASCAS Emanuel V. C. Ruella, Ricardo S. Ferreira, Omar P. Vilela Neto, José Augusto Miranda Nacif
2025	—	`conf`	Flexible Wrapper for Ensemble Machine Learning Trees Targeting High-Performance HBM-FPGAs. SBESC Ícaro G. S. Moreira, Olavo A. B. Silva, Lucas Bragança, Racyus D. G. Pacífico, Ricardo S. Ferreira, José Augusto Miranda Nacif
2025	—	`conf`	Network Collapsing Placement and Routing for Field-Coupled Nanocomputing. LASCAS Ruan Evangelista Formigoni, Ricardo S. Ferreira, Omar P. Vilela Neto, José Augusto Miranda Nacif
2025	—	`conf`	Optimising Embedded Neural Network Inference in Smart Traps for Fruit Pest Detection via Quantization-Aware Training and FPGA Acceleration. SBESC Lucas C. Freitas, Isadora V. Dias, Victor R. S. Santos, Ricardo S. Ferreira, Júlio C. B. de Mattos, Lisane B. de Brisolara
2025	J	`jnl`	Reconfigurable Domain-Specific Architectures Based on Coarse-Grained Operators in High-Performance FPGAs. Concurr. Comput. Pract. Exp. Lucas Bragança da Silva, César Grandis, Jeronimo Penha, José Augusto Miranda Nacif, Ricardo S. Ferreira
2025	A	`conf`	SmartMap: Architecture-Agnostic CGRA Mapping Using Graph Traversal and Reinforcement Learning. DATE Fabio T. Ramos, Pedro E. F. Realino, Wagner A. Junior, Alex Borges Vieira, Ricardo S. Ferreira, José Augusto Miranda Nacif
2025	J	`jnl`	Unblocking Placement and Routing in Rearrangeable Multi-Stage Networks. Concurr. Comput. Pract. Exp. Caio Von Rondow Morais, Jeronimo Penha, José Augusto Miranda Nacif, Ricardo S. Ferreira
2025	—	`conf`	Work-in-Progress: RISC-V-Dilemma-1: A Hardware Trojan Benchmark Based on Seeker's Dilemma Approach. SAT-CPS@CODASPY Peter Jamieson, Suman Bhunia, Jerry Chen, Chris Lallo, Blake Rile, Ricardo S. Ferreira, Guilherme A. S. Wilke, José A. M. Nacif, Ahmad Patooghy, Abdel-Hameed A. Badawy
2024	—	`conf`	A Nanomagnetic Logic based processor. SBCCI Luís Fernando Miki, Laysson Oliveira Luz, José Augusto Miranda Nacif, Ricardo S. Ferreira, Omar P. Vilela Neto
2024	J	`jnl`	AIoT tool integration for enriching teaching resources and monitoring student engagement. Internet Things Ricardo S. Ferreira, Carlos Sabino, Michael Canesche, Omar Paranaiba Vilela Neto, José Augusto Miranda Nacif
2024	J	`jnl`	Examples and tutorials on using Google Colab and Gradio to create online interactive student-learning modules. Comput. Appl. Eng. Educ. Ricardo S. Ferreira, Michael Canesche, Peter Jamieson, Omar P. Vilela Neto, José A. M. Nacif
2024	J	`jnl`	Machine Learning for Unmanned Aerial Vehicles Navigation: An Overview. SN Comput. Sci. Leonardo Fagundes-Junior, Kevin Braathen de Carvalho, Ricardo S. Ferreira, Alexandre Santos Brandão
2024	—	`conf`	Robustness Analysis of Atomic Silicon Quantum Dot Logic Gates. SBCCI Arthur M. Fortini, João Gabriel O. Bicalho, Omar P. Vilela Neto, Maria D. Vieira, José Augusto Miranda Nacif, Ricardo S. Ferreira
2023	—	`conf`	A Non-Blocking Multistage Interconnection using Regular Clock Schemes for QCA Circuits. SBCCI Stefan T. Couperus Leal, Michael Canesche, Omar P. Vilela Neto, Ricardo S. Ferreira, José A. M. Nacif
2023	—	`conf`	Exploring Nanomagnetic Logic with Bennett Clocking. SBCCI Pedro Arthur R. L. Silva, Jeferson F. Chaves, José Augusto Miranda Nacif, Ricardo S. Ferreira, Omar Paranaiba Vilela Neto
2023	J	`jnl`	Fast flow cloud: A stream dataflow framework for cloud FPGA accelerator overlays at runtime. Concurr. Comput. Pract. Exp. Lucas Bragança, Michael Canesche, Jeronimo Costa Penha, Josué Campos, José Augusto Miranda Nacif, Ricardo S. Ferreira
2023	J	`jnl`	Gene regulatory accelerators on cloud FPGA. Concurr. Comput. Pract. Exp. Jeronimo Costa Penha, Lucas Bragança, Michael Canesche, Dener Ribeiro, José Augusto Miranda Nacif, Ricardo S. Ferreira
2023	J	`jnl`	Heterogeneous reconfigurable architectures for machine learning dataflows. Concurr. Comput. Pract. Exp. Westerley Carvalho, Michael Canesche, Lucas Reis, José Augusto Miranda Nacif, Ricardo S. Ferreira
2023	J	`jnl`	High-performance graphics processing unit-based strategy for tuning a unmanned aerial vehicle controller subject to time-delay constraints. Concurr. Comput. Pract. Exp. Leonardo Fagundes-Junior, Michael Canesche, Ricardo S. Ferreira, Alexandre Santos Brandão
2023	—	`conf`	L-BANCS: A Multi-Phase Tile Design for Nanomagnetic Logic. ISVLSI Ruan Evangelista Formigoni, Ricardo S. Ferreira, Omar P. Vilela Neto, José Augusto Miranda Nacif
2023	—	`conf`	RDSF: Everything at Same Place All at Once - A Random Decision Single Forest. SBESC Olavo A. B. Silva, Alysson K. C. Silva, Ícaro G. S. Moreira, José A. M. Nacif, Ricardo S. Ferreira
2022	B	`conf`	A polynomial time exact solution to the bit-aware register binding problem. CC Michael Canesche, Ricardo S. Ferreira, José Augusto Miranda Nacif, Fernando Magno Quintão Pereira
2022	—	`conf`	An NML in-plane Wire Crossing Structure. LASCAS Laysson Oliveira Luz, José Augusto Miranda Nacif, Ricardo S. Ferreira, Omar P. Vilela Neto
2022	J	`jnl`	Three-Input NPN Class Gate Library for Atomic Silicon Quantum Dots. IEEE Des. Test Maria D. Vieira, Samuel S. H. Ng, Marcel Walter, Robert Wille, Konrad Walus, Ricardo S. Ferreira, Omar P. Vilela Neto, José Augusto Miranda Nacif
2021	—	`conf`	An Open Source Custom K-means Generator for AWS Cloud FPGA Accelerators. SBESC Lucas Bragança, Michael Canesche, Jeronimo Costa Penha, Westerley Carvalho, Giovanni Comarela, José Augusto Miranda Nacif, Ricardo S. Ferreira
2021	—	`conf`	Analyzing a Low-bit rate Audio Codec - Codec2 - on an FPGA. CSCI Peter Jamieson, Santhiya Sampath Kumar, José Augusto Miranda Nacif, Ricardo S. Ferreira
2021	C	`conf`	Google Colab CAD4U: Hands-On Cloud Laboratories for Digital Design. ISCAS Michael Canesche, Lucas Bragança, Omar Paranaiba Vilela Neto, José Augusto Miranda Nacif, Ricardo S. Ferreira
2021	C	`conf`	Is It Time to Include High-Level Synthesis Design in Digital System Education for Undergraduate Computer Engineers? ISCAS Isaac Nelson, Ricardo S. Ferreira, José Augusto Miranda Nacif, Peter Jamieson
2021	C	`conf`	NMLib: A Nanomagnetic Logic Standard Cell Library. ISCAS Laysson Oliveira Luz, José Augusto Miranda Nacif, Ricardo S. Ferreira, Omar P. Vilela Neto
2021	C	`conf`	Personalizing Online Computer Engineering Resources and Labs for Digital, Embedded, and Computer System Courses. FIE Peter Jamieson, Ricardo S. Ferreira, José Augusto Miranda Nacif
2021	C	`conf`	RESHAPE: A Run-Time Dataflow Hardware-Based Mapping for CGRA Overlays. ISCAS Maria D. Vieira, Michael Canesche, Lucas Bragança, Josué Campos, Mateus Silva, Ricardo S. Ferreira, José Augusto Miranda Nacif
2021	J	`jnl`	TRAVERSAL: A Fast and Adaptive Graph-Based Placement and Routing for CGRAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Michael Canesche, Marcelo de Matos Menezes, Westerley Carvalho, Frank Sill Torres, Peter Jamieson, José Augusto Miranda Nacif, Ricardo S. Ferreira
2020	—	`conf`	A Design Exploration of Scalable Mesh-based Fully Pipelined Accelerators. FPT Westerley Carvalho, Michael Canesche, Lucas Reis, Frank Sill Torres, Lucas B. da Silva, Peter Jamieson, José Augusto Miranda Nacif, Ricardo S. Ferreira
2020	—	`conf`	GA-lapagos, an open-source c framework including a python-based system for data analysis. GECCO Companion Peter Jamieson, Ricardo S. Ferreira, José Augusto Miranda Nacif
2020	C	`conf`	Mind the Gap: Bridging Verilog and Computer Architecture. ISCAS Fernando Passe, Michael Canesche, Omar Paranaiba Vilela Neto, José Augusto Miranda Nacif, Ricardo S. Ferreira
2019	J	`jnl`	A Dynamic Reconfigurable Super-VLIW Architecture for a Fault Tolerant Nanoscale Design. Trans. High Perform. Embed. Archit. Compil. Ricardo S. Ferreira, Cristoferson Bueno, Marcone Laure, Monica Magalhães Pereira, Luigi Carro
2019	J	`jnl`	READY: A Fine-Grained Multithreading Overlay Framework for Modern CPU-FPGA Dataflow Applications. ACM Trans. Embed. Comput. Syst. Lucas Bragança da Silva, Ricardo S. Ferreira, Michael Canesche, Marcelo de Matos Menezes, Maria D. Vieira, Jeronimo Costa Penha, Peter Jamieson, José Augusto Miranda Nacif
2019	—	`conf`	Ropper: a placement and routing framework for field-coupled nanotechnologies. SBCCI Ruan Evangelista Formigoni, Ricardo S. Ferreira, José Augusto Miranda Nacif
2018	C	`conf`	A Novel Five-input Multiple-function QCA Threshold Gate. ISCAS Pedro Arthur R. L. Silva, Juliana Rezende S. B. Alves, Ricardo S. Ferreira, Omar P. Vilela Neto, José Augusto Miranda Nacif
2017	—	`conf`	Designing a collision detection accelerator on a heterogeneous CPU-FPGA platform. ReConFig Fredy Augusto M. Alves, Peter Jamieson, Lucas B. da Silva, Ricardo S. Ferreira, José Augusto Miranda Nacif
2016	J	`jnl`	A Dynamic Modulo Scheduling with Binary Translation: Loop optimization with software compatibility. J. Signal Process. Syst. Ricardo S. Ferreira, Waldir Denver, Monica Magalhães Pereira, Stephan Wong, Carlos Arthur Lang Lisbôa, Luigi Carro
2016	—	`conf`	A Placement and routing algorithm for Quantum-dot Cellular Automata. SBCCI Alyson Trindade, Ricardo S. Ferreira, José Augusto Miranda Nacif, Douglas Sales, Omar P. Vilela Neto
2015	J	`jnl`	A Runtime FPGA Placement and Routing Using Low-Complexity Graph Traversal. ACM Trans. Reconfigurable Technol. Syst. Ricardo S. Ferreira, Luciana Rocha, André G. Santos, José Augusto Miranda Nacif, Stephan Wong, Luigi Carro
2015	C	`conf`	Be a simulator developer and go beyond in computing engineering. FIE Ricardo S. Ferreira, José Augusto Miranda Nacif, Salles V. G. Magalhães, Thales T. de Almeida, Racyus D. G. Pacífico
2015	—	`conf`	Increasing Observability in Post-Silicon Debug Using Asymmetric Omega Networks. SBCCI André B. M. Gomes, Fredy A. M. Alves, Ricardo S. Ferreira, José Augusto Miranda Nacif
2015	—	`conf`	Vericonn: a tool to generate efficient interconnection networks for post-silicon debug. LATS André B. M. Gomes, Fredy A. M. Alves, Ricardo S. Ferreira, José Augusto Miranda Nacif
2014	—	`conf`	A run-time modulo scheduling by using a binary translation mechanism. ICSAMOS Ricardo S. Ferreira, Waldir Denver, Monica Magalhães Pereira, Jorge Quadros, Luigi Carro, Stephan Wong
2013	—	`conf`	A just-in-time modulo scheduling for virtual coarse-grained reconfigurable architectures. ICSAMOS Ricardo S. Ferreira, Vinicius Duarte, Waldir Meireles, Monica Magalhães Pereira, Luigi Carro, Stephan Wong
2013	B	`conf`	A run-time graph-based Polynomial Placement and routing algorithm for virtual FPGAS. FPL Ricardo S. Ferreira, Luciana Rocha, André G. Santos, José Augusto Miranda Nacif, Stephan Wong, Luigi Carro
2012	—	`conf`	Problem Oriented Approach to Hardware-Assisted Algorithm Design in C: A Case Study for Scheduling, Placement and Routing. WSCAD-SSC Lucas Mucida, Vincius Lopes, Waldir Meireles, Ricardo S. Ferreira
2011	Misc	`conf`	An FPGA-based heterogeneous coarse-grained dynamically reconfigurable architecture. CASES Ricardo S. Ferreira, Julio C. Goldner Vendramini, Lucas Mucida, Monica Magalhães Pereira, Luigi Carro
2011	J	`jnl`	Fast placement and routing by extending coarse-grained reconfigurable arrays with Omega Networks. J. Syst. Archit. Ricardo S. Ferreira, João M. P. Cardoso, Alex Damiany, Julio C. Goldner Vendramini, Tiago Teixeira
2010	B	`conf`	FPGA-accelerated Attractor Computation of Scale Free Gene Regulatory Networks. FPL Ricardo S. Ferreira, Julio C. Goldner Vendramini
2009	A	`conf`	A low cost and adaptable routing network for reconfigurable systems. IPDPS Ricardo S. Ferreira, Marcone Laure, Antonio Carlos Schneider Beck, Thiago Lo, Mateus B. Rutzig, Luigi Carro
2009	—	`conf`	On Simplifying Placement and Routing by Extending Coarse-Grained Reconfigurable Arrays with Omega Networks. ARC Ricardo S. Ferreira, Alex Damiany, Julio C. Goldner Vendramini, Tiago Teixeira, João M. P. Cardoso
2008	B	`conf`	Reducing interconnection cost in coarse-grained dynamic computing through multistage network. FPL Ricardo S. Ferreira, Marcone Laure, Mateus B. Rutzig, Antonio Carlos Schneider Beck, Luigi Carro
2007	—	`conf`	A Polynomial Placement Algorithm for Data Driven Coarse-Grained Reconfigurable Architectures. ISVLSI Ricardo S. Ferreira, Alisson Garcia, Tiago Teixeira, João M. P. Cardoso
2006	—	`conf`	Mesh Mapping Exploration for Coarse-Grained Reconfigurable Array Architectures. ReConFig Marcos Vinícius da Silva, Ricardo S. Ferreira, Alisson Garcia, João M. P. Cardoso
2005	—	`conf`	A Java Framework to Teach Computer Architecture. EDUTECH Ricardo S. Ferreira, Antonio Carlos Schneider Beck, Luigi Carro, Andre Toledo, Aroldo Silva
2005	—	`conf`	Data-Driven Regular Reconfigurable Arrays: Design Space Exploration and Mapping. SAMOS Ricardo S. Ferreira, João M. P. Cardoso, Andre Toledo, Horácio C. Neto
2004	B	`conf`	An Environment for Exploring Data-Driven Architectures. FPL Ricardo S. Ferreira, João M. P. Cardoso, Horácio C. Neto