Ricardo Reis - RankMe

261 papers A* 2A 4B 1C 36Misc 1Journal 33Unranked 167

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	A New Error Detector and Corrector Based on the Chaos of Boolean Sequences. LASCAS Elias Ramos, Augusto Weber, Fernando Pedrazzi Pozzer, Ewerton Santos, Mateus B. Rutzig, João Baptista dos Santos Martins, Ricardo Reis
2025	—	`conf`	A Deterministic Model for Random Telegraph Noise. LASCAS Elias Ramos, Wilian Padilha, Augusto Weber, Fredy Morales, João B. Martins, Ricardo Reis
2025	—	`conf`	A New Metric for Estimating the Effects of Process Variability and Applications in Radiation-Tolerant Digital Circuits. NewCAS Elias Ramos, Augusto Weber, Wilian Padilha, João B. Martins, Ricardo Reis
2025	C	`conf`	Correlation Between Process Variability and Radiation Hardness in Digital Circuits. VLSI-SoC Elias Ramos, Augusto Weber, Wilian Padilha, Renan Carlos Gomes de Farias, João Baptista dos Santos Martins, Ricardo Reis
2025	C	`conf`	Hybrid Lightweight Soft Error Mitigation Techniques for Edge Devices. VLSI-SoC Jonas Gava, Ricardo Reis, Luciano Ost
2025	—	`conf`	Impact of Circuit-Level Radiation-Hardening Techniques in Adders on a RISC-V Design. SBCCI Marina Longo Dias, Paulo F. Butzen, Ricardo Reis, Cristina Meinhardt
2025	—	`conf`	Transistor Placement Routability Prediction for Standard Cell Design. SBCCI Vitor H. Fuerstenau, Felipe T. Bortolon, Marcos Backes, Eduardo Barbian, Ricardo Reis
2025	C	`conf`	Transistor Placement for Automatic Cell Layout Generation on Advanced Nodes: A Review. VLSI-SoC Vitor H. Fuerstenau, Ricardo Reis
2024	—	`conf`	Comparing the Effects of Process Variability in FinFETs and CNFETs. LASCAS Elias de Almeida Ramos, Ricardo Reis
2024	—	`conf`	Energy-Efficient Design of Approximate VVC Interpolation Filters Units. ISVLSI Rafael da Silva, Mateus Grellert, Ricardo Reis
2024	C	`conf`	NEATRouter: A New Method for 2D Global Routing. VLSI-SoC Luis Enrique Murillo Vizcardo, Ricardo Reis
2024	—	`conf`	Soft Error Assessment of UAV Control Algorithms Running in Resource-Constrained Microprocessors. ISVLSI Alex Hanneman, Jonas Gava, Paulo Vancin, Aqsa Kk Kaim-Khani, Sam Amiri, Rafael Garibotti, Fernando Moraes, Ney Calazans, Ricardo Reis, Luciano Ost
2023	—	`conf`	A MCU-robust Interleaved Data/Detection SRAM for Space Environments. ISVLSI Leonardo Heitich Brendler, Hervé Lapuyade, Yann Deval, Ricardo Reis, François Rivet
2023	J	`jnl`	A Proof-of-Concept of a Multiple-Cell Upsets Detection Method for SRAMs in Space Applications. IEEE Trans. Circuits Syst. I Regul. Pap. Leonardo Heitich Brendler, Hervé Lapuyade, Yann Deval, Frédéric Darracq, Frédéric Fauquet, Ricardo Reis, François Rivet
2023	—	`conf`	A Tool for Automatic Radiation-Hardened SRAM Layout Generation. ICECS Leonardo Heitich Brendler, Hervé Lapuyade, Yann Deval, Ricardo Reis, François Rivet
2023	—	`conf`	An Energy-Efficient Interpolation Unit Targeting VVC Encoders with Approximate Adder. SBCCI Rafael da Silva, Mateus Grellert, Ricardo Reis
2023	—	`conf`	DeBaTE-FI: A Debugger-Based Fault Injector Infrastructure for IoT Soft Error Reliability Assessment. WF-IoT Alex Hanneman, Jonas Gava, Vitor V. Bandeira, Rafael Garibotti, Ricardo Reis, Luciano Ost
2023	C	`conf`	Impact on Radiation Robustness of Gate Mapping in FinFET Circuits under Work-function Fluctuation. ISCAS Bernardo Borges Sandoval, Leonardo Heitich Brendler, Fernanda Lima Kastensmidt, Ricardo Reis, Alexandra L. Zimpeck, Rafael B. Schvittz, Cristina Meinhardt
2023	—	`conf`	LEX - A Cell Switching Arcs Extractor: A Simple SPICE-Input Interface for Electrical Characterization. ISVLSI Rodrigo N. Wuerdig, Vitor Hugo F. Maciel, Ricardo Reis, Sergio Bampi
2023	—	`conf`	Power, Performance and Reliability Evaluation of Multi-thread Machine Learning Inference Models Executing in Multicore Edge Devices. ISVLSI Geancarlo Abich, Anderson Ignacio da Silva, José Eduardo Thums, Rafael da Silva, Altamiro Amadeu Susin, Ricardo Reis, Luciano Ost
2023	—	`conf`	Using Lyapunov Exponents and Entropy to Estimate Sensitivity to Process Variability. ISVLSI Elias de Almeida Ramos, Ricardo Reis
2023	—	`conf`	Using Lyapunov Exponents to Estimate Sensitivity to Process Variability. LASCAS Elias de Almeida Ramos, Ricardo Reis
2022	J	`jnl`	Exploring XOR-based Full Adders and decoupling cells to variability mitigation at FinFET technology. Integr. Fábio G. R. G. da Silva, Rafael N. M. Oliveira, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Reis
2022	—	`conf`	Impact of Thread Parallelism on the Soft Error Reliability of Convolution Neural Networks. LASCAS Geancarlo Abich, Rafael Garibotti, Jonas Gava, Ricardo Reis, Luciano Ost
2022	—	`conf`	Improving Soft Error Robustness of Full Adder Circuits with Decoupling Cell and Transistor Sizing. SBCCI Rafael N. M. Oliveira, Fábio G. R. G. da Silva, Ricardo Reis, Rafael B. Schvittz, Cristina Meinhardt
2022	C	`conf`	Investigation of Hybrid Soft Error Mitigation Techniques for Applications running on Resource-constrained devices. VLSI-SoC Jonas Gava, Ricardo Reis, Luciano Ost
2022	C	`conf`	Research Experience as a Way to Improve Retention and Graduation Rates. ISCAS Ricardo Reis
2022	J	`jnl`	SOFIA: An automated framework for early soft error assessment, identification, and mitigation. J. Syst. Archit. Jonas Gava, Vitor V. Bandeira, Felipe Rosa, Rafael Garibotti, Ricardo Reis, Luciano Ost
2022	—	`conf`	Soft Error Assessment of CNN Inference Models Running on a RISC-V Processor. ICECS 2022 Jonas Gava, Guilherme Dorneles, Ricardo Reis, Rafael Garibotti, Luciano Ost
2022	J	`jnl`	The Impact of Soft Errors in Memory Units of Edge Devices Executing Convolutional Neural Networks. IEEE Trans. Circuits Syst. II Express Briefs Geancarlo Abich, Rafael Garibotti, Ricardo Reis, Luciano Ost
2022	—	`ed.`	VLSI-SoC: Technology Advancement on SoC Design - 29th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2021, Singapore, October 4-8, 2021, Revised and Extended Selected Papers VLSI-SoC (Selected Papers) Victor Grimblatt, Chip-Hong Chang, Ricardo Reis, Anupam Chattopadhyay, Andrea Calimera
2021	J	`jnl`	An Extensive Soft Error Reliability Analysis of a Real Autonomous Vehicle Software Stack. IEEE Trans. Circuits Syst. II Express Briefs Vitor V. Bandeira, Isadora Oliveira, Felipe Rosa, Ricardo Reis, Luciano Ost
2021	J	`jnl`	Applying Lightweight Soft Error Mitigation Techniques to Embedded Mixed Precision Deep Neural Networks. IEEE Trans. Circuits Syst. I Regul. Pap. Geancarlo Abich, Jonas Gava, Rafael Garibotti, Ricardo Reis, Luciano Ost
2021	—	`conf`	Benchmarking Open Access VLSI Partitioning Tools. LASCAS Isadora Oliveira, Marcelo Danigno, Paulo F. Butzen, Ricardo Reis
2021	—	`conf`	Current Behavior on Process Variability Aware FinFET Inverter Designs. LASCAS Leonardo B. Moraes, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Reis
2021	J	`jnl`	Evaluation of the soft error assessment consistency of a JIT-based virtual platform simulator. IET Comput. Digit. Tech. Geancarlo Abich, Rafael Garibotti, Vitor V. Bandeira, Felipe da Rosa, Jonas Gava, Felipe T. Bortolon, Guilherme Medeiros, Fernando Moraes, Ricardo Reis, Luciano Ost
2021	—	`conf`	Exploring Gate Mapping and Transistor Sizing to Improve Radiation Robustness: A C17 Benchmark Case-study. LATS Bernardo Borges Sandoval, Leonardo Heitich Brendler, Alexandra L. Zimpeck, Fernanda Lima Kastensmidt, Ricardo Reis, Cristina Meinhardt
2021	C	`conf`	Exploring a New Tool for Automatic Layout Synthesis for FDSOI 28 nm. VLSI-SoC Vitor Hugo F. Maciel, Germano Girondi, Elias de Almeida Ramos, Ricardo Reis
2021	—	`conf`	SET Mitigation Techniques on Mirror Full Adder at 7 nm FinFET Technology. LATS Rafael N. M. Oliveira, Fábio G. R. G. da Silva, Ricardo Reis, Cristina Meinhardt
2021	—	`conf`	The Impact of Precision Bitwidth on the Soft Error Reliability of the MobileNet Network. LASCAS Geancarlo Abich, Ricardo Reis, Luciano Ost
2021	—	`ed.`	VLSI-SoC: Design Trends - 28th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2020, Salt Lake City, UT, USA, October 6-9, 2020, Revised and Extended Selected Papers VLSI-SoC (Selected Papers) Andrea Calimera, Pierre-Emmanuel Gaillardon, Kunal Korgaonkar, Shahar Kvatinsky, Ricardo Reis
2020	A	`conf`	Contributions to OpenROAD from Abroad: Experiences and Learnings : Invited Paper. ICCAD Mateus Fogaça, Eder Monteiro, Marcelo Danigno, Isadora Oliveira, Paulo F. Butzen, Ricardo Reis
2020	—	`conf`	Mirror Full Adder SET Susceptibility on 7nm FinFET Technology. ICECS Rafael N. M. Oliveira, Fábio G. R. G. da Silva, Ricardo Reis, Cristina Meinhardt
2020	—	`conf`	Mitigation Effects of Decoupling Cells on Full Adders Process Variability. MWSCAS Fabio G. Rossato G. da Silva, Cristina Meinhardt, Ricardo Reis
2020	J	`jnl`	On the superiority of modularity-based clustering for determining placement-relevant clusters. Integr. Mateus Fogaça, Andrew B. Kahng, Eder Monteiro, Ricardo Reis, Lutong Wang, Mingyu Woo
2020	C	`conf`	Pros and Cons of ST and SIG FinFET Inverters for Low Power Designs. ISCAS Leonardo B. Moraes, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Reis
2020	—	`conf`	RAT: A Lightweight Architecture Independent System-Level Soft Error Mitigation Technique. VLSI-SoC (Selected Papers) Jonas Gava, Ricardo Reis, Luciano Ost
2020	—	`conf`	Soft Error Reliability Assessment of Neural Networks on Resource-constrained IoT Devices. ICECS Geancarlo Abich, Jonas Gava, Ricardo Reis, Luciano Ost
2020	—	`book`	Soft Error Reliability Using Virtual Platforms - Early Evaluation of Multicore Systems Felipe Rocha da Rosa, Luciano Ost, Ricardo Reis
2020	—	`ed.`	VLSI-SoC: New Technology Enabler - 27th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2019, Cusco, Peru, October 6-9, 2019, Revised and Extended Selected Papers VLSI-SoC (Selected Papers) Carolina Metzler, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Carlos Silva Cárdenas, Ricardo Reis
2019	J	`jnl`	A New Nonlinear Global Placement for FPGAs: The Chaotic Place. IEEE Trans. Circuits Syst. I Regul. Pap. Elias de Almeida Ramos, Guilherme Bontorin, Ricardo Reis
2019	—	`conf`	Challenges in the Design of Integrated Systems for IoT. IFIPIoT Ricardo Reis
2019	—	`conf`	Clip Clustering for Early Lithographic Hotspot Classification. LASCAS Andre Saldanha Oliveira, Julia Casarin Puget, Carolina Metzler, Ricardo Reis
2019	—	`conf`	Efficient Soft Error Vulnerability Analysis Using Non-intrusive Fault Injection Techniques. VLSI-SoC (Selected Papers) Vitor V. Bandeira, Felipe Rosa, Ricardo Reis, Luciano Ost
2019	—	`conf`	Evaluation of Compilers Effects on OpenMP Soft Error Resiliency. ISVLSI Jonas Gava, Vitor V. Bandeira, Ricardo Reis, Luciano Ost
2019	J	`jnl`	Exploiting memory allocations in clusterised many-core architectures. IET Comput. Digit. Tech. Rafael Garibotti, Luciano Ost, Anastasiia Butko, Ricardo Reis, Abdoulaye Gamatié, Gilles Sassatelli
2019	—	`conf`	Finding placement-relevant clusters with fast modularity-based clustering. ASP-DAC Mateus Fogaça, Andrew B. Kahng, Ricardo Reis, Lutong Wang
2019	—	`conf`	Process Variability Challenges for Radiation Mitigation Techniques on 16nm. LASCAS Samuel Presa Toledo, Ricardo Reis, Cristina Meinhardt
2019	—	`conf`	Process Variability Impact on the SET Response of FinFET Multi-level Design. VLSI-SoC (Selected Papers) Leonardo Heitich Brendler, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Reis
2019	—	`conf`	Tackling the Drawbacks of a Lagrangian Relaxation Based Discrete Gate Sizing Algorithm. ISVLSI Henrique Placido, Ricardo Reis
2019	J	`jnl`	Using Machine Learning Techniques to Evaluate Multicore Soft Error Reliability. IEEE Trans. Circuits Syst. I Regul. Pap. Felipe Rocha da Rosa, Rafael Garibotti, Luciano Ost, Ricardo Reis
2019	—	`ed.`	VLSI-SoC: Design and Engineering of Electronics Systems Based on New Computing Paradigms - 26th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2018, Verona, Italy, October 8-10, 2018, Revised and Extended Selected Papers VLSI-SoC (Selected Papers) Nicola Bombieri, Graziano Pravadelli, Masahiro Fujita, Todd M. Austin, Ricardo Reis
2019	—	`ed.`	VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things - 25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23-25, 2017, Revised and Extended Selected Papers VLSI-SoC (Selected Papers) Michail Maniatakos, Ibrahim Abe M. Elfadel, Matteo Sonza Reorda, H. Fatih Ugurdag, José Monteiro, Ricardo Reis
2018	—	`conf`	A Design Patterns-Based Middleware for Multiprocessor Systems-on-Chip. SBCCI Jean Carlo Hamerski, Geancarlo Abich, Ricardo Reis, Luciano Ost, Alexandre M. Amory
2018	—	`conf`	A nonlinear placement for FPGAs: The chaotic place. LASCAS Elias de Almeida Ramos, Guilherme Bontorin, Ricardo Reis
2018	—	`conf`	An automated methodology to fix electromigration violations on a customized design flow. LASCAS Lucas de Paris, Ricardo Reis
2018	C	`conf`	Evaluating the Impact of Process Variability and Radiation Effects on Different Transistor Arrangements. VLSI-SoC Leonardo Heitich Brendler, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Reis
2018	—	`conf`	Evaluation of Compiler Optimization Flags Effects on Soft Error Resiliency. SBCCI Guilherme E. Medeiros, Felipe T. Bortolon, Ricardo Reis, Luciano Ost
2018	—	`conf`	Exploring Multi-level Design to Mitigate Variability and Radiation Effects on 7nm FinFET Logic Cells. ICECS Leonardo Heitich Brendler, Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Reis
2018	C	`conf`	Exploring the Impact of Soft Errors on NoC-based Multiprocessor Systems. ISCAS Felipe T. Bortolon, Geancarlo Abich, Sergio Bampi, Ricardo Reis, Fernando Moraes, Luciano Ost
2018	A*	`conf`	Extensive evaluation of programming models and ISAs impact on multicore soft error reliability. DAC Felipe da Rosa, Vitor V. Bandeira, Ricardo Reis, Luciano Ost
2018	—	`conf`	Impact of Near-Threshold and Variability on 7nm FinFET XOR Circuits. ICECS Fabio G. Rossato G. da Silva, Cristina Meinhardt, Ricardo Reis
2018	C	`conf`	Pros and Cons of Schmitt Trigger Inverters to Mitigate PVT Variability on Full Adders. ISCAS Samuel Presa Toledo, Alexandra L. Zimpeck, Ricardo Reis, Cristina Meinhardt
2018	—	`conf`	Reducing the amount of transistors by gate merging. LASCAS Luciana Mendes da Silva, Guilherme Bontorin, Ricardo Reis
2018	—	`conf`	Strategies for Reducing Power Consumption and Increasing Reliability in IoT. IFIPIoT@WCC Ricardo Reis
2018	—	`conf`	gem5-FIM: a flexible and scalable multicore soft error assessment framework to early reliability design space explorations. LASCAS Felipe Rocha da Rosa, Ricardo Reis, Luciano Ost
2017	—	`conf`	A cell clustering technique to reduce transistor count. ICECS Calebe Conceição, Gisell Moura, Filipe Pisoni, Ricardo Reis
2017	—	`conf`	Evaluation of multicore systems soft error reliability using virtual platforms. NEWCAS Felipe Rosa, Luciano Ost, Ricardo Reis, Simon Davidmann, Larry Lapides
2017	—	`conf`	Impact of schmitt trigger inverters on process variability robustness of 1-Bit full adders. ICECS Samuel Presa Toledo, Alexandra L. Zimpeck, Ricardo Reis, Cristina Meinhardt
2017	—	`conf`	Investigating parallel TMR approaches and thread disposability in Linux. ICECS Gennaro Severino Rodrigues, Felipe Rosa, Fernanda Lima Kastensmidt, Ricardo Reis, Luciano Ost
2017	—	`conf`	Process and temperature impact on single-event transients in 28nm FDSOI CMOS. LASCAS Walter E. Calienes Bartra, Andrei Vladimirescu, Ricardo Reis
2017	C	`conf`	Publish-subscribe programming for a NoC-based multiprocessor system-on-chip. ISCAS Jean Carlo Hamerski, Geancarlo Abich, Ricardo Reis, Luciano Ost, Alexandre M. Amory
2017	C	`conf`	Robustness of Sub-22nm multigate devices against physical variability. ISCAS Alexandra L. Zimpeck, Ygor Aguiar, Cristina Meinhardt, Ricardo Reis
2017	—	`conf`	UFRGSPlace: Routability driven FPGA placement algorithm for heterogeneous FPGAs. ICECS Julia Casarin Puget, Andre Saldanha Oliveira, Jorge Seelen, Ricardo Reis
2017	—	`conf`	VLSI-SoC: An Enduring Tradition. VLSI-SoC (Selected Papers) Ricardo Reis, Manfred Glesner
2017	—	`ed.`	VLSI-SoC: System-on-Chip in the Nanoscale Era - Design, Verification and Reliability - 24th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2016, Tallinn, Estonia, September 26-28, 2016, Revised Selected Papers VLSI-SoC (Selected Papers) Thomas Hollstein, Jaan Raik, Sergei Kostin, Anton Tsertov, Ian O'Connor, Ricardo Reis
2016	—	`conf`	Cell Selection for High-Performance Designs in an Industrial Design Flow. ISPD Tiago J. Reimann, Cliff C. N. Sze, Ricardo Reis
2016	J	`jnl`	Cell-Internal Electromigration: Analysis and Pin Placement Based Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gracieli Posser, Vivek Mishra, Palkesh Jain, Ricardo Reis, Sachin S. Sapatnekar
2016	J	`jnl`	Challenges of cell selection algorithms in industrial high performance microprocessor designs. Integr. Tiago Reimann, Cliff C. N. Sze, Ricardo Reis
2016	C	`conf`	Electromigration aware circuits by using special signal non-default routing rules. ISCAS Lucas de Paris, Gracieli Posser, Ricardo Reis
2016	—	`conf`	Extending FreeRTOS to support dynamic and distributed mapping in multiprocessor systems. ICECS Geancarlo Abich, Marcelo G. Mandelli, Felipe R. Rosa, Fernando Gehm Moraes, Luciano Ost, Ricardo Reis
2016	—	`conf`	Geometric variability impact on 7nm Trigate combinational cells. ICECS Alexandra L. Zimpeck, Ygor Aguiar, Cristina Meinhardt, Ricardo Reis
2016	—	`conf`	Impact of variability effects on FinFET transistors and combinational cells. ICECS Alexandra L. Zimpeck, Ricardo Reis
2016	—	`conf`	Leakage current analysis in static CMOS logic gates for a transistor network design approach. PATMOS Jorge L. Tonfat, Guilherme Flach, Ricardo Reis
2016	—	`conf`	Quadratic timing objectives for incremental timing-driven placement optimization. ICECS Mateus Fogaça, Guilherme Flach, Jucemar Monteiro, Marcelo O. Johann, Ricardo Reis
2016	—	`conf`	Reducing the number of transistors with gate clustering. LASCAS Calebe Conceição, Gracieli Posser, Ricardo Reis
2016	J	`jnl`	Selected Articles from the 6th International Workshop on CMOS Variability, Salvador, Bahia, Brazil, September 1-4, 2015. J. Low Power Electron. Ricardo Reis, Nadine Azémard
2016	—	`ed.`	VLSI-SoC: Design for Reliability, Security, and Low Power - 23rd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2015, Daejeon, Korea, October 5-7, 2015, Revised Selected Papers VLSI-SoC (Selected Papers) Youngsoo Shin, Chi-Ying Tsui, Jae-Joon Kim, Kiyoung Choi, Ricardo Reis
2015	—	`conf`	A fast and scalable fault injection framework to evaluate multi/many-core soft error reliability. DFTS Felipe Rosa, Fernanda Lima Kastensmidt, Ricardo Reis, Luciano Ost
2015	—	`conf`	Analyzing the Impact of Frequency and Diverse Path Delays in the Time Vulnerability Factor of Master-Slave D Flip-Flops. ISVLSI Alexandra L. Zimpeck, Fernanda Lima Kastensmidt, Ricardo Reis
2015	—	`conf`	Bulk and FDSOI Sub-micron CMOS transistors resilience to single-event transients. ICECS Walter E. Calienes Bartra, Andrei Vladimirescu, Ricardo Reis
2015	—	`conf`	Efficient emulation of quantum circuits on classical hardware. LASCAS Calebe Conceição, Ricardo Reis
2015	—	`conf`	Energy efficient frame-level redundancy scrubbing technique for SRAM-based FPGAs. AHS Jorge L. Tonfat, Fernanda Lima Kastensmidt, Ricardo Reis
2015	—	`conf`	Energy-efficient Level Shifter topology. PATMOS Roger Caputo-Llanos, Diego Sousa, Marco Terres, Guilherme Bontorin, Ricardo Reis, Marcelo O. Johann
2015	—	`conf`	Gate sizing and threshold voltage assignment for high performance microprocessor designs. ASP-DAC Tiago Reimann, Cliff C. N. Sze, Ricardo Reis
2015	—	`conf`	Graphite-based heat spreaders for hotspot mitigation in 3D ICs. 3DIC Cristiano Santos, Rafael Prieto, Pascal Vivet, Jean-Philippe Colonna, Perceval Coudrain, Ricardo Reis
2015	—	`conf`	Impact of dynamic voltage scaling and thermal factors on FinFET-based SRAM reliability. ICECS Felipe Rosa, Raphael Martins Brum, Gilson I. Wirth, Luciano Ost, Ricardo Reis
2015	J	`jnl`	Impact of dynamic voltage scaling and thermal factors on SRAM reliability. Microelectron. Reliab. Felipe Rosa, Raphael Martins Brum, Gilson I. Wirth, Fernanda Gusmão de Lima Kastensmidt, Luciano Ost, Ricardo Reis
2015	—	`conf`	Impact on performance, power, area and wirelength using electromigration-aware cells. ICECS Gracieli Posser, Vivek Mishra, Palkesh Jain, Ricardo Reis, Sachin S. Sapatnekar
2015	—	`conf`	Modeling the impact of heavy ion on FDSOI NanoCMOS. LASCAS Walter E. Calienes Bartra, Ricardo Reis, Andrei Vladimirescu
2015	—	`conf`	Multiple fault injection platform for SRAM-based FPGA based on ground-level radiation experiments. LATS Jimmy Tarrillo, Jorge L. Tonfat, Lucas A. Tambara, Fernanda Lima Kastensmidt, Ricardo Reis
2015	—	`conf`	Overhead for independent net approach for Global Routing. LASCAS Diego Tumelero, Guilherme Bontorin, Ricardo Reis
2015	—	`conf`	Process variability in FinFET standard cells with different transistor sizing techniques. ICECS Alexandra L. Zimpeck, Cristina Meinhardt, Gracieli Posser, Ricardo Reis
2015	—	`conf`	Reducing the signal Electromigration effects on different logic gates by cell layout optimization. LASCAS Gracieli Posser, Lucas de Paris, Vivek Mishra, Palkesh Jain, Ricardo Reis, Sachin S. Sapatnekar
2015	—	`conf`	Reusing smaller optimized FFT blocks for the realization of larger power-efficient radix-2 FFTs. PATMOS Sidinei Ghissoni, Eduardo Costa, Ricardo Reis
2015	—	`ed.`	VLSI-SoC: At the Crossroads of Emerging Trends - 21st IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2013, Istanbul, Turkey, October 6-9, 2013, Revised and Extended Selected Papers VLSI-SoC (Selected Papers) Alex Orailoglu, H. Fatih Ugurdag, Luís Miguel Silveira, Martin Margala, Ricardo Reis
2015	—	`ed.`	VLSI-SoC: Internet of Things Foundations - 22nd IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2014, Playa del Carmen, Mexico, October 6-8, 2014, Revised and Extended Selected Papers VLSI-SoC (Selected Papers) Luc Claesen, María Teresa Sanz-Pascual, Ricardo Reis, Arturo Sarmiento-Reyes
2014	—	`conf`	A design flow for physical synthesis of digital cells with ASTRAN. ACM Great Lakes Symposium on VLSI Adriel Ziesemer, Ricardo Reis, Matheus T. Moreira, Michel Evandro Arendt, Ney Laert Vilar Calazans
2014	—	`conf`	A set of Virtual Instruments to simulate radiation effects in CMOS circuits. I2MTC Walter E. Calienes Bartra, Ricardo Reis
2014	A	`conf`	A systematic approach for analyzing and optimizing cell-internal signal electromigration. ICCAD Gracieli Posser, Vivek Mishra, Palkesh Jain, Ricardo Reis, Sachin S. Sapatnekar
2014	—	`conf`	A tool to simulate optical lithography in nanoCMOs. I2MTC Tania Mara Ferla, Guilherme Flach, Ricardo Reis
2014	B	`conf`	Aging and voltage scaling impacts under neutron-induced soft error rate in SRAM-based FPGAs. ETS Fernanda Lima Kastensmidt, Jorge L. Tonfat, Thiago Hanna Both, Paolo Rech, Gilson I. Wirth, Ricardo Reis, Florent Bruguier, Pascal Benoit, Lionel Torres, Christopher Frost
2014	—	`conf`	Automatic layout synthesis with ASTRAN applied to asynchronous cells. LASCAS Adriel Ziesemer, Ricardo Reis, Matheus T. Moreira, Michel Evandro Arendt, Ney Laert Vilar Calazans
2014	—	`conf`	Comparing high-performance cells in CMOS bulk and FinFET technologies. LASCAS Cristina Meinhardt, Ricardo Reis
2014	J	`jnl`	Effective Method for Simultaneous Gate Sizing and $V$ th Assignment Using Lagrangian Relaxation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Guilherme Flach, Tiago Reimann, Gracieli Posser, Marcelo O. Johann, Ricardo Reis
2014	—	`conf`	Evaluating the impact of environment and physical variability on the ION current of 20nm FinFET devices. PATMOS Alexandra L. Zimpeck, Cristina Meinhardt, Ricardo Reis
2014	—	`conf`	Exploring more efficient architectures for Multiple Dynamic Supply Voltage designs. LASCAS Marco Terres, Cristina Meinhardt, Guilherme Bontorin, Ricardo Reis
2014	—	`conf`	Fast energy evaluation of embedded applications for many-core systems. PATMOS Felipe Rosa, Luciano Ost, Thiago Raupp da Rosa, Fernando Gehm Moraes, Ricardo Reis
2014	C	`conf`	Power dissipation effects on 28nm FPGA-based System on Chips neutron sensitivity. VLSI-SoC Giovanni Bruni, Paolo Rech, Lucas A. Tambara, Gabriel L. Nazar, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis, Alessandro Paccagnella
2014	—	`conf`	Soft error rate in SRAM-based FPGAs under neutron-induced and TID effects. LATW Lucas A. Tambara, Jorge L. Tonfat, Ricardo Reis, Fernanda Lima Kastensmidt, Evaldo Carlos Fonseca Pereira, Rafael Galhardo Vaz, Odair Lelis Goncalez
2014	—	`conf`	Using TSVs for thermal mitigation in 3D circuits: Wish and truth. 3DIC Cristiano Santos, Papa Momar Souare, François de Crecy, Perceval Coudrain, Jean-Philippe Colonna, Pascal Vivet, Andras Borbely, Ricardo Reis, M. Haykel Ben Jamaa, Vincent Fiori, Alexis Farcy
2014	J	`jnl`	Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs. Microelectron. Reliab. Fernanda Lima Kastensmidt, Jorge L. Tonfat, Thiago Hanna Both, Paolo Rech, Gilson I. Wirth, Ricardo Reis, Florent Bruguier, Pascal Benoit, Lionel Torres, Christopher Frost
2013	—	`conf`	A novel approach to reduce power consumption in level shifter for Multiple Dynamic Supply Voltage. ICECS Marco Terres, Cristina Meinhardt, Guilherme Bontorin, Ricardo Reis
2013	—	`conf`	A yield-driven regular layout synthesis. ISVLSI Cristina Meinhardt, Ricardo Reis
2013	—	`conf`	Combining fault tolerance and serialization effort to improve yield in 3D Networks-on-Chip. ICECS Anelise Kologeski, Caroline Concatto, Debora Matos, Daniel Grehs, Tiago Motta, Felipe Almeida, Fernanda Lima Kastensmidt, Altamiro Amadeu Susin, Ricardo Reis
2013	—	`conf`	FinFET basic cells evaluation for regular layouts. LASCAS Cristina Meinhardt, Ricardo Reis
2013	C	`conf`	GR-PA: A cost pre-allocation model for global routing. VLSI-SoC Leandro Nunes, Tiago Reimann, Ricardo Reis
2013	—	`conf`	Global routing congestion reduction with cost allocation look-ahead. SBCCI Leandro Nunes, Ricardo Reis
2013	—	`conf`	Instruction-driven timing CPU model for efficient embedded software development using OVP. ICECS Felipe Rosa, Luciano Ost, Ricardo Reis, Gilles Sassatelli
2013	—	`conf`	Message from the general and program chairs. ISVLSI Fernanda Lima Kastensmidt, Ricardo Reis, Leandro Soares Indrusiak, Gilles Sassatelli
2013	J	`jnl`	Revisiting automated physical synthesis of high-performance clock networks. ACM Trans. Design Autom. Electr. Syst. Matthew R. Guthaus, Gustavo Wilke, Ricardo Reis
2013	C	`conf`	Simultaneous gate sizing and Vt assignment using Fanin/Fanout ratio and Simulated Annealing. ISCAS Tiago Reimann, Gracieli Posser, Guilherme Flach, Marcelo O. Johann, Ricardo Reis
2013	—	`conf`	Simultaneous gate sizing and Vth assignment using Lagrangian Relaxation and delay sensitivities. ISVLSI Guilherme Flach, Tiago Reimann, Gracieli Posser, Marcelo O. Johann, Ricardo Reis
2013	—	`conf`	System-level thermal modeling for 3D circuits: Characterization with a 65nm memory-on-logic circuit. 3DIC Cristiano Santos, Pascal Vivet, Denis Dutoit, Philippe Garrault, Nicolas Peltier, Ricardo Reis
2013	—	`conf`	Using electromagnetic emanations for variability characterization in Flash-based FPGAs. ISVLSI Jimmy Tarrillo, Jorge L. Tonfat, Fernanda Lima Kastensmidt, Ricardo Reis, Florent Bruguier, Morgan Bourree, Pascal Benoit, Lionel Torres
2013	—	`ed.`	VLSI-SoC: From Algorithms to Circuits and System-on-Chip Design - 20th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012, Revised Selected Papers VLSI-SoC (Selected Papers) Andreas Burg, Ayse K. Coskun, Matthew R. Guthaus, Srinivas Katkoori, Ricardo Reis
2012	C	`ed.`	20th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2012, Santa Cruz, CA, USA, October 7-10, 2012 VLSI-SoC Srinivas Katkoori, Matthew R. Guthaus, Ayse K. Coskun, Andreas Burg, Ricardo Reis
2012	—	`conf`	Efficient area and power multiplication part of FFT based on twiddle factor decomposition. ICECS Sidinei Ghissoni, Eduardo Costa, José Monteiro, Ricardo Reis
2012	J	`jnl`	High-performance clock mesh optimization. ACM Trans. Design Autom. Electr. Syst. Matthew R. Guthaus, Xuchu Hu, Gustavo Wilke, Guilherme Flach, Ricardo Reis
2012	—	`conf`	Multi-bit flip-flop usage impact on physical synthesis. SBCCI Cristiano Santos, Ricardo Reis, Guilherme Godoi, Marcos Barros, Fabio Duarte
2012	J	`jnl`	Posicionamento de Circuitos 3D Considerando o Planejamento de 3D-Vias. RITA Renato Fernandes Hentschke, Marcelo O. Johann, Ricardo Reis
2012	—	`conf`	SET susceptibility estimation of clock tree networks from layout extraction. LATW Raul Chipana, Fernanda Lima Kastensmidt, Jorge L. Tonfat, Ricardo Reis
2012	—	`conf`	Simulation of SET faults in a voltage controlled oscillator. LATW Walter E. Calienes Bartra, Fernanda Lima Kastensmidt, Ricardo Reis
2012	—	`conf`	Soft-Error Probability Due to SET in Clock Tree Networks. ISVLSI Raul Chipana, Eduardo Chielle, Fernanda Lima Kastensmidt, Jorge L. Tonfat, Ricardo Reis
2012	—	`conf`	Transistor sizing and gate sizing using geometric programming considering delay minimization. NEWCAS Gracieli Posser, Guilherme Flach, Gustavo Wilke, Ricardo Reis
2012	—	`ed.`	VLSI-SoC: Advanced Research for Systems on Chip - 19th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2011, Hong Kong, China, October 3-5, 2011, Revised Selected Papers VLSI-SoC (Selected Papers) Salvador Mir, Chi-Ying Tsui, Ricardo Reis, Oliver C. S. Choy
2012	—	`ed.`	VLSI-SoC: Forward-Looking Trends in IC and Systems Design - 18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers VLSI-SoC (Selected Papers) José L. Ayala, David Atienza Alonso, Ricardo Reis
2011	J	`jnl`	A Low-Cost Solution for Deploying Processor Cores in Harsh Environments. IEEE Trans. Ind. Electron. Massimo Violante, Cristina Meinhardt, Ricardo Reis, Matteo Sonza Reorda
2011	—	`conf`	Combination of constant matrix multiplication and gate-level approaches for area and power efficient hybrid radix-2 DIT FFT realization. ICECS Sidinei Ghissoni, Eduardo Costa, José Monteiro, Ricardo Reis
2011	—	`ch.`	Design Tools and Methods for Chip Physical Design. Multiprocessor System-on-Chip Ricardo Reis
2011	C	`conf`	Design automation of transistor networks, a new challenge. ISCAS Ricardo Reis
2011	—	`conf`	Functional verification of logic modules for a Gigabit Ethernet switch. LATW Jorge L. Tonfat, Gustavo Neuberger, Ricardo Reis
2011	—	`conf`	Gate Sizing Minimizing Delay and Area. ISVLSI Gracieli Posser, Guilherme Flach, Gustavo Wilke, Ricardo Reis
2011	—	`conf`	Power consumption in transistor networks versus in standard cells. ICECS Gerson Scartezzini, Ricardo Reis
2011	—	`conf`	Quadratic placement with single-iteration linear system solver. SBCCI Guilherme Flach, Marcelo O. Johann, Ricardo Reis
2011	C	`ed.`	VLSI-SoC: Technologies for Systems Integration - 17th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2009, Florianópolis, Brazil, October 12-14, 2009, Revised Selected Papers VLSI-SoC Jürgen Becker, Marcelo O. Johann, Ricardo Reis
2010	J	`jnl`	3D-Via Driven Partitioning for 3D VLSI Integrated Circuits. CLEI Electron. J. Sandro Sawicki, Gustavo Wilke, Marcelo O. Johann, Ricardo Reis
2010	—	`conf`	A Mesh-Buffer Displacement Optimization Strategy. ISVLSI Guilherme Flach, Gustavo Wilke, Marcelo O. Johann, Ricardo Reis
2010	J	`jnl`	Asynchronous circuits as alternative for mitigation of long-duration transient faults in deep-submicron technologies. Microelectron. Reliab. Rodrigo Possamai Bastos, Gilles Sicard, Fernanda Lima Kastensmidt, Marc Renaudin, Ricardo Reis
2010	—	`conf`	Design and verification of a layer-2 Ethernet MAC classification engine for a Gigabit Ethernet switch. ICECS Jorge L. Tonfat, Ricardo Reis
2010	C	`conf`	Evaluating transient-fault effects on traditional C-element's implementations. IOLTS Rodrigo Possamai Bastos, Gilles Sicard, Fernanda Lima Kastensmidt, Marc Renaudin, Ricardo Reis
2010	—	`conf`	Logical Core Algorithm: Improving Global Placement. ISVLSI Felipe Pinto, Lucas Cavalheiro, Marcelo O. Johann, Ricardo Reis
2010	Misc	`conf`	Low-sensitivity to process variations aging sensor for automotive safety-critical applications. VTS Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Isabel Maria Cacho Teixeira, Marcelino B. Santos, João Paulo Teixeira
2010	A*	`conf`	Non-uniform clock mesh optimization with linear programming buffer insertion. DAC Matthew R. Guthaus, Gustavo Wilke, Ricardo Reis
2010	C	`conf`	Predictive error detection by on-line aging monitoring. IOLTS Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Jorge Semião, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira
2010	—	`conf`	Radix-2 Decimation in Time (DIT) FFT implementation based on a Matrix-Multiple Constant multiplication approach. ICECS Sidinei Ghissoni, Eduardo Costa, Cristiano Lazzari, José Monteiro, Levent Aksoy, Ricardo Reis
2010	C	`conf`	The Fidelity Property of the Elmore Delay Model in actual comparison of routing algorithms. ICCD Glauco Borges Valim dos Santos, Tiago Reimann, Marcelo O. Johann, Ricardo Reis
2010	—	`ed.`	VLSI-SoC: Design Methodologies for SoC and SiP - 16th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2008, Rhodes Island, Greece, October 13-15, 2008, Revised Selected Papers VLSI-SoC (Selected Papers) Christian Piguet, Ricardo Reis, Dimitrios Soudris
2010	—	`conf`	Variability-aware physical design techniques. LATW Gustavo Wilke, Ricardo Reis
2009	—	`conf`	A cells and I/O pins partitioning refinement algorithm for 3D VLSI circuits. ICECS Sandro Sawicki, Gustavo Wilke, Marcelo O. Johann, Ricardo Reis
2009	A	`conf`	A low-cost SEE mitigation solution for soft-processors embedded in Systems on Pogrammable Chips. DATE Matteo Sonza Reorda, Massimo Violante, Cristina Meinhardt, Ricardo Reis
2009	—	`conf`	An On-board Data-Handling Computer for Deep-Space Exploration Built Using Commercial-Off-the-Shelf SRAM-Based FPGAs. DFT Matteo Sonza Reorda, Massimo Violante, Cristina Meinhardt, Ricardo Reis
2009	—	`conf`	An automated design methodology for layout generation targeting power leakage minimization. ICECS Cristiano Lazzari, Adriel Ziesemer, Ricardo Reis
2009	C	`conf`	Built-in aging monitoring for safety-critical applications. IOLTS Julio César Vázquez, Víctor H. Champac, Adriel Ziesemer, Ricardo Reis, Isabel C. Teixeira, Marcelino B. Santos, João Paulo Teixeira
2009	C	`conf`	Challenges and Emerging Technologies for System Integration beyond the End of the Roadmap of Nano-CMOS. VLSI-SoC Sergio Bampi, Ricardo Reis
2009	C	`conf`	Comparing transient-fault effects on synchronous and on asynchronous circuits. IOLTS Rodrigo Possamai Bastos, Yannick Monnet, Gilles Sicard, Fernanda Lima Kastensmidt, Marc Renaudin, Ricardo Reis
2009	J	`jnl`	Design of a soft-error robust microprocessor. Microelectron. J. Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis
2009	J	`jnl`	Maze Routing Steiner Trees With Delay Versus Wire Length Tradeoff. IEEE Trans. Very Large Scale Integr. Syst. Renato Fernandes Hentschke, Jagannathan Narasimhan, Marcelo O. Johann, Ricardo Reis
2009	—	`conf`	Measuring the effectiveness of symmetric and asymmetric transistor sizing for Single Event Transient mitigation in CMOS 90nm technologies. LATW Thiago Assis, Fernanda Lima Kastensmidt, Gilson I. Wirth, Ricardo Reis
2009	—	`conf`	Protecting digital circuits against hold time violation due to process variability. SBCCI Gustavo Neuberger, Gilson I. Wirth, Ricardo Reis
2009	—	`conf`	Recovery scheme for hardening system on programmable chips. LATW Cristina Meinhardt, Ricardo Reis, Massimo Violante, Matteo Sonza Reorda
2008	—	`conf`	A New Clock Mesh Buffer Sizing Methodology for Skew and Power Reduction. ISVLSI Gustavo Wilke, Ricardo Reis
2008	—	`conf`	A novel scheme to reduce short-circuit power in mesh-based clock architectures. SBCCI Gustavo Wilke, Renan Fonseca, Cecilia Mezzomo, Ricardo Reis
2008	C	`conf`	Design procedure for DVB-T receivers large tuning range LP filter. ISCAS Pasquale Delizia, Marcello De Matteis, Stefano D'Amico, Andrea Baschirotto, Carlos Azeredo Leme, Ricardo Reis
2007	—	`conf`	3D-Vias Aware Quadratic Placement for 3D VLSI Circuits. ISVLSI Renato Fernandes Hentschke, Guilherme Flach, Felipe Pinto, Ricardo Reis
2007	C	`conf`	A 3D-Via Legalization Algorithm for 3D VLSI Circuits and its Impact on Wire Length. ISCAS Renato Fernandes Hentschke, Ricardo Reis
2007	—	`conf`	A CAL Tool to Aid the Understanding of Logic Synthesis. MSE Reginaldo Tavares, William Lautenschlager, Ricardo Reis
2007	—	`conf`	An Educational Tool for Design Automation of CMOS Cells. MSE Adriel Ziesemer, Cristiano Lazzari, Ricardo Reis
2007	—	`conf`	Cell placement on graphics processing units. SBCCI Guilherme Flach, Marcelo O. Johann, Renato Fernandes Hentschke, Ricardo Reis
2007	C	`conf`	Efficient timing closure with a transistor level design flow. VLSI-SoC Cristiano Lazzari, Cristiano Santos, Adriel Ziesemer, Lorena Anghel, Ricardo Reis
2007	—	`conf`	Logic and Physical Synthesis of Cell Arrays. ICECS Cristina Meinhardt, Ricardo Reis, Reginaldo Tavares
2007	J	`jnl`	Memory-efficient multithreaded code generation from Simulink for heterogeneous MPSoC. Des. Autom. Embed. Syst. Sang-Il Han, Soo-Ik Chae, Lisane B. de Brisolara, Luigi Carro, Ricardo Reis, Xavier Guerin, Ahmed Amine Jerraya
2007	J	`jnl`	On the Evolution of Remote Laboratories for Prototyping Digital Electronic Systems. IEEE Trans. Ind. Electron. Leandro Soares Indrusiak, Manfred Glesner, Ricardo Reis
2007	C	`conf`	Reducing fine-grain communication overhead in multithread code generation for heterogeneous MPSoC. SCOPES Lisane B. de Brisolara, Sang-Il Han, Xavier Guerin, Luigi Carro, Ricardo Reis, Soo-Ik Chae, Ahmed Amine Jerraya
2007	—	`conf`	Reducing the Power Consumption in Networks-on-Chip through Data Coding Schemes. ICECS José Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Ricardo Reis, Manfred Glesner
2007	—	`conf`	Statistical Analysis of Normality of Systematic and Random Variability of Flip-Flop Race Immunity in 130nm and 90nm CMOS Technologies. VLSI-SoC (Selected Papers) Gustavo Neuberger, Gilson I. Wirth, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis
2007	C	`conf`	Statistical analysis of systematic and random variability of flip-flop race immunity in 130nm and 90nm CMOS technologies. VLSI-SoC Gustavo Neuberger, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis, Gilson I. Wirth, Ralf Brederlow, Christian Pacha
2007	—	`conf`	Statistical and Numerical Approach for a Computer efficient circuit yield analysis. VLSI-SoC (Selected Papers) Lucas Brusamarello, Roberto da Silva, Gilson I. Wirth, Ricardo Reis
2007	—	`ed.`	VLSI-SoC: Research Trends in VLSI and Systems on Chip - Fourteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC2006), October 16-18, 2006, Nice, France VLSI-SoC (Selected Papers) Giovanni De Micheli, Salvador Mir, Ricardo Reis
2006	—	`conf`	A Method for I/O Pins Partitioning Targeting 3D VLSI Circuits. VLSI-SoC (Selected Papers) Renato Fernandes Hentschke, Sandro Sawicki, Marcelo O. Johann, Ricardo Reis
2006	—	`conf`	A New Transistor-Level Layout Generation Strategy for Static CMOS Circuits. ICECS Cristiano Lazzari, Cristiano Santos, Ricardo Reis
2006	—	`conf`	A Regular Layout Approach for ASICs. ISVLSI Claudio Menezes, Cristina Meinhardt, Ricardo Reis, Reginaldo Tavares
2006	—	`conf`	Considering Zero-Arrival Time and Block-Arrival Time in Hierarchical Functional Timing Analysis. PATMOS Daniel Lima Ferrão, Ricardo Reis, José Luís Almada Güntzel
2006	—	`conf`	Design at high level of a robust 8-bit microprocessor to soft errors by using only standard gates. SBCCI Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis
2006	C	`conf`	Design of a Robust 8-Bit Microprocessor to Soft Errors. IOLTS Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis
2006	—	`conf`	Quadratic placement for 3d circuits using z-cell shifting, 3d iterative refinement and simulated annealing. SBCCI Renato Fernandes Hentschke, Guilherme Flach, Felipe Pinto, Ricardo Reis
2006	—	`conf`	Unbalacing the I/O Pins Partitioning for Minimizing Inter-Tier Vias in 3D VLSI Circuits. ICECS Sandro Sawicki, Renato Fernandes Hentschke, Marcelo O. Johann, Ricardo Reis
2006	—	`conf`	orBDDs Direct Mapping for Structured Logic Circuits. ICECS Reginaldo Tavares, Cristina Meinhardt, Ricardo Reis
2005	C	`conf`	A Transistor Placement Technique Using Genetic Algorithm and Analytical Programming. VLSI-SoC Cristiano Lazzari, Lorena Anghel, Ricardo Reis
2005	J	`jnl`	An Automatic Technique for Optimizing Reed-Solomon Codes to Improve Fault Tolerance in Memories. IEEE Des. Test Comput. Gustavo Neuberger, Fernanda Gusmão de Lima Kastensmidt, Ricardo Reis
2005	—	`conf`	Blue Macaw: A Didactic Placement Tool Using Simulated Annealing. EDUTECH Renato Fernandes Hentschke, Marcelo O. Johann, Ricardo Reis
2005	—	`conf`	Comparing high-level modeling approaches for embedded system design. ASP-DAC Lisane B. de Brisolara, Leandro Buss Becker, Luigi Carro, Flávio Rech Wagner, Carlos Eduardo Pereira, Ricardo Reis
2005	J	`jnl`	Desenvolvimento de Técnicas de Tolerância à Falhas para Componentes Programáveis por SRAM. RITA Fernanda Lima Kastensmidt, Gustavo Neuberger, Luigi Carro, Ricardo Reis
2005	—	`conf`	Designing Low-Power Embedded Software for Mass-Produced Microprocessor by Using a Loop Table in On-Chip Memory. PATMOS Rodrigo Possamai Bastos, Fernanda Lima Kastensmidt, Ricardo Reis
2005	—	`conf`	Incremental timing optimization for automatic layout generation. ISCAS (4) Cristiano Santos, Daniel Lima Ferrão, Ricardo Reis, José Luís Güntzel
2005	—	`conf`	TOC-BISR: A Self-Repair Scheme for Memories in Embedded Systems. IESS Gustavo Neuberger, Fernanda Lima Kastensmidt, Ricardo Reis
2004	—	`conf`	A New Transistor Folding Algorithm Applied to an Automatic Full-Custom Layout Generation Tool. PATMOS Fabricio B. Bastian, Cristiano Lazzari, José Luís Almada Güntzel, Ricardo Reis
2004	A	`conf`	Design of Very Deep Pipelined Multipliers for FPGAs. DATE Alex Panato, Sandro V. Silva, Flávio Rech Wagner, Marcelo O. Johann, Ricardo Reis, Sergio Bampi
2004	J	`jnl`	Designing Fault-Tolerant Techniques for SRAM-Based FPGAs. IEEE Des. Test Comput. Fernanda Lima Kastensmidt, Gustavo Neuberger, Renato Fernandes Hentschke, Luigi Carro, Ricardo Reis
2004	—	`conf`	Designing and testing fault-tolerant techniques for SRAM-based FPGAs. Conf. Computing Frontiers Fernanda Lima Kastensmidt, Gustavo Neuberger, Luigi Carro, Ricardo Reis
2004	—	`ed.`	Information Technology, Selected Tutorials, IFIP 18th World Computer Congress, Tutorials, 22-27 August 2004, Toulouse, France IFIP Congress Tutorials Ricardo Reis
2004	—	`conf`	Physical design methodologies for performance predictability and manufacturability. Conf. Computing Frontiers Ricardo Reis, Fernanda Lima Kastensmidt, José Luís Almada Güntzel
2004	—	`conf`	Requirements for Computer-Aided Learning from the Point of View of Electronic Design. EDUTECH Ricardo Reis
2003	—	`conf`	A Novel full Automatic Layout Generation Strategy for Static CMOS Circuits. VLSI-SoC (Selected Papers) Cristiano Lazzari, Cristiano Viana Domingues, José Luís Güntzel, Ricardo Reis
2003	—	`conf`	A Transistor Sizing Method Applied to an Automatic Layout Generation Tool. SBCCI Cristiano Santos, Gustavo Wilke, Cristiano Lazzari, Ricardo Reis, José Luís Almada Güntzel
2003	—	`conf`	Plic-Plac: a novel constructive algorithm for placement. ISCAS (5) Renato Fernandes Hentschke, Ricardo Reis
2003	J	`jnl`	Quadrature sampling schemes with improved image rejection. IEEE Trans. Circuits Syst. II Express Briefs Kong-Pang Pun, José E. da Franca, Carlos Azeredo Leme, Ricardo Reis
2003	C	`conf`	Supporting Consistency Control between Functional and Structural Views in Interface-based Design Models. FDL Leandro Soares Indrusiak, Ricardo Reis, Manfred Glesner
2002	—	`conf`	A Comparison Between Testability Measures Applied to Complex Gates. LATW José Luís Güntzel, Gustavo Wilke, Márcio Bystronski, Ana Cristina Medina Pinto, Ricardo Reis
2002	—	`conf`	An IP of an Advanced Encryption Standard for Altera" Devices. SBCCI Alex Panato, Marcelo Barcelos, Ricardo Reis
2002	—	`conf`	Analyzing Area and Performance Penalty of Protecting Different Digital Modules with Hamming Code and Triple Modular Redundancy. SBCCI Renato Fernandes Hentschke, Felipe S. Marques, Fernanda Lima, Luigi Carro, Altamiro Amadeu Susin, Ricardo Reis
2002	—	`conf`	Collaborative Design Using a Shared Object Spaces Infrastructure. SBCCI Sandro Sawicki, Lisane B. de Brisolara, Leandro S. lndrusiak, Ricardo Reis
2002	—	`conf`	Finding the Critical Delay of Combinational Blocks by Floating Vector Simulation and Path Tracing. SBCCI Gustavo Wilke, José Luís Güntzel, Márcio Bystronski, Ana Cristina Medina Pinto, Ricardo Reis
2002	—	`conf`	Injecting Multiple Upsets in a SEU tolerant 8051 Micro-controller. LATW Fernanda Lima, Luigi Carro, Raul Velazco, Ricardo Reis
2001	—	`conf`	A Timed Calculus for ATG-Based Timing Analysis with Complex Gates. LATW José Luís Güntzel, Ana Cristina Medina Pinto, Ricardo Reis
2001	—	`conf`	Interconnection Length Estimation at Logic-Level. SBCCI João Baptista dos Santos Martins, Fernando Moraes, Ricardo Reis
2001	—	`conf`	Jale3D - Platform-independent IC/MEMS Layout Edition Tool. SBCCI Luciano Copello Ost, Marcos Mainardi, Leandro Soares Indrusiak, Ricardo Reis
2001	J	`jnl`	Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults. J. Electron. Test. Érika F. Cota, Fernanda Lima, Sana Rezgui, Luigi Carro, Raoul Velazco, Marcelo Lubaszewski, Ricardo Reis
2000	—	`conf`	A Self-Testing Mask Programmable Matrix Using Built-in Current Sensing. LATW Fernanda Gusmão de Lima, Eduardo D'Avila, Mauricio Moraes, Marcelo Lubaszewski, Ricardo Reis
2000	C	`conf`	A frame stream controller IP. ISCAS Fernanda Gusmão de Lima, Marcelo Barcelos, Juergen Rochol, Sergio Bampi, Ricardo Reis
2000	—	`conf`	ATG-Based Timing Analysis of Circuits Containing Complex Gates. SBCCI José Luís Güntzel, Ana Cristina Medina Pinto, Eduardo D'Avila, Ricardo Reis
2000	—	`conf`	Designing a Radiation Hardened 8051-Like Micro-Controller. SBCCI Fernanda Gusmão de Lima, Érika F. Cota, Luigi Carro, Marcelo Lubaszewski, Ricardo Reis, Raoul Velazco, Sana Rezgui
2000	—	`conf`	LASCA-Interconnect Parasitic Extraction Tool for Deep-Submicron IC Design. SBCCI F. K. Ferreira, Fernando Moraes, Ricardo Reis
2000	—	`conf`	Net by Net Routing with a New Path Search Algorithm. SBCCI Marcelo O. Johann, Ricardo Reis
2000	—	`conf`	SisECO: Design of an Echo-Canceling IC for Base Band Modems. SBCCI Luciano Agostini, Georg Stemmer, A. Prado, Roberto Pacheco, T. Campos, Sergio Bampi, Ricardo Reis
2000	J	`jnl`	Specification and design of an Ethernet Interface soft IP. J. Braz. Comput. Soc. João Leonardo Fragoso, Eduardo Costa Pereira, Juergen Rochol, Sergio Bampi, Ricardo Reis
2000	—	`conf`	Structuring Web course pages as Automata: revising concepts. RIAO Júlio Henrique Araújo Pereira Machado, Carlos Tadeu Q. de Morais, Paulo Blauth Menezes, Ricardo Reis
2000	—	`conf`	WTROPIC: A WWW-Based Macro-Cell Generator. SBCCI João Leonardo Fragoso, Fernando Moraes, Ricardo Reis
1998	—	`conf`	A Case Study for a WWW based CAD Framework. SBCCI Leandro Soares Indrusiak, Ricardo Reis
1998	—	`conf`	An Improved Path Enumeration Method Considering Different Fall and Rise Gate Delays. SBCCI José Luís Güntzel, Ana Cristina Medina Pinto, Fernando Moraes, Ricardo Reis
1998	—	`conf`	Microelectronics Education using WWW and CAD Tools. SBCCI Ricardo Reis, Leandro Soares Indrusiak