Ricardo Chaves

80 papers A 5B 15C 14Misc 3Journal 21Unranked 21
YearRankTypeTitle / Venue / Authors
2025 B conf
A Fast Parallel Decoder for LDPC Codes Suitable for Burst Errors in QKD Reconciliation.
ITW
Duarte Mateus, Ricardo Chaves
2025 C conf
AEGIS+AES folded architecture for FPGA.
DSD
João Carlos Resende, Ricardo Chaves
2025 — conf
DISCRETION: First Field Demonstration of a Quantum Enabled SDN in the Context of a Military Exercise.
ICMCIS
Catarina Bastos, Francisco Pinto, Rodrigo Bacar, Gustavo Anjos, Margarida Almeida, Armando Nolasco Pinto, Ricardo Chaves, Tiago Dias, Joana Afonso, Rui Calé, Miguel Freitas, Luis Maia, Luis Magalhães, Alejandro Muñiz, Rafael Cantó, Juan Pedro Brito, Jesus Ballesta, Rubén B. Méndez, Stephan Laschet, Sebastian Ramacher, Paul James, Luca Torresetti, Pietro Piscione, Ahmed K. Abdulwahed, Pietro G. Giardina, Vicente Martín, Laura Ortíz, Antonio Pastor, Nelson J. Muga, Nuno A. Silva, Diego R. López, Margarida Vieira, Carmen Escribano, Luis Mengal
2025 B conf
Energy-Aware Adaptive Security for Smart Farming (EAASF): A Hybrid IDS-IPS Framework with SDN-Orchestrated for Agriculture 4.0.
NCA
Seyed Jamal Mirsadri, Ricardo Chaves, Luis Pedrosa
2024 C conf
External Memory Protection on FPGA-Based Embedded Systems.
DSD
João Carlos Resende, Aleksandar Ilic, Ricardo Chaves
2024 A conf
Security Layers and Related Services within the Horizon Europe NEUROPULS Project.
DATE
Fabio Pavanello, Cédric Marchand, Paul Jiménez, Xavier Letartre, Ricardo Chaves, Niccolò Marastoni, Alberto Lovato, Mariano Ceccato, George Papadimitriou, Vasileios Karakostas, Dimitris Gizopoulos, Roberta Bardini, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino, Laurence Lerch, Ulrich Rührmair, Sergio Vinagrero Gutierrez, Giorgio Di Natale, Elena-Ioana Vatajelu
2023 J jnl
Content distribution in a VANET using InterPlanetary file system.
Wirel. Networks
Ricardo Chaves, Carlos R. Senna, Miguel Luís, Susana Sargento, Ricardo Matos, Diogo Recharte
2023 B conf
EUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS.
ETS
Fabio Pavanello, Cédric Marchand, Ian O'Connor, Régis Orobtchouk, Fabien Mandorlo, Xavier Letartre, Sébastien Cueff, Elena-Ioana Vatajelu, Giorgio Di Natale, Benoit Cluzel, Aurelien Coillet, Benoît Charbonnier, Pierre Noe, Frantisek Kavan, Martin Zoldak, Michal Szaj, Peter Bienstman, Thomas Van Vaerenbergh, Ulrich Rührmair, Paulo F. Flores, Luís Guerra e Silva, Ricardo Chaves, Luís Miguel Silveira, Mariano Ceccato, Dimitris Gizopoulos, George Papadimitriou, Vasileios Karakostas, Axel Brando, Francisco J. Cazorla, Ramon Canal, Pau Closas, Adria Gusi-Amigo, Paolo Crovetti, Alessio Carpegna, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino
2023 B conf
Lightweight Network-Based IoT Device Authentication in Cloud Services.
ICNP
Tomás Silva, João Casal, Ricardo Chaves
2023 J jnl
NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS.
CoRR
Fabio Pavanello, Cédric Marchand, Ian O'Connor, Régis Orobtchouk, Fabien Mandorlo, Xavier Letartre, Sébastien Cueff, Elena-Ioana Vatajelu, Giorgio Di Natale, Benoit Cluzel, Aurelien Coillet, Benoît Charbonnier, Pierre Noe, Frantisek Kavan, Martin Zoldak, Michal Szaj, Peter Bienstman, Thomas Van Vaerenbergh, Ulrich Rührmair, Paulo F. Flores, Luís Guerra e Silva, Ricardo Chaves, Luís Miguel Silveira, Mariano Ceccato, Dimitris Gizopoulos, George Papadimitriou, Vasileios Karakostas, Axel Brando, Francisco J. Cazorla, Ramon Canal, Pau Closas, Adria Gusi-Amigo, Paolo Crovetti, Alessio Carpegna, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino
2023 J jnl
Security layers and related services within the Horizon Europe NEUROPULS project.
CoRR
Fabio Pavanello, Cédric Marchand, Paul Jiménez, Xavier Letartre, Ricardo Chaves, Niccolò Marastoni, Alberto Lovato, Mariano Ceccato, George Papadimitriou, Vasileios Karakostas, Dimitris Gizopoulos, Roberta Bardini, Tzamn Melendez Carmona, Stefano Di Carlo, Alessandro Savino, Laurence Lerch, Ulrich Rührmair, Sergio Vinagrero Gutierrez, Giorgio Di Natale, Elena-Ioana Vatajelu
2022 J jnl
Design and Evaluation of Countermeasures Against Fault Injection Attacks and Power Side-Channel Leakage Exploration for AES Block Cipher.
IEEE Access
Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, Antonio J. Acosta, Carlos Jesús Jiménez-Fernández, Ricardo Chaves
2022 — ed.
Euro-Par 2021: Parallel Processing Workshops - Euro-Par 2021 International Workshops, Lisbon, Portugal, August 30-31, 2021, Revised Selected Papers
Euro-Par Workshops
Ricardo Chaves, Dora B. Heras, Aleksandar Ilic, Didem Unat, Rosa M. Badia, Andrea Bracciali, Patrick Diehl, Anshu Dubey, Oh Sangyoon, Stephen L. Scott, Laura Ricci
2022 — conf
SmartFusion2 SoC as a security module for the IoT world.
CF
Alexandre Rodrigues, João Carlos Resende, Ricardo Chaves
2020 J jnl
EmuCD: An Emulator for Content Dissemination Protocols in Vehicular Networks.
Future Internet
Ricardo Chaves, Carlos R. Senna, Miguel Luís, Susana Sargento, André Moreira, Diogo Recharte, Ricardo Matos
2020 C conf
Hamming-Code Based Fault Detection Design Methodology for Block Ciphers.
ISCAS
Francisco Eugenio Potestad-Ordóñez, Erica Tena-Sánchez, Ricardo Chaves, Manuel Valencia-Barrero, Antonio Acosta-Jiménez, Carlos Jesús Jiménez-Fernández
2020 B conf
Mask Scrambling Against SCA on Reconfigurable TBOX-Based AES.
FPL
João Carlos Resende, Ricardo J. R. Maçãs, Ricardo Chaves
2020 Misc conf
TBOX-Based Mask Scrambling Against SCA.
FCCM
João Carlos Resende, Ricardo J. R. Maçãs, Ricardo Chaves
2020 J jnl
When Backscatter Communication Meets Vehicular Networks: Boosting Crosswalk Awareness.
IEEE Access
Felisberto Pereira, Arnaldo S. R. Oliveira, Nuno Borges Carvalho, Hugo Sampaio, Ricardo Chaves, Ricardo Correia, Miguel Luís, Susana Sargento, Marina Jordão, Luís Almeida, Carlos R. Senna
2019 — conf
Applying Model Checking in the Verification of a Clock Masking Unit.
DCIS
José M. Leitão, Ricardo Chaves, Marcelino B. Santos
2018 — conf
Low-power frequency monitoring circuit for clock failure detection.
DCIS
Rodrigo B. Capeleiro, José M. Leitão, Ricardo Chaves, Marcelino B. Santos
2018 — conf
SCA-Resistance for AES: How Cheap Can We Go?
AFRICACRYPT
Ricardo Chaves, Lukasz Chmielewski, Francesco Regazzoni, Lejla Batina
2017 B conf
Area-optimized montgomery multiplication on IGLOO 2 FPGAs.
FPL
Pedro Maat C. Massolino, Lejla Batina, Ricardo Chaves, Nele Mentens
2017 J jnl
Cross-domain identity and discovery framework for web calling services.
Ann. des Télécommunications
Ibrahim Tariq Javed, Rebecca Copeland, Noël Crespi, Marc Emmelmann, Andreea Ancuta Corici, Ahmed Bouabdallah, Tuo Zhang, Saad El Jaouhari, Felix Beierle, Sebastian Göndör, Axel Küpper, Kevin Corre, Jean-Michel Crom, Frank Oberle, Ingo Friese, Ana Caldeira, Gil Dias, Nuno Santos, Ricardo Chaves, Ricardo Lopes Pereira
2017 — conf
Decentralized Communications: Trustworthy interoperability in peer-to-peer networks.
EuCNC
Paulo Chainho, Steffen Druesedow, Ricardo Lopes Pereira, Ricardo Chaves, Nuno Santos, Kay Haensge, Antón Román Portabales
2017 — conf
Efficient FPGA Implementation of the SHA-3 Hash Function.
ISVLSI
Magnus Sundal, Ricardo Chaves
2017 — conf
Flexible and low-cost HSM based on non-volatile FPGAs.
ReConFig
Diogo Parrinha, Ricardo Chaves
2017 — conf
Improving FPGA based SHA-3 structures.
HOST
Magnus Sundal, Ricardo Chaves
2017 — conf
Pipelined FPGA coprocessor for elliptic curve cryptography based on residue number system.
SAMOS
Pedro Miguens Matutino, Juvenal Araujo, Leonel Sousa, Ricardo Chaves
2016 J jnl
Compact and On-the-Fly Secure Dynamic Reconfiguration for Volatile FPGAs.
ACM Trans. Reconfigurable Technol. Syst.
Hirak J. Kashyap, Ricardo Chaves
2016 Misc conf
Global Identity and Reachability Framework for Interoperable P2P Communication Services.
ICIN
Ibrahim Tariq Javed, Rebecca Copeland, Noël Crespi, Felix Beierle, Sebastian Göndör, Axel Küpper, Ahmed Bouabdallah, Marc Emmelmann, Andreea Ancuta Corici, Kevin Corre, Jean-Michel Crom, Frank Oberle, Ingo Friese, Ana Caldeira, Gil Dias, Ricardo Chaves, Nuno Santos
2016 J jnl
Low Power Montgomery Modular Multiplication on Reconfigurable Systems.
IACR Cryptol. ePrint Arch.
Pedro Maat C. Massolino, Lejla Batina, Ricardo Chaves, Nele Mentens
2016 J jnl
Method for designing two levels RNS reverse converters for large dynamic ranges.
Integr.
Héctor Pettenghi, Ricardo Chaves, Roberto de Matos, Leonel Sousa
2016 B conf
Policy-Based Management for Smart Mobility.
Intelligent Environments (Workshops)
Teresa Vazão, João Duarte Gomes, Ricardo Chaves
2016 B conf
Storekeeper: A Security-Enhanced Cloud Storage Aggregation Service.
SRDS
Sancha Pereira, André Alves, Nuno Santos, Ricardo Chaves
2015 J jnl
Arithmetic-Based Binary-to-RNS Converter Modulo {2
IEEE Trans. Very Large Scale Integr. Syst.
Pedro Miguens Matutino, Ricardo Chaves, Leonel Sousa
2015 C conf
CLEFIA Implementation with Full Key Expansion.
DSD
João Carlos Bittencourt, João Carlos Resende, Wagner Luiz Alves de Oliveira, Ricardo Chaves
2015 C conf
Challenges in designing trustworthy cryptographic co-processors.
ISCAS
Ricardo Chaves, Giorgio Di Natale, Lejla Batina, Shivam Bhasin, Baris Ege, Apostolos P. Fournaris, Nele Mentens, Stjepan Picek, Francesco Regazzoni, Vladimir Rozic, Nicolas Sklavos, Bohan Yang
2015 B conf
Compact dual block AES core on FPGA for CCM Protocol.
FPL
João Carlos Resende, Ricardo Chaves
2015 — conf
Dual CLEFIA/AES Cipher Core on FPGA.
ARC
João Carlos Resende, Ricardo Chaves
2015 J jnl
Morphable hundred-core heterogeneous architecture for energy-aware computation.
IET Comput. Digit. Tech.
Nuno Neves, Henrique Mendes, Ricardo Chaves, Pedro Tomás, Nuno Roma
2014 — conf
Accelerating differential power analysis on heterogeneous systems.
WESS
João Amaral, Francesco Regazzoni, Pedro Tomás, Ricardo Chaves
2014 J jnl
An Efficient Scalable RNS Architecture for Large Dynamic Ranges.
J. Signal Process. Syst.
Pedro Miguens Matutino, Ricardo Chaves, Leonel Sousa
2014 C conf
Method for designing multi-channel RNS architectures to prevent power analysis SCA.
ISCAS
Héctor Pettenghi, Jude Angelo Ambrose, Ricardo Chaves, Leonel Sousa
2014 — conf
ROM-less RNS-to-binary converter moduli {2
ISIC
Pedro Miguens Matutino, Ricardo Chaves, Leonel Sousa
2014 B conf
Secure partial dynamic reconfiguration with unsecured external memory.
FPL
Hirak J. Kashyap, Ricardo Chaves
2013 — conf
A compact and scalable RNS architecture.
ASAP
Pedro Miguens Matutino, Ricardo Chaves, Leonel Sousa
2013 — conf
A flexible shared library profiler for early estimation of performance gains in heterogeneous systems.
HPCS
Adrian Matoga, Ricardo Chaves, Pedro Tomás, Nuno Roma
2013 C conf
HotStream: Efficient Data Streaming of Complex Patterns to Multiple Accelerating Kernels.
SBAC-PAD
Sergio Paiagua, Frederico Pratas, Pedro Tomás, Nuno Roma, Ricardo Chaves
2013 J jnl
Method to Design General RNS Reverse Converters for Extended Moduli Sets.
IEEE Trans. Circuits Syst. II Express Briefs
Héctor Pettenghi, Ricardo Chaves, Leonel Sousa
2013 J jnl
On the Design of RNS Reverse Converters for the Four-Moduli Set ${\bf\{2^{\mmb n}+1, 2^{\mmb n}-1, 2^{\mmb n}, 2^{{\mmb n}+1}+1\}}$.
IEEE Trans. Very Large Scale Integr. Syst.
Leonel Sousa, Samuel Antao, Ricardo Chaves
2013 J jnl
RNS Reverse Converters for Moduli Sets With Dynamic Ranges up to (8n+1)-bit.
IEEE Trans. Circuits Syst. I Regul. Pap.
Héctor Pettenghi, Ricardo Chaves, Leonel Sousa
2013 B conf
Scalable and high throughput biosensing platform.
FPL
José M. Leitão, José A. Germano, Nuno Roma, Ricardo Chaves, Pedro Tomás
2013 — conf
Transparent Application Acceleration by Intelligent Scheduling of Shared Library Calls on Heterogeneous Systems.
PPAM (1)
João Colaço, Adrian Matoga, Aleksandar Ilic, Nuno Roma, Pedro Tomás, Ricardo Chaves
2012 C conf
RNS Arithmetic Units for Modulo {2^n+-k}.
DSD
Pedro Miguens Matutino, Héctor Pettenghi, Ricardo Chaves, Leonel Sousa
2011 C conf
Binary-to-RNS Conversion Units for moduli {2^n ± 3}.
DSD
Pedro Miguens Matutino, Ricardo Chaves, Leonel Sousa
2011 B conf
Compact CLEFIA Implementation on FPGAS.
FPL
Paulo Proenca, Ricardo Chaves
2010 C conf
An improved RNS generator 2
VLSI-SoC
Héctor Pettenghi, Ricardo Chaves, Leonel Sousa, Maria J. Avedillo
2010 C conf
An improved RNS reverse converter for the {2
ISCAS
Kazeem Alagbe Gbolagade, Ricardo Chaves, Leonel Sousa, Sorin Dan Cotofana
2010 C conf
Arithmetic Units for RNS Moduli {2n-3} and {2n+3} Operations.
DSD
Pedro Miguens Matutino, Ricardo Chaves, Leonel Sousa
2009 Misc conf
Compact and Flexible Microcoded Elliptic Curve Processor for Reconfigurable Devices.
FCCM
Samuel Antao, Ricardo Chaves, Leonel Sousa
2008 — conf
BRAM-LUT Tradeoff on a Polymorphic DES Design.
HiPEAC
Ricardo Chaves, Blagomir Donchev, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis
2008 J jnl
Cost-Efficient SHA Hardware Accelerators.
IEEE Trans. Very Large Scale Integr. Syst.
Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis
2008 — conf
Efficient FPGA elliptic curve cryptographic processor over GF(2
FPT
Samuel Antao, Ricardo Chaves, Leonel Sousa
2008 A conf
Merged Computation for Whirlpool Hashing.
DATE
Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis
2008 B conf
On-the-fly attestation of reconfigurable hardware.
FPL
Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa
2008 — conf
Vectorized AES Core for High-throughput Secure Environments.
VECPAR
Miquel Pericàs, Ricardo Chaves, Georgi Gaydadjiev, Stamatis Vassiliadis, Mateo Valero
2007 J jnl
Improving residue number system multiplication with more balanced moduli sets and enhanced modular arithmetic structures.
IET Comput. Digit. Tech.
Ricardo Chaves, Leonel Sousa
2006 A conf
Improving SHA-2 Hardware Implementations.
CHES
Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis
2006 A conf
Reconfigurable memory based AES co-processor.
IPDPS
Ricardo Chaves, Georgi Kuzmanov, Stamatis Vassiliadis, Leonel Sousa
2006 — conf
Rescheduling for Optimized SHA-1 Calculation.
SAMOS
Ricardo Chaves, Georgi Kuzmanov, Leonel Sousa, Stamatis Vassiliadis
2005 J jnl
A universal architecture for designing efficient modulo 2
IEEE Trans. Circuits Syst. I Regul. Pap.
Leonel Sousa, Ricardo Chaves
2005 J jnl
Corrections to "A Universal Architecture for Designing Efficient Modulo 2
IEEE Trans. Circuits Syst. I Regul. Pap.
Leonel Sousa, Ricardo Chaves
2004 C conf
{2
DSD
Ricardo Chaves, Leonel Sousa
2003 B conf
Demo: playingfFantasyA with senToy.
ICMI
Ana Paiva, Rui Prada, Ricardo Chaves, Marco Vala, Adrian Bullock, Gerd Andersson, Kristina Höök
2003 — conf
FantasyA and SenToy.
CHI Extended Abstracts
Kristina Höök, Adrian Bullock, Ana Paiva, Marco Vala, Ricardo Chaves, Rui Prada
2003 C conf
RDSP: A RISC DSP based on Residue Number System.
DSD
Ricardo Chaves, Leonel Sousa
2003 A conf
SenToy: a tangible interface to control the emotions of a synthetic character.
AAMAS
Ana Paiva, Ricardo Chaves, Moisés Piedade, Adrian Bullock, Gerd Andersson, Kristina Höök
2003 J jnl
SenToy: an affective sympathetic interface.
Int. J. Hum. Comput. Stud.
Ana Paiva, Marco Costa, Ricardo Chaves, Moisés Piedade, Dário Mourão, Daniel Sobral, Kristina Höök, Gerd Andersson, Adrian Bullock
2003 B conf
Towards tangibility in gameplay: building a tangible affective interface for a computer game.
ICMI
Ana Paiva, Rui Prada, Ricardo Chaves, Marco Vala, Adrian Bullock, Gerd Andersson, Kristina Höök