Rezgar Sadeghi

13 papers B 3Misc 1Journal 3Unranked 6
YearRankTypeTitle / Venue / Authors
2025 J jnl
SCiMA: A Systolic CiM-Based Accelerator With a New Weight Mapping for CNNs - A Virtual Framework Approach.
IEEE Access
Rezgar Sadeghi, Zainalabedin Navabi
2025 J jnl
Uncertainty-Aware Crosstalk Predictors for Adaptive Reliability in Core Interconnects.
J. Electron. Test.
Rezgar Sadeghi, Amirhossein Ilkhani, Amirhosein Yazdanpanah
2024 — conf
AZMA: A Zynq-Based Monitoring and Fault Injection Framework for Processor Assessment.
EWDTS
Zahra Mahdavi, Rezgar Sadeghi, Ali Shayanpour, Amirhosein Yazdanpanah, Zainalabedin Navabi
2024 — conf
Configurable DRAM Access for Neural Network Accelerators: A SystemC Virtual Platform Approach.
EWDTS
Tina Hashemi, Rezgar Sadeghi, Maryam Rajabalipanah, Zahra Hojati, Zainalabedin Navabi
2024 — conf
Real-Time Automotive Accident Detection Using Unsupervised Machine Learning.
EWDTS
Reza Baharvand, Mahsa Jamshidi, Mozhgan Rezaie Manavand, Rezgar Sadeghi, Zainalabedin Navabi
2022 B conf
On-Chip Training of Crosstalk Predictors to Fit Uncertainties.
ETS
Rezgar Sadeghi, Ehsan Akbari, Mohamad Ali Saber
2020 B conf
Built-In Predictors for Dynamic Crosstalk Avoidance.
ETS
Rezgar Sadeghi, Zainalabedin Navabi
2020 Misc conf
ESL, Back-annotating Crosstalk Fault Models into High-level Communication Links.
VTS
Katayoon Basharkhah, Rezgar Sadeghi, Nooshin Nosrati, Zainalabedin Navabi
2020 J jnl
LUT Input Reordering to Reduce Aging Impact on FPGA LUTs.
IEEE Trans. Computers
Mohammad Ebrahimi, Rezgar Sadeghi, Zainalabedin Navabi
2019 — conf
An Accelerator-based Architecture Utilizing an Efficient Memory Link for Modern Computational Requirements.
EWDTS
Saba Yousefzadeh, Katayoon Basharkhah, Nooshin Nosrati, Rezgar Sadeghi, Jaan Raik, Maksim Jenihhin, Zainalabedin Navabi
2019 — conf
An ESL Environment for Modeling Electrical Interconnect Faults.
ISVLSI
Nooshin Nosrati, Katayoon Basharkhah, Rezgar Sadeghi, Zainalabedin Navabi
2019 B conf
Back-annotation of Interconnect Physical Properties for System-Level Crosstalk Modeling.
ETS
Rezgar Sadeghi, Nooshin Nosrati, Katayoon Basharkhah, Zainalabedin Navabi
2019 — conf
Making System Level Test Possible by a Mixed-mode, Multi-level, Integrated Modeling Environment.
EWDTS
Nooshin Nosrati, Katayoon Basharkhah, Rezgar Sadeghi, Carna Zivkovic, Christoph Grimm, Zainalabedin Navabi