Renzo Andri

49 papers A* 4A 3C 2Journal 30Unranked 9
YearRankTypeTitle / Venue / Authors
2026 — conf
GENIAL: Generative Design Space Exploration via Network Inversion for Low Power Algorithmic Logic Units.
ASP-DAC
Maxence Bouvier, Ryan Amaudruz, Felix Arnold, Renzo Andri, Lukas Cavigelli
2026 A* conf
GenPairX: A Hardware-Algorithm Co-Designed Accelerator for Paired-End Read Mapping.
HPCA
Julien Eudine, Chu Li, Zhuo Cheng, Renzo Andri, Can Firtina, Mohammad Sadrosadati, Nika Mansouri-Ghiasi, Konstantina Koliogeorgi, Anirban Nag, Arash Tavakkol, Haiyu Mao, Onur Mutlu, Shai Bergman, Ji Zhang
2026 J jnl
GenPairX: A Hardware-Algorithm Co-Designed Accelerator for Paired-End Read Mapping.
CoRR
Julien Eudine, Chu Li, Zhuo Cheng, Renzo Andri, Can Firtina, Mohammad Sadrosadati, Nika Mansouri-Ghiasi, Konstantina Koliogeorgi, Anirban Nag, Arash Tavakkol, Haiyu Mao, Onur Mutlu, Shai Bergman, Ji Zhang
2025 J jnl
Deep Recommender Models Inference: Automatic Asymmetric Data Flow Optimization.
CoRR
Giuseppe Ruggeri, Renzo Andri, Daniele Jahier Pagliari, Lukas Cavigelli
2025 J jnl
Explicit Sign-Magnitude Encoders Enable Power-Efficient Multipliers.
CoRR
Felix Arnold, Maxence Bouvier, Ryan Amaudruz, Renzo Andri, Lukas Cavigelli
2025 — conf
FlatAttention: Dataflow and Fabric Collectives Co-Optimization for Efficient Multi-Head Attention on Tile-Based Many-PE Accelerators.
ISVLSI
Chi Zhang, Luca Colagrande, Renzo Andri, Thomas Benz, Gamze Islamoglu, Alessandro Nadalini, Francesco Conti, Yawei Li, Luca Benini
2025 J jnl
FlatAttention: Dataflow and Fabric Collectives Co-Optimization for Efficient Multi-Head Attention on Tile-Based Many-PE Accelerators.
CoRR
Chi Zhang, Luca Colagrande, Renzo Andri, Thomas Benz, Gamze Islamoglu, Alessandro Nadalini, Francesco Conti, Yawei Li, Luca Benini
2025 J jnl
Flex-SFU: Activation Function Acceleration With Nonuniform Piecewise Approximation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Renzo Andri, Enrico Reggiani, Lukas Cavigelli
2025 J jnl
GENIAL: Generative Design Space Exploration via Network Inversion for Low Power Algorithmic Logic Units.
CoRR
Maxence Bouvier, Ryan Amaudruz, Felix Arnold, Renzo Andri, Lukas Cavigelli
2025 J jnl
Late Breaking Results: The Art of Beating the Odds with Predictor-Guided Random Design Space Exploration.
CoRR
Felix Arnold, Maxence Bouvier, Ryan Amaudruz, Renzo Andri, Lukas Cavigelli
2025 — conf
Stella Nera: A Differentiable Maddness-Based Hardware Accelerator for Efficient Approximate Matrix Multiplication.
ISVLSI
Jannis Schönleber, Lukas Cavigelli, Matteo Perotti, Luca Benini, Renzo Andri
2025 J jnl
Top-Theta Attention: Sparsifying Transformers by Compensated Thresholding.
CoRR
Konstantin Berestizshevsky, Renzo Andri, Lukas Cavigelli
2024 J jnl
Ara2: Exploring Single- and Multi-Core Vector Processing With an Efficient RVV 1.0 Compliant Open-Source Processor.
IEEE Trans. Computers
Matteo Perotti, Matheus A. Cavalcante, Renzo Andri, Lukas Cavigelli, Luca Benini
2024 A conf
Confidential Computing with Heterogeneous Devices at Cloud-Scale.
ACSAC
Aritra Dhar, Supraja Sridhara, Shweta Shinde, Srdjan Capkun, Renzo Andri
2024 C conf
Deep Recommender Models Inference: Automatic Asymmetric Data Flow Optimization.
ICCD
Giuseppe Ruggeri, Renzo Andri, Daniele Jahier Pagliari, Lukas Cavigelli
2023 J jnl
Ara2: Exploring Single- and Multi-Core Vector Processing with an Efficient RVV1.0 Compliant Open-Source Processor.
CoRR
Matteo Perotti, Matheus A. Cavalcante, Renzo Andri, Lukas Cavigelli, Luca Benini
2023 A* conf
Flex-SFU: Accelerating DNN Activation Functions by Non-Uniform Piecewise Approximation.
DAC
Enrico Reggiani, Renzo Andri, Lukas Cavigelli
2023 J jnl
Flex-SFU: Accelerating DNN Activation Functions by Non-Uniform Piecewise Approximation.
CoRR
Enrico Reggiani, Renzo Andri, Lukas Cavigelli
2023 A conf
MemPool Meets Systolic: Flexible Systolic Computation in a Large Shared-Memory Processor Cluster.
DATE
Samuel Riedel, Gua Hao Khov, Sergio Mazzola, Matheus A. Cavalcante, Renzo Andri, Luca Benini
2023 J jnl
MemPool: A Scalable Manycore Architecture With a Low-Latency Shared L1 Memory.
IEEE Trans. Computers
Samuel Riedel, Matheus A. Cavalcante, Renzo Andri, Luca Benini
2023 J jnl
MemPool: A Scalable Manycore Architecture with a Low-Latency Shared L1 Memory.
CoRR
Samuel Riedel, Matheus A. Cavalcante, Renzo Andri, Luca Benini
2023 J jnl
Stella Nera: Achieving 161 TOp/s/W with Multiplier-free DNN Acceleration based on Approximate Matrix Multiplication.
CoRR
Jannis Schönleber, Lukas Cavigelli, Renzo Andri, Matteo Perotti, Luca Benini
2022 — conf
A "New Ara" for Vector Computing: An Open Source Highly Efficient RISC-V V 1.0 Vector Processor Design.
ASAP
Matteo Perotti, Matheus A. Cavalcante, Nils Wistoff, Renzo Andri, Lukas Cavigelli, Luca Benini
2022 J jnl
A "New Ara" for Vector Computing: An Open Source Highly Efficient RISC-V V 1.0 Vector Processor Design.
CoRR
Matteo Perotti, Matheus A. Cavalcante, Nils Wistoff, Renzo Andri, Lukas Cavigelli, Luca Benini
2022 J jnl
Empowering Data Centers for Next Generation Trusted Computing.
CoRR
Aritra Dhar, Supraja Sridhara, Shweta Shinde, Srdjan Capkun, Renzo Andri
2022 J jnl
Going Further With Winograd Convolutions: Tap-Wise Quantization for Efficient Inference on 4x4 Tile.
CoRR
Renzo Andri, Beatrice Bussolino, Antonio Cipolletta, Lukas Cavigelli, Zhe Wang
2022 A* conf
Going Further With Winograd Convolutions: Tap-Wise Quantization for Efficient Inference on 4x4 Tiles.
MICRO
Renzo Andri, Beatrice Bussolino, Antonio Cipolletta, Lukas Cavigelli, Zhe Wang
2022 J jnl
Identifying and Exploiting Sparse Branch Correlations for Optimizing Branch Prediction.
CoRR
Anastasios Zouzias, Kleovoulos Kalaitzidis, Konstantin Berestizshevsky, Renzo Andri, Leeor Peled, Zhe Wang
2022 J jnl
Sub-mW Keyword Spotting on an MCU: Analog Binary Feature Extraction and Binary Neural Networks.
CoRR
Gianmarco Cerutti, Lukas Cavigelli, Renzo Andri, Michele Magno, Elisabetta Farella, Luca Benini
2022 J jnl
Sub-mW Keyword Spotting on an MCU: Analog Binary Feature Extraction and Binary Neural Networks.
IEEE Trans. Circuits Syst. I Regul. Pap.
Gianmarco Cerutti, Lukas Cavigelli, Renzo Andri, Michele Magno, Elisabetta Farella, Luca Benini
2021 C conf
ChewBaccaNN: A Flexible 223 TOPS/W BNN Accelerator.
ISCAS
Renzo Andri, Geethan Karunaratne, Lukas Cavigelli, Luca Benini
2021 J jnl
RNN-Based Radio Resource Management on Multicore RISC-V Accelerator Architectures.
IEEE Trans. Very Large Scale Integr. Syst.
Gianna Paulin, Renzo Andri, Francesco Conti, Luca Benini
2021 J jnl
Sound Event Detection with Binary Neural Networks on Tightly Power-Constrained IoT Devices.
CoRR
Gianmarco Cerutti, Renzo Andri, Lukas Cavigelli, Michele Magno, Elisabetta Farella, Luca Benini
2020 J jnl
ChewBaccaNN: A Flexible 223 TOPS/W BNN Accelerator.
CoRR
Renzo Andri, Geethan Karunaratne, Lukas Cavigelli, Luca Benini
2020 A* conf
Extending the RISC-V ISA for Efficient RNN-based 5G Radio Resource Management.
DAC
Renzo Andri, Tomas Henriksson, Luca Benini
2020 — —
Machine learning acceleration for tightly energy-constrained devices.
Renzo Andri
2020 A conf
Sound event detection with binary neural networks on tightly power-constrained IoT devices.
ISLPED
Gianmarco Cerutti, Renzo Andri, Lukas Cavigelli, Elisabetta Farella, Michele Magno, Luca Benini
2019 J jnl
Hyperdrive: A Multi-Chip Systolically Scalable Binary-Weight CNN Inference Engine.
IEEE J. Emerg. Sel. Topics Circuits Syst.
Renzo Andri, Lukas Cavigelli, Davide Rossi, Luca Benini
2018 — conf
Hyperdrive: A Systolically Scalable Binary-Weight CNN Inference Engine for mW IoT End-Nodes.
ISVLSI
Renzo Andri, Lukas Cavigelli, Davide Rossi, Luca Benini
2018 J jnl
Hyperdrive: A Systolically Scalable Binary-Weight CNN Inference Engine for mW IoT End-Nodes.
CoRR
Renzo Andri, Lukas Cavigelli, Davide Rossi, Luca Benini
2018 J jnl
XNORBIN: A 95 TOp/s/W Hardware Accelerator for Binary Convolutional Neural Networks.
CoRR
Andrawes Al Bahou, Geethan Karunaratne, Renzo Andri, Lukas Cavigelli, Luca Benini
2018 — conf
XNORBIN: A 95 TOp/s/W hardware accelerator for binary convolutional neural networks.
COOL CHIPS
Andrawes Al Bahou, Geethan Karunaratne, Renzo Andri, Lukas Cavigelli, Luca Benini
2018 J jnl
YodaNN: An Architecture for Ultralow Power Binary-Weight CNN Acceleration.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Renzo Andri, Lukas Cavigelli, Davide Rossi, Luca Benini
2017 J jnl
Accelerated Visual Context Classification on a Low-Power Smartwatch.
IEEE Trans. Hum. Mach. Syst.
Francesco Conti, Daniele Palossi, Renzo Andri, Michele Magno, Luca Benini
2016 J jnl
InfiniTime: Multi-sensor wearable bracelet with human body harvesting.
Sustain. Comput. Informatics Syst.
Michele Magno, Davide Brunelli, Lukas Sigrist, Renzo Andri, Lukas Cavigelli, Andres Gomez, Luca Benini
2016 — conf
YodaNN: An Ultra-Low Power Convolutional Neural Network Accelerator Based on Binary Weights.
ISVLSI
Renzo Andri, Lukas Cavigelli, Davide Rossi, Luca Benini
2016 J jnl
YodaNN: An Ultra-Low Power Convolutional Neural Network Accelerator Based on Binary Weights.
CoRR
Renzo Andri, Lukas Cavigelli, Davide Rossi, Luca Benini
2015 — conf
Ultra-Low Power Context Recognition Fusing Sensor Data from an Energy-Neutral Smart Watch.
IoT 360 (2)
Michele Magno, Lukas Cavigelli, Renzo Andri, Luca Benini
2014 — conf
SIR10US: A tightly coupled elliptic-curve cryptography co-processor for the OpenRISC.
ASAP
Michael Gautschi, Michael Muehlberghuber, Andreas Traber, Sven Stucki, Matthias Baer, Renzo Andri, Luca Benini, Beat Muheim, Hubert Kaeslin