Renu Mehra

12 papers A* 1A 6Misc 1Journal 4
YearRankTypeTitle / Venue / Authors
2015 A conf
Message from the general chairs.
ISLPED
Luca Benini, Renu Mehra, Mauro Olivieri
2014 A ed.
International Symposium on Low Power Electronics and Design, ISLPED'14, La Jolla, CA, USA - August 11 - 13, 2014
ISLPED
Yuan Xie, Tanay Karnik, Muhammad M. Khellah, Renu Mehra
2012 A conf
Commercial low-power EDA tools: a review.
ISLPED
Renu Mehra
2012 A conf
Industry focus session on low-power design.
ISLPED
Clive Bittlestone, Jim Kardach, Renu Mehra, David Flynn, Barry M. Pangrle
2002 A* conf
RTL c-based methodology for designing and verifying a multi-threaded processor.
DAC
Luc Séméria, Renu Mehra, Barry M. Pangrle, Arjuna Ekanayake, Andrew Seawright, Daniel Ng
2000 A conf
Automating RT-Level Operand Isolation to Minimize Power Consumption in Datapaths.
DATE
Michael Münch, Norbert Wehn, Bernd Wurth, Renu Mehra, Jim Sproch
1997 J jnl
A partitioning scheme for optimizing interconnect power.
IEEE J. Solid State Circuits
Renu Mehra, Lisa M. Guerra, Jan M. Rabaey
1996 J jnl
An Integrated CAD Environment for Low-Power Design.
IEEE Des. Test Comput.
Paul E. Landman, Renu Mehra, Jan M. Rabaey
1996 A conf
Exploiting regularity for low-power design.
ICCAD
Renu Mehra, Jan M. Rabaey
1996 J jnl
Low-power architectural synthesis and the impact of exploiting locality.
J. VLSI Signal Process.
Renu Mehra, Lisa M. Guerra, Jan M. Rabaey
1995 Misc conf
Design guidance in the power dimension.
ICASSP
Jan M. Rabaey, Lisa M. Guerra, Renu Mehra
1995 J jnl
Optimizing power using transformations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Anantha P. Chandrakasan, Miodrag Potkonjak, Renu Mehra, Jan M. Rabaey, Robert W. Brodersen