Reiley Jeyapaul

22 papers A* 2A 1B 4C 1Misc 3Journal 9Unranked 2
YearRankTypeTitle / Venue / Authors
2024 B conf
Characterizing Soft-Error Resiliency in Arm's Ethos-U55 Embedded Machine Learning Accelerator.
ISPASS
Abhishek Tyagi, Reiley Jeyapaul, Chuteng Zhou, Paul N. Whatmough, Yuhao Zhu
2024 J jnl
Characterizing Soft-Error Resiliency in Arm's Ethos-U55 Embedded Machine Learning Accelerator.
CoRR
Abhishek Tyagi, Reiley Jeyapaul, Chuteng Zhu, Paul N. Whatmough, Yuhao Zhu
2020 J jnl
The gem5 Simulator: Version 20.0+.
CoRR
Jason Lowe-Power, Abdul Mutaal Ahmad, Ayaz Akram, Mohammad Alian, Rico Amslinger, Matteo Andreozzi, Adrià Armejach, Nils Asmussen, Srikant Bharadwaj, Gabe Black, Gedare Bloom, Bobby R. Bruce, Daniel Rodrigues Carvalho, Jerónimo Castrillón, Lizhong Chen, Nicolas Derumigny, Stephan Diestelhorst, Wendy Elsasser, Marjan Fariborz, Amin Farmahini Farahani, Pouya Fotouhi, Ryan Gambord, Jayneel Gandhi, Dibakar Gope, Thomas Grass, Bagus Hanindhito, Andreas Hansson, Swapnil Haria, Austin Harris, Timothy Hayes, Adrian Herrera, Matthew Horsnell, Syed Ali Raza Jafri, Radhika Jagtap, Hanhwi Jang, Reiley Jeyapaul, Timothy M. Jones, Matthias Jung, Subash Kannoth, Hamidreza Khaleghzadeh, Yuetsu Kodama, Tushar Krishna, Tommaso Marinelli, Christian Menard, Andrea Mondelli, Tiago Mück, Omar Naji, Krishnendra Nathella, Hoa Nguyen, Nikos Nikoleris, Lena E. Olson, Marc S. Orr, Binh Pham, Pablo Prieto, Trivikram Reddy, Alec Roelke, Mahyar Samani, Andreas Sandberg, Javier Setoain, Boris Shingarov, Matthew D. Sinclair, Tuan Ta, Rahul Thakur, Giacomo Travaglini, Michael Upton, Nilay Vaish, Ilias Vougioukas, Zhengrong Wang, Norbert Wehn, Christian Weis, David A. Wood, Hongil Yoon, Éder F. Zulian
2019 J jnl
Control Flow Checking or Not? (for Soft Errors).
ACM Trans. Embed. Comput. Syst.
Abhishek Rhisheekesan, Reiley Jeyapaul, Aviral Shrivastava
2018 A conf
LASER: A hardware/software approach to accelerate complicated loops on CGRAs.
DATE
Mahesh Balasubramanian, Shail Dave, Aviral Shrivastava, Reiley Jeyapaul
2017 J jnl
Protecting Caches from Soft Errors: A Microarchitect's Perspective.
ACM Trans. Embed. Comput. Syst.
Yohan Ko, Reiley Jeyapaul, YoungBin Kim, Kyoungwoo Lee, Aviral Shrivastava
2017 J jnl
Systematic Methodology for the Quantitative Analysis of Pipeline-Register Reliability.
IEEE Trans. Very Large Scale Integr. Syst.
Reiley Jeyapaul, Roberto Flores, Alfonso Ávila, Aviral Shrivastava
2016 — conf
gemV: A validated toolset for the early exploration of system reliability.
ASAP
Karthik Tanikella, Yohan Ko, Reiley Jeyapaul, Kyoungwoo Lee, Aviral Shrivastava
2015 J jnl
A Software Scheme for Multithreading on CGRAs.
ACM Trans. Embed. Comput. Syst.
Jared Pager, Reiley Jeyapaul, Aviral Shrivastava
2015 A* conf
Guidelines to design parity protected write-back L1 data cache.
DAC
Yohan Ko, Reiley Jeyapaul, YoungBin Kim, Kyoungwoo Lee, Aviral Shrivastava
2014 A* conf
Quantitative Analysis of Control Flow Checking Mechanisms for Soft Errors.
DAC
Aviral Shrivastava, Abhishek Rhisheekesan, Reiley Jeyapaul, Carole-Jean Wu
2014 J jnl
UnSync-CMP: Multicore CMP Architecture for Energy-Efficient Soft-Error Reliability.
IEEE Trans. Parallel Distributed Syst.
Reiley Jeyapaul, Fei Hong, Abhishek Rhisheekesan, Aviral Shrivastava, Kyoungwoo Lee
2013 J jnl
Enabling energy efficient reliability in embedded systems through smart cache cleaning.
ACM Trans. Design Autom. Electr. Syst.
Reiley Jeyapaul, Aviral Shrivastava
2012 Misc conf
Soft errors: the hardware-software interface.
CODES+ISSS
Kyoungwoo Lee, Aviral Shrivastava, Reiley Jeyapaul
2011 B conf
Enabling Multithreading on CGRAs.
ICPP
Aviral Shrivastava, Jared Pager, Reiley Jeyapaul, Mahdi Hamzeh, Sarma B. K. Vrudhula
2011 Misc conf
Smart cache cleaning: energy efficient vulnerability reduction in embedded processors.
CASES
Reiley Jeyapaul, Aviral Shrivastava
2011 B conf
UnSync: A Soft Error Resilient Redundant Multicore Architecture.
ICPP
Reiley Jeyapaul, Fei Hong, Abhishek Rhisheekesan, Aviral Shrivastava, Kyoungwoo Lee
2010 C conf
B2P2: bounds based procedure placement for instruction TLB power reduction in embedded systems.
SCOPES
Reiley Jeyapaul, Aviral Shrivastava
2010 B conf
Cache vulnerability equations for protecting data in embedded processor caches from soft errors.
LCTES
Aviral Shrivastava, Jongeun Lee, Reiley Jeyapaul
2010 J jnl
Code Transformations for TLB Power Reduction.
Int. J. Parallel Program.
Reiley Jeyapaul, Aviral Shrivastava
2009 Misc conf
Code Transformations for TLB Power Reduction.
VLSI Design
Reiley Jeyapaul, Sandeep Marathe, Aviral Shrivastava
2008 — conf
SPKM : A novel graph drawing based algorithm for application mapping onto coarse-grained reconfigurable architectures.
ASP-DAC
Jonghee W. Yoon, Aviral Shrivastava, Sanghyun Park, Minwook Ahn, Reiley Jeyapaul, Yunheung Paek