Rei-Fu Huang

23 papers A* 2A 5Misc 1Journal 6Unranked 9
YearRankTypeTitle / Venue / Authors
2015 A conf
Testing methods for quaternary content addressable memory using charge-sharing sensing scheme.
ITC
Hao-Yu Yang, Rei-Fu Huang, Chin-Lung Su, Kuan-Hong Lin, Hang-Kaung Shu, Chi-Wei Peng, Mango Chia-Tso Chao
2014 Misc conf
Testing methods for a write-assist disturbance-free dual-port SRAM.
VTS
Hao-Yu Yang, Chen-Wei Lin, Chao-Ying Huang, Ching-Ho Lu, Chen-An Lai, Mango Chia-Tso Chao, Rei-Fu Huang
2013 J jnl
Fault Models and Test Methods for Subthreshold SRAMs.
IEEE Trans. Computers
Chen-Wei Lin, Hung-Hsin Chen, Hao-Yu Yang, Chin-Yuan Huang, Mango Chia-Tso Chao, Rei-Fu Huang
2012 A* conf
Alternate hammering test for application-specific DRAMs and an industrial case study.
DAC
Rei-Fu Huang, Hao-Yu Yang, Mango Chia-Tso Chao, Shih-Chin Lin
2012 J jnl
Testing Methodology of Embedded DRAMs.
IEEE Trans. Very Large Scale Integr. Syst.
Hao-Yu Yang, Chi-Min Chang, Mango Chia-Tso Chao, Rei-Fu Huang, Shih-Chin Lin
2011 J jnl
A Built-in Self-Diagnosis and Repair Design With Fail Pattern Identification for Memories.
IEEE Trans. Very Large Scale Integr. Syst.
Chin-Lung Su, Rei-Fu Huang, Cheng-Wen Wu, Kun-Lun Luo, Wen Ching Wu
2010 A conf
Fault models and test methods for subthreshold SRAMs.
ITC
Chen-Wei Lin, Hung-Hsin Chen, Hao-Yu Yang, Mango Chia-Tso Chao, Rei-Fu Huang
2009 A* conf
Fault models for embedded-DRAM macros.
DAC
Mango Chia-Tso Chao, Hao-Yu Yang, Rei-Fu Huang, Shih-Chin Lin, Ching-Yu Chin
2008 A conf
Testing Methodology of Embedded DRAMs.
ITC
Chi-Min Chang, Mango Chia-Tso Chao, Rei-Fu Huang, Ding-Yuan Chen
2007 J jnl
Economic Aspects of Memory Built-in Self-Repair.
IEEE Des. Test Comput.
Rei-Fu Huang, Chao-Hsun Chen, Cheng-Wen Wu
2007 J jnl
Raisin: Redundancy Analysis Algorithm Simulation.
IEEE Des. Test Comput.
Rei-Fu Huang, Jin-Fu Li, Jen-Chieh Yeh, Cheng-Wen Wu
2005 J jnl
A built-in self-repair design for RAMs with 2-D redundancy.
IEEE Trans. Very Large Scale Integr. Syst.
Jin-Fu Li, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen Wu
2004 — conf
A Parallel Built-in Diagnostic Scheme for Multiple Embedded Memories.
MTDT
Li-Ming Denq, Rei-Fu Huang, Cheng-Wen Wu, Yeong-Jar Chang, Wen Ching Wu
2004 — conf
Fail Pattern Identification for Memory Built-In Self-Repair.
Asian Test Symposium
Rei-Fu Huang, Chin-Lung Su, Cheng-Wen Wu, Shen-Tien Lin, Kun-Lun Luo, Yeong-Jar Chang
2004 A conf
MRAM Defect Analysis and Fault Modeli.
ITC
Chin-Lung Su, Rei-Fu Huang, Cheng-Wen Wu, Chien-Chung Hung, Ming-Jer Kao, Yeong-Jar Chang, Wen Ching Wu
2004 — conf
On Test and Diagnostics of Flash Memories.
Asian Test Symposium
Chih-Tsun Huang, Jen-Chieh Yeh, Yuan-Yuan Shih, Rei-Fu Huang, Cheng-Wen Wu
2004 — conf
SRAM delay fault modeling and test algorithm development.
ASP-DAC
Rei-Fu Huang, Yan-Ting Lai, Yung-Fa Chou, Cheng-Wen Wu
2003 A conf
A Built-In Self-Repair Scheme for Semiconductor Memories with 2-D Redundancy.
ITC
Jin-Fu Li, Jen-Chieh Yeh, Rei-Fu Huang, Cheng-Wen Wu, Peir-Yuan Tsai, Archer Hsu, Eugene Chow
2003 — conf
A Processor-Based Built-In Self-Repair Design for Embedded Memories.
Asian Test Symposium
Chin-Lung Su, Rei-Fu Huang, Cheng-Wen Wu
2003 — conf
A Testability-Driven Optimizer and Wrapper Generator for Embedded Memories.
MTDT
Rei-Fu Huang, Li-Ming Denq, Cheng-Wen Wu, Jin-Fu Li
2003 — conf
Defect Oriented Fault Analysis for SRAM.
Asian Test Symposium
Rei-Fu Huang, Yung-Fa Chou, Cheng-Wen Wu
2002 — conf
A Simulator for E aluating Redundancy Analysis Algorithms of Repairable Embedded Memories.
IOLTW
Rei-Fu Huang, Jin-Fu Li, Jen-Chieh Yeh, Cheng-Wen Wu
2002 — conf
A Simulator for Evaluating Redundancy Analysis Algorithms of Repairable Embedded Memories.
MTDT
Rei-Fu Huang, Jin-Fu Li, Jen-Chieh Yeh, Cheng-Wen Wu