Razvan Nane

25 papers B 1C 3Journal 11Unranked 9
YearRankTypeTitle / Venue / Authors
2023 J jnl
An Evaluation and Comparison of GPU Hardware and Solver Libraries for Accelerating the OPM Flow Reservoir Simulator.
CoRR
Tong Dong Qiu, Andreas Thune, Markus Blatt, Alf Birger Rustad, Razvan Nane
2022 J jnl
Hardware Acceleration of High-Performance Computational Flow Dynamics Using High-Bandwidth Memory-Enabled Field-Programmable Gate Arrays.
ACM Trans. Reconfigurable Technol. Syst.
Tom Hogervorst, Razvan Nane, Giacomo Marchiori, Tong Dong Qiu, Markus Blatt, Alf Birger Rustad
2022 J jnl
OpenQL: A Portable Quantum Programming Framework for Quantum Accelerators.
ACM J. Emerg. Technol. Comput. Syst.
Nader Khammassi, Imran Ashraf, J. van Someren, Razvan Nane, Anna M. Krol, M. A. Rol, Lingling Lao, Koen Bertels, Carmen G. Almudéver
2022 J jnl
SDC-based Resource Constrained Scheduling for Quantum Control Architectures.
CoRR
Razvan Nane
2021 J jnl
Hardware Acceleration of HPC Computational Flow Dynamics using HBM-enabled FPGAs.
CoRR
Tom Hogervorst, Tong Dong Qiu, Giacomo Marchiori, Alf Birger Rustad, Markus Blatt, Razvan Nane
2020 J jnl
OpenQL : A Portable Quantum Programming Framework for Quantum Accelerators.
CoRR
Nader Khammassi, Imran Ashraf, J. van Someren, Razvan Nane, Anna M. Krol, M. Adriaan Rol, Lingling Lao, Koen Bertels, Carmen G. Almudéver
2020 J jnl
Skeleton-Based Synthesis Flow for Computation-in-Memory Architectures.
IEEE Trans. Emerg. Top. Comput.
Jintao Yu, Razvan Nane, Imran Ashraf, Mottaqiallah Taouil, Said Hamdioui, Henk Corporaal, Koen Bertels
2019 — conf
Sparstition: A Partitioning Scheme for Large-Scale Sparse Matrix Vector Multiplication on FPGA.
ASAP
Björn Sigurbergsson, Tom Hogervorst, Tong Dong Qiu, Razvan Nane
2017 — conf
A Domain-Specific Language and Compiler for Computation-in-Memory Skeletons.
ACM Great Lakes Symposium on VLSI
Jintao Yu, Tom Hogervorst, Razvan Nane
2017 J jnl
On the Implementation of Computation-in-Memory Parallel Adder.
IEEE Trans. Very Large Scale Integr. Syst.
Hoang Anh Du Nguyen, Lei Xie, Mottaqiallah Taouil, Razvan Nane, Said Hamdioui, Koen Bertels
2016 J jnl
A Survey and Evaluation of FPGA High-Level Synthesis Tools.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Razvan Nane, Vlad Mihai Sima, Christian Pilato, Jongsok Choi, Blair Fort, Andrew Canis, Yu Ting Chen, Hsuan Hsiao, Stephen Brown, Fabrizio Ferrandi, Jason Helge Anderson, Koen Bertels
2016 C conf
An Image Processing VLIW Architecture for Real-Time Depth Detection.
SBAC-PAD
Dan Iorga, Razvan Nane, Yi Lu, Edwin van Dalen, Koen Bertels
2016 — conf
Parallel matrix multiplication on memristor-based computation-in-memory architecture.
HPCS
Adib Haron, Jintao Yu, Razvan Nane, Mottaqiallah Taouil, Said Hamdioui, Koen Bertels
2016 — conf
Skeleton-based design and simulation flow for Computation-in-Memory architectures.
NANOARCH
Jintao Yu, Razvan Nane, Adib Haron, Said Hamdioui, Henk Corporaal, Koen Bertels
2015 — conf
Computation-in-memory based parallel adder.
NANOARCH
Hoang Anh Du Nguyen, Lei Xie, Mottaqiallah Taouil, Razvan Nane, Said Hamdioui, Koen Bertels
2015 C conf
Low-Cost Software Control-Flow Error Recovery.
DSD
Ghazaleh Nazarian, Razvan Nane, Georgi Gaydadjiev
2014 — —
Automatic Hardware Generation for Reconfigurable Architectures.
Razvan Nane
2014 C conf
High-Level Synthesis in the Delft Workbench Hardware/Software Co-design Tool-Chain.
EUC
Razvan Nane, Vlad Mihai Sima, Cuong Pham-Quoc, Fernando M. Gonçalves, Koen Bertels
2013 J jnl
Controlling a complete hardware synthesis toolchain with LARA aspects.
Microprocess. Microsystems
João M. P. Cardoso, Tiago Carvalho, José Gabriel F. Coutinho, Ricardo Nobre, Razvan Nane, Pedro C. Diniz, Zlatko Petrov, Wayne Luk, Koen Bertels
2013 — conf
Deriving Resource Efficient Designs Using the REFLECT Aspect-Oriented Approach - (Extended Abstract).
ARC
José Gabriel F. Coutinho, João M. P. Cardoso, Tiago Carvalho, Ricardo Nobre, Sujit Bhattacharya, Pedro C. Diniz, Liam Fitzpatrick, Razvan Nane
2013 J jnl
Quipu: A Statistical Model for Predicting Hardware Resources.
ACM Trans. Reconfigurable Technol. Syst.
Roel Meeuws, Sayyed Arash Ostadzadeh, Carlo Galuzzi, Vlad Mihai Sima, Razvan Nane, Koen Bertels
2012 — conf
A lightweight speculative and predicative scheme for hardware execution.
ReConFig
Razvan Nane, Vlad Mihai Sima, Koen Bertels
2012 — conf
Area constraint propagation in high level synthesis.
FPT
Razvan Nane, Vlad Mihai Sima, Koen Bertels
2012 B conf
DWARV 2.0: A CoSy-based C-to-VHDL hardware compiler.
FPL
Razvan Nane, Vlad Mihai Sima, Bryan Olivier, Roel Meeuws, Yana Yankova, Koen Bertels
2011 — conf
IP-XACT extensions for Reconfigurable Computing.
ASAP
Razvan Nane, Sven van Haastregt, Todor P. Stefanov, Bart Kienhuis, Vlad Mihai Sima, Koen Bertels