Raymond R. Hoare

25 papers A* 1A 9C 1Misc 3Journal 7Unranked 4

Year	Rank	Type	Title / Venue / Authors
2014	—	`conf`	Accelerating SAR processing on COTS FPGA hardware using C-to-gates design tools. HPEC Raymond R. Hoare, Denis Smetana
2008	A	`conf`	A CAM-based intrusion detection system for single-packet attack detection. IPDPS Ying Yu, Raymond R. Hoare, Alex K. Jones
2008	J	`jnl`	A two-stage hardware scheduler combining greedy and optimal scheduling. J. Parallel Distributed Comput. Raymond R. Hoare, Zhu Ding, Alex K. Jones
2008	J	`jnl`	Radio frequency identification prototyping. ACM Trans. Design Autom. Electr. Syst. Alex K. Jones, Swapna R. Dontharaju, Shen Chih Tung, Leonid Mats, Peter J. Hawrylak, Raymond R. Hoare, James T. Cain, Marlin H. Mickle
2007	A	`conf`	Linking Compilation and Visualization for Massively Parallel Programs. IPDPS Alex K. Jones, Raymond R. Hoare, Joseph St. Onge, Joshua M. Lucas, Shuyi Shao, Rami G. Melhem
2006	Misc	`conf`	A Field Programmable RFID Tag and Associated Design Flow. FCCM Alex K. Jones, Raymond R. Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle
2006	Misc	`conf`	A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture. FCCM Gayatri Mehta, Raymond R. Hoare, Justin Stander, Alex K. Jones
2006	J	`jnl`	A Low-Energy Reconfigurable Fabric for the SuperCISC Architecture. J. Low Power Electron. Gayatri Mehta, Justin Stander, Joshua M. Lucas, Raymond R. Hoare, Brady Hunsaker, Alex K. Jones
2006	J	`jnl`	A VLIW Processor With Hardware Functions: Increasing Performance While Reducing Power. IEEE Trans. Circuits Syst. II Express Briefs Alex K. Jones, Raymond R. Hoare, Dara Kusic, Justin Stander, Gayatri Mehta, Joshua Fazekas
2006	C	`conf`	A hybrid encoding scheme for efficient single-cycle range matching in content addressable memory. ISCAS Ying Yu, Raymond R. Hoare, Alex K. Jones, Ralph Sprang
2006	A*	`conf`	An automated, reconfigurable, low-power RFID tag. DAC Alex K. Jones, Raymond R. Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle
2006	A	`conf`	Design space exploration for low-power reconfigurable fabrics. IPDPS Gayatri Mehta, Raymond R. Hoare, Justin Stander, Alex K. Jones
2006	A	`conf`	Interconnect routing and scheduling - A near-optimal real-time hardware scheduler for large cardinality crossbar switches. SC Raymond R. Hoare, Zhu Ding, Alex K. Jones
2006	A	`conf`	Interconnect routing and scheduling - Level-wise scheduling algorithm for fat tree interconnection networks. SC Zhu Ding, Raymond R. Hoare, Alex K. Jones, Rami G. Melhem
2006	J	`jnl`	Passive active radio frequency identification tags. Int. J. Radio Freq. Identif. Technol. Appl. Alex K. Jones, Swapna R. Dontharaju, Shen Chih Tung, Peter J. Hawrylak, Leonid Mats, Raymond R. Hoare, James T. Cain, Marlin H. Mickle
2006	J	`jnl`	Rapid VLIW Processor Customization for Signal Processing Applications Using Combinational Hardware Functions. EURASIP J. Adv. Signal Process. Raymond R. Hoare, Alex K. Jones, Dara Kusic, Joshua Fazekas, John Foster, Shen Chih Tung, Michael L. McCloud
2006	A	`conf`	Speech silicon AM: an FPGA-based acoustic modeling pipeline for hidden Markov model based speech recognition. IPDPS Jeffrey William Schuster, Kshitij Gupta, Raymond R. Hoare
2006	Misc	`conf`	Technology Mapping for Field Programmable Gate Arrays using Content-Addressable Memory (CAM). FCCM Raymond R. Hoare, Ivan S. Kourtev, Alex K. Jones
2005	J	`jnl`	A framework for the design, synthesis and cycle-accurate simulation of multiprocessor networks. J. Parallel Distributed Comput. Raymond R. Hoare, Zhu Ding, Shen Chih Tung, Rami G. Melhem, Alex K. Jones
2005	A	`conf`	On the Feasibility of Optical Circuit Switching for High Performance Computing Systems. SC Kevin J. Barker, Alan F. Benner, Raymond R. Hoare, Adolfy Hoisie, Alex K. Jones, Darren J. Kerbyson, Dan Li, Rami G. Melhem, Ramakrishnan Rajamony, Eugen Schenfeld, Shuyi Shao, Craig B. Stunkel, Peter Walker
2005	A	`conf`	Switch Design to Enable Predictive Multiplexed Switching in Multiprocessor Networks. IPDPS Zhu Ding, Raymond R. Hoare, Alex K. Jones, Dan Li, Shou-Kuo Shao, Shen-Chien Tung, Jiang Zheng, Rami G. Melhem
2004	—	`conf`	LURU: global-scope FPGA technology mapping with content-addressable memories. ICECS Joshua M. Lucas, Raymond R. Hoare, Ivan S. Kourtev, Alex K. Jones
2003	—	`conf`	Short Courses in System-on-a-Chip (SoC) Design. MSE Ivan S. Kourtev, Raymond R. Hoare, Steven P. Levitan, Tom Cain, Bruce R. Childers, Donald M. Chiarulli, David L. Landis
2002	—	`conf`	A Width Expansion of MMX/SIMD Processing Architecture on an FPGA. IASTED PDCS Raymond R. Hoare, D. Swope, S. Bailey
2001	A	`conf`	Cyclical Cascade Chains: A Dynamic Barrier Synchronization Mechanism for Multiprocessor Systems. IPDPS Troy A. Johnson, Raymond R. Hoare