Ravishankar Rao

22 papers A* 3A 7Misc 4Journal 5Unranked 3

Year	Rank	Type	Title / Venue / Authors
2009	J	`jnl`	Fast and Accurate Prediction of the Steady-State Throughput of Multicore Processors Under Thermal Constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ravishankar Rao, Sarma B. K. Vrudhula
2009	A*	`conf`	Throughput optimal task allocation under thermal constraints for multi-core processors. DAC Vinay Hanumaiah, Ravishankar Rao, Sarma B. K. Vrudhula, Karam S. Chatha
2008	A	`conf`	Analytical results for design space exploration of multi-core processors employing thread migration. ISLPED Ravishankar Rao, Sarma B. K. Vrudhula, Krzysztof S. Berezowski
2008	A	`conf`	Efficient online computation of core speeds to maximize the throughput of thermally constrained multi-core processors. ICCAD Ravishankar Rao, Sarma B. K. Vrudhula
2007	J	`jnl`	Energy optimal speed control of a producer-consumer device pair. ACM Trans. Embed. Comput. Syst. Ravishankar Rao, Sarma B. K. Vrudhula
2007	Misc	`conf`	Performance optimal processor throttling under thermal constraints. CASES Ravishankar Rao, Sarma B. K. Vrudhula
2007	A	`conf`	Throughput of multi-core processors under thermal constraints. ISLPED Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Chakrabarti
2006	A	`conf`	An optimal analytical solution for processor speed control with thermal constraints. ISLPED Ravishankar Rao, Sarma B. K. Vrudhula, Chaitali Chakrabarti, Naehyuck Chang
2006	J	`jnl`	Energy-Optimal Speed Control of a Generic Device. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ravishankar Rao, Sarma B. K. Vrudhula
2006	Misc	`conf`	Segmented Bitline Cache: Exploiting Non-uniform Memory Access Patterns. HiPC Ravishankar Rao, Justin Wenck, Diana Franklin, Rajeevan Amirtharajah, Venkatesh Akella
2006	J	`jnl`	Synchroscalar: Evaluation of an embedded, multi-core architecture for media applications. J. Embed. Comput. John Y. Oliver, Ravishankar Rao, Diana Franklin, Frederic T. Chong, Venkatesh Akella
2006	—	`conf`	Tile size selection for low-power tile-based architectures. Conf. Computing Frontiers John Y. Oliver, Ravishankar Rao, Michael Brown, Jennifer Mankin, Diana Franklin, Frederic T. Chong, Venkatesh Akella
2005	—	`conf`	An efficient combinationality check technique for the synthesis of cyclic combinational circuits. ASP-DAC Vineet Agarwal, Navneeth Kankani, Ravishankar Rao, Sarvesh Bhardwaj, Janet Meiling Wang
2005	A	`conf`	Battery optimization vs energy optimization: which to choose and when? ICCAD Ravishankar Rao, Sarma B. K. Vrudhula
2005	A*	`conf`	Energy optimal speed control of devices with discrete speed sets. DAC Ravishankar Rao, Sarma B. K. Vrudhula
2004	Misc	`conf`	Disk drive energy optimization for audio-video applications. CASES Ravishankar Rao, Sarma B. K. Vrudhula, Musaravakkam S. Krishnan
2004	A	`conf`	Energy optimization for a two-device data flow chain. ICCAD Ravishankar Rao, Sarma B. K. Vrudhula
2004	A*	`conf`	Synchroscalar: A Multiple Clock Domain, Power-Aware, Tile-Based Embedded Processor. ISCA John Y. Oliver, Ravishankar Rao, Paul Sultana, Jedidiah R. Crandall, Erik Czernikowski, Leslie W. Jones IV, Diana Franklin, Venkatesh Akella, Frederic T. Chong
2003	A	`conf`	Analysis of discharge techniques for multiple battery systems. ISLPED Ravishankar Rao, Sarma B. K. Vrudhula, Daler N. Rakhmatov
2003	J	`jnl`	Battery Modeling for Energy-Aware System Design. Computer Ravishankar Rao, Sarma B. K. Vrudhula, Daler N. Rakhmatov
2003	—	`conf`	Synchroscalar: Initial Lessons in Power-Aware Design of a Tile-Based Embedded Architecture. PACS John Y. Oliver, Ravishankar Rao, Paul Sultana, Jedidiah R. Crandall, Erik Czernikowski, Leslie W. Jones IV, Dean Copsey, Diana Keen, Venkatesh Akella, Frederic T. Chong
2002	Misc	`conf`	HLSpower: Hybrid Statistical Modeling of the Superscalar Power-Performance Design Space. HiPC Ravishankar Rao, Mark Oskin, Frederic T. Chong