Rao Desineni

11 papers A* 1A 7Misc 1Journal 2
YearRankTypeTitle / Venue / Authors
2016 A conf
Pylon: Towards an integrated customizable volume diagnosis infrastructure.
ITC
Yan Pan, Rao Desineni, Kannan Sekar, Atul Chittora, Sherwin Fernandes, Neerja Bawaskar, John M. Carulli
2013 J jnl
Deriving Feature Fail Rate from Silicon Volume Diagnostics Data.
IEEE Des. Test
Shobhit Malik, Thomas Herrmann, Sriram Madhavan, Rao Desineni, Chris Schuermyer, Geir Eide
2010 A conf
Hard to find, easy to find systematics; just find them.
ITC
Rao Desineni, Leah Pastel, Maroun Kassab, Robert Redburn
2006 A conf
A Logic Diagnosis Methodology for Improved Localization and Extraction of Accurate Defect Behavior.
ITC
Rao Desineni, Osei Poku, Ronald D. Blanton
2006 J jnl
Defect Modeling Using Fault Tuples.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Ronald D. Blanton, Kumar N. Dwarakanath, Rao Desineni
2006 A conf
Extraction of defect density and size distributions from wafer sort test results.
DATE
Jeffrey E. Nelson, Thomas Zanon, Rao Desineni, Jason G. Brown, N. Patil, Wojciech Maly, R. D. (Shawn) Blanton
2006 A* conf
Multiple-detect ATPG based on physical neighborhoods.
DAC
Jeffrey E. Nelson, Jason G. Brown, Rao Desineni, R. D. (Shawn) Blanton
2005 Misc conf
Diagnosis of Arbitrary Defects Using Neighborhood Function Extraction.
VTS
Rao Desineni, R. D. (Shawn) Blanton
2004 A conf
Benchmarking Diagnosis Algorithms With a Diverse Set of IC Deformations.
ITC
Thomas J. Vogels, Thomas Zanon, Rao Desineni, R. D. (Shawn) Blanton, Wojciech Maly, Jason G. Brown, Jeffrey E. Nelson, Y. Fei, X. Huang, Padmini Gopalakrishnan, Mahim Mishra, Vyacheslav Rovner, S. Tiwary
2002 A conf
Fault Tuples in Diagnosis of Deep-Submicron Circuits.
ITC
Ronald D. Blanton, John T. Chen, Rao Desineni, Kumar N. Dwarakanath, Wojciech Maly, Thomas J. Vogels
2000 A conf
Universal test generation using fault tuples.
ITC
Rao Desineni, Kumar N. Dwarakanath, Ronald D. Blanton