Randy Huang - RankMe

16 papers A 5B 1Misc 2Journal 6Unranked 2

Year	Rank	Type	Title / Venue / Authors
2024	J	`jnl`	Counterfactual Explanation Analytics: Empowering Lay Users to Take Action Against Consequential Automated Decisions. Proc. VLDB Endow. Peter M. VanNostrand, Dennis M. Hofmann, Lei Ma, Belisha Genin, Randy Huang, Elke A. Rundensteiner
2024	—	`conf`	Distributed Training of Large Language Models on AWS Trainium. SoCC Xinwei Fu, Zhen Zhang, Haozheng Fan, Guangtai Huang, Mohammad El-Shabani, Randy Huang, Rahul Solanki, Fei Wu, Ron Diamant, Yida Wang
2023	J	`jnl`	Target-independent XLA optimization using Reinforcement Learning. CoRR Milan Ganai, Haichen Li, Theodore Enns, Yida Wang, Randy Huang
2022	J	`jnl`	Can You Win Everything with A Lottery Ticket? Trans. Mach. Learn. Res. Tianlong Chen, Zhenyu Zhang, Jun Wu, Randy Huang, Sijia Liu, Shiyu Chang, Zhangyang Wang
2020	J	`jnl`	Optimizing Memory-Access Patterns for Deep Learning Accelerators. CoRR Hongbin Zheng, Sejong Oh, Huiqing Wang, Preston Briggs, Jiading Gai, Animesh Jain, Yizhi Liu, Rich Heaton, Randy Huang, Yida Wang
2017	—	`conf`	Application of convolutional neural networks on Intel® Xeon® processor with integrated FPGA. HPEC Philip Colangelo, Enno Lübbers, Randy Huang, Martin Margala, Kevin Nealis
2017	A	`conf`	Can FPGAs Beat GPUs in Accelerating Next-Generation Deep Neural Networks? FPGA Eriko Nurvitadhi, Ganesh Venkatesh, Jaewoong Sim, Debbie Marr, Randy Huang, Jason Ong Gee Hock, Yeong Tat Liew, Krishnan Srivatsan, Duncan J. M. Moss, Suchit Subhaschandra, Guy Boudoukh
2017	Misc	`conf`	Fine-Grained Acceleration of Binary Neural Networks Using Intel® Xeon® Processor with Integrated FPGA. FCCM Philip Colangelo, Randy Huang, Enno Lübbers, Martin Margala, Kevin Nealis
2016	A	`conf`	Dissecting Xeon + FPGA: Why the integration of CPUs and FPGAs makes a power difference for the datacenter: Invited Paper. ISLPED Herman Schmit, Randy Huang
2006	J	`jnl`	Stochastic spatial routing for reconfigurable networks. Microprocess. Microsystems André DeHon, Randy Huang, John Wawrzynek
2006	J	`jnl`	Stream computations organized for reconfigurable execution. Microprocess. Microsystems André DeHon, Yury Markovsky, Eylon Caspi, Michael Chu, Randy Huang, Stylianos Perissakis, Laura Pozzi, Joseph Yeh, John Wawrzynek
2003	A	`conf`	Stochastic, spatial routing for hypergraphs, trees, and meshes. FPGA Randy Huang, John Wawrzynek, André DeHon
2002	A	`conf`	Analysis of quasi-static scheduling techniques in a virtualized reconfigurable machine. FPGA Yury Markovsky, Eylon Caspi, Randy Huang, Joseph Yeh, Michael Chu, John Wawrzynek, André DeHon
2002	Misc	`conf`	Hardware-Assisted Fast Routing. FCCM André DeHon, Randy Huang, John Wawrzynek
2000	B	`conf`	Stream Computations Organized for Reconfigurable Execution (SCORE). FPL Eylon Caspi, Michael Chu, Randy Huang, Joseph Yeh, John Wawrzynek, André DeHon
1999	A	`conf`	HSRA: High-Speed, Hierarchical Synchroous Reconfigurable Array. FPGA William Tsu, Kip Macy, Atul Joshi, Randy Huang, Norman Walker, Tony Tung, Omid Rowhani, George Varghese, John Wawrzynek, André DeHon