Ramyanshu Datta

13 papers A 4B 1Misc 1Journal 3Unranked 4
YearRankTypeTitle / Venue / Authors
2010 — conf
Case studies of mixed-signal DFT.
ISQED
Ramyanshu Datta, Mahit Warhadpande, Dale Heaton, S. Aarthi, Ram Jonnavithula
2010 J jnl
On-Chip Delay Measurement Based Response Analysis for Timing Characterization.
J. Electron. Test.
Ramyanshu Datta, Antony Sebastine, Ashwin Raghunathan, Gary D. Carpenter, Kevin J. Nowka, Jacob A. Abraham
2009 A conf
A novel architecture for on-chip path delay measurement.
ITC
Xiaoxiao Wang, Mohammad Tehranipoor, Ramyanshu Datta
2008 J jnl
Controllability of Static CMOS Circuits for Timing Characterization.
J. Electron. Test.
Ramyanshu Datta, Ravi Gupta, Antony Sebastine, Jacob A. Abraham, Manuel A. d'Abreu
2008 A conf
Path-RO: a novel on-chip critical path delay measurement under process variations.
ICCAD
Xiaoxiao Wang, Mohammad Tehranipoor, Ramyanshu Datta
2008 J jnl
Performance-Optimized Design for Parametric Reliability.
J. Electron. Test.
Ramyanshu Datta, Jacob A. Abraham, Abdulkadir Utku Diril, Abhijit Chatterjee, Kevin J. Nowka
2006 Misc conf
A Scheme for On-Chip Timing Characterization.
VTS
Ramyanshu Datta, Gary D. Carpenter, Kevin J. Nowka, Jacob A. Abraham
2006 — conf
Adaptive Design for Performance-Optimized Robustness.
DFT
Ramyanshu Datta, Jacob A. Abraham, Abdulkadir Utku Diril, Abhijit Chatterjee, Kevin J. Nowka
2005 A conf
Testing and debugging delay faults in dynamic circuits.
ITC
Ramyanshu Datta, Sani R. Nassif, Robert K. Montoye, Jacob A. Abraham
2004 — conf
A low latency and low power dynamic Carry Save Adder.
ISCAS (2)
Ramyanshu Datta, Jacob A. Abraham, Robert K. Montoye, Wendy Belluomini, Hung C. Ngo, Chandler McDowell, Jente B. Kuang, Kevin J. Nowka
2004 B conf
Delay fault testing and silicon debug using scan chains.
ETS
Ramyanshu Datta, Antony Sebastine, Jacob A. Abraham
2004 — conf
On-chip delay measurement for silicon debug.
ACM Great Lakes Symposium on VLSI
Ramyanshu Datta, Antony Sebastine, Ashwin Raghunathan, Jacob A. Abraham
2004 A conf
Tri-Scan: A Novel DFT Technique for CMOS Path Delay Fault Testing.
ITC
Ramyanshu Datta, Ravi Gupta, Antony Sebastine, Jacob A. Abraham, Manuel A. d'Abreu