Ramaswami Dandapani

13 papers A 6Misc 2Journal 5

Year	Rank	Type	Title / Venue / Authors
2002	A	`conf`	An Implementation of IEEE 1149.1 to Avoid Timing Violations and Other Practical In-Compliance Improvements. ITC Dave Stang, Ramaswami Dandapani
1995	A	`conf`	Integration of IEEE Std. 1149.1 and Mixed-Signal Test Architectures. ITC David J. Cheek, Ramaswami Dandapani
1994	Misc	`conf`	Coverage metrics for functional tests. VTS John R. Wallack, Ramaswami Dandapani
1994	A	`conf`	Structure and Metrology for a Single-wire Analog. ITC Yunsheng Lu, Weiwei Mao, Ramaswami Dandapani, Ravi K. Gulati
1993	Misc	`conf`	Hard faults diagnosis in analog circuits using sensitivity analysis. VTS Yunsheng Lu, Ramaswami Dandapani
1990	A	`conf`	Bridging faults and their implication to PLAs. ITC V. Chandramouli, Ravi K. Gulati, Ramaswami Dandapani, Deepak K. Goel
1988	A	`conf`	Built-in self-test for large embedded CMOS folded PLAs. ICCAD Ramaswami Dandapani, Ravi K. Gulati, Deepak K. Goel
1987	J	`jnl`	Scan Design Using Standard Flip-Flops. IEEE Des. Test Sudhakar M. Reddy, Ramaswami Dandapani
1986	J	`jnl`	An Alternative to Scan Design Methods for Sequential Machines. IEEE Trans. Computers Kewal K. Saluja, Ramaswami Dandapani
1986	J	`jnl`	Testable Design of Single-Output Sequential Machines Using Checking Experiments. IEEE Trans. Computers Kewal K. Saluja, Ramaswami Dandapani
1984	A	`conf`	Design of Test Pattern Generators for Built-In Test. ITC Ramaswami Dandapani, Janak H. Patel, Jacob A. Abraham
1974	J	`jnl`	On the Design of Logic Networks with Redundancy and Testability Considerations. IEEE Trans. Computers Ramaswami Dandapani, Sudhakar M. Reddy
1973	J	`jnl`	Derivation of Minimal Test Sets for Monotonic Logic Circuits. IEEE Trans. Computers Ramaswami Dandapani