Ramachandra Achar

Year	Rank	Type	Title / Venue / Authors
2024	—	`conf`	Recognition of Electronic Component Orientations from Hand-Drawn Circuit Schematics through a Two Stage Machine Learning System. NewCAS Anuj Mathur, Ramachandra Achar
2024	J	`jnl`	cuTraNTT: A Novel Transposed Number Theoretic Transform Targeting Low Latency Homomorphic Encryption for IoT Applications. IACR Cryptol. ePrint Arch. Supriya Adhikary, Wai-Kong Lee, Angshuman Karmakar, Yongwoo Lee, Seong Oun Hwang, Ramachandra Achar
2023	—	`conf`	PSIJ Transfer Function Response Prediction via NARNET and KBNNs. NEWCAS Ahsan Javaid, Ramachandra Achar
2022	J	`jnl`	Algorithmic Advancements and a Comparative Investigation of Left and Right Looking Sparse LU Factorization on GPU Platform for Circuit Simulation. IEEE Access Wai-Kong Lee, Ramachandra Achar
2022	J	`jnl`	DPCrypto: Acceleration of Post-Quantum Cryptography Using Dot-Product Instructions on GPUs. IEEE Trans. Circuits Syst. I Regul. Pap. Wai-Kong Lee, Hwajeong Seo, Seong Oun Hwang, Ramachandra Achar, Angshuman Karmakar, Jose Maria Bermudo Mera
2022	J	`jnl`	Novel Observations and Physical Insights on PSIJ Behavior in CMOS Chain-of-Inverters. IEEE Access Muhammed Suhail Illikkal, Jai Narayan Tripathi, Vijender Kumar Sharma, Hitesh Shrimali, Ramachandra Achar
2021	J	`jnl`	DPCrypto: Acceleration of Post-quantum Cryptographic Algorithms using Dot-Product Instruction on GPUs. IACR Cryptol. ePrint Arch. Wai-Kong Lee, Hwajeong Seo, Seong Oun Hwang, Angshuman Karmakar, Jose Maria Bermudo Mera, Ramachandra Achar
2021	J	`jnl`	GPU-Accelerated Adaptive PCBSO Mode-Based Hybrid RLA for Sparse LU Factorization in Circuit Simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Wai-Kong Lee, Ramachandra Achar
2020	—	`conf`	A Comparative Study of MAGMA and cuBLAS Libraries for GPU based Vector Fitting. LASCAS Srinidhi Ganeshan, Naveen Kumar Elumalai, Ramachandra Achar
2020	J	`jnl`	An energy efficient FPGA partial reconfiguration based micro-architectural technique for IoT applications. Microprocess. Microsystems Wei Pau Kiat, Kai Ming Mok, Wai-Kong Lee, Hock Guan Goh, Ramachandra Achar
2019	—	`conf`	A Segmentation Algorithm for Capacitively Loaded Planar Resonant Structures. LASCAS Ihsan Erdin, Ramachandra Achar
2019	J	`jnl`	A Thomas Algorithm-Based Generic Approach for Modeling of Power Supply Induced Jitter in CMOS Buffers. IEEE Access Jai Narayan Tripathi, Muhammed Suhail Illikkal, Hitesh Shrimali, Ramachandra Achar
2018	J	`jnl`	Dynamic GPU Parallel Sparse LU Factorization for Fast Circuit Simulation. IEEE Trans. Very Large Scale Integr. Syst. Wai-Kong Lee, Ramachandra Achar, Michel S. Nakhla
2018	J	`jnl`	Fast Analysis of Time Interval Error in Current-Mode Drivers. IEEE Trans. Very Large Scale Integr. Syst. Jai Narayan Tripathi, Ramachandra Achar, Rakesh Malik
2017	J	`jnl`	Parallel High-Order Envelope-Following Method for Fast Transient Analysis of Highly Oscillatory Circuits. IEEE Trans. Very Large Scale Integr. Syst. Mina A. Farhan, Michel S. Nakhla, Emad Gad, Ramachandra Achar
2014	J	`jnl`	Addressing Partitioning Issues in Parallel Circuit Simulation. IEEE Trans. Very Large Scale Integr. Syst. Douglas Paul, Ramachandra Achar, Michel S. Nakhla, Natalie Nakhla
2013	—	`conf`	Efficient parallel scheduler for circuit simulation exploiting binary link formulations. LASCAS Douglas Paul, Ramachandra Achar, Michel S. Nakhla, Natalie Nakhla
2012	J	`jnl`	Structural Characterization and Efficient Implementation Techniques for $A$-Stable High-Order Integration Methods. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Yinghong Zhou, Emad Gad, Michel S. Nakhla, Ramachandra Achar
2011	J	`jnl`	Parallel and Scalable Transient Simulator for Power Grids via Waveform Relaxation (PTS-PWR). IEEE Trans. Very Large Scale Integr. Syst. Ramachandra Achar, Michel S. Nakhla, Harjot S. Dhindsa, Arvind R. Sridhar, Douglas Paul, Natalie Nakhla
2010	J	`jnl`	Comparison Study of Performance of Parallel Steady State Solver on Different Computer Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Nick Soveiko, Michel S. Nakhla, Ramachandra Achar
2009	J	`jnl`	A-Stable and L-Stable High-Order Integration Methods for Solving Stiff Differential Equations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Emad Gad, Michel S. Nakhla, Ramachandra Achar, Yinghong Zhou
2009	J	`jnl`	Passivity Compensation Algorithm for Method-of-Characteristics-Based Multiconductor Transmission Line Interconnect Macromodels. IEEE Trans. Very Large Scale Integr. Syst. Changzhong Chen, Dharmendra Saraswat, Ramachandra Achar, Emad Gad, Michel S. Nakhla, Mustapha Chérif-Eddine Yagoub
2008	J	`jnl`	A Robust Algorithm for Passive Reduced-Order Macromodeling of MTLs With FD-PUL Parameters Using Integrated Congruence Transform. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Changzhong Chen, Dharmendra Saraswat, Ramachandra Achar, Emad Gad, Michel S. Nakhla, Mustapha Chérif-Eddine Yagoub
2007	J	`jnl`	Analysis of Frequency-Dependent Interconnects Using Integrated Congruence Transform. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Changzhong Chen, Emad Gad, Natalie Nakhla, Ramachandra Achar
2007	J	`jnl`	Fast Passivity Verification and Enforcement via Reciprocal Systems for Interconnects With Large Order Macromodels. IEEE Trans. Very Large Scale Integr. Syst. Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla
2007	A	`conf`	Sparse and passive reduction of massively coupled large multiport interconnects. ICCAD Natalie Nakhla, Michel S. Nakhla, Ramachandra Achar
2006	J	`jnl`	A Projection-Based Reduction Approach to Computing Sensitivity of Steady-State Response of Nonlinear Circuits. INFORMS J. Comput. Praveen Pai, Emad Gad, Ramachandra Achar, Michel S. Nakhla, Roni Khazaka
2006	Misc	`conf`	Circuit Compatible Macromodeling of High-Speed VLSI Modules Characterized by Scattering Parameters. VLSI Design Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla
2006	Misc	`conf`	Efficient and Accurate EMC Analysis of High-Frequency VLSI Subnetworks. VLSI Design Gurpreet Shinh, Natalie Nakhla, Ramachandra Achar, Michel S. Nakhla, Ihsan Erdin
2005	—	`conf`	Accurate and closed-form SPICE compatible passive macromodels for distributed interconnects with frequency dependent parameters. ISCAS (6) Natalie Nakhla, Ramachandra Achar, Michel S. Nakhla
2005	—	`conf`	Delay extraction based closed-form SPICE compatible passive macromodels for distributed transmission line interconnects. ASP-DAC Natalie Nakhla, Ramachandra Achar, Michel S. Nakhla, Anestis Dounavis
2005	J	`jnl`	Global Passivity Enforcement Algorithm for Macromodels of Interconnect Subnetworks Characterized by Tabulated Data. IEEE Trans. Very Large Scale Integr. Syst. Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla
2005	—	`conf`	On passivity enforcement for macromodels of S-parameter based tabulated subnetworks. ISCAS (4) Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla
2005	J	`jnl`	Passivity verification in delay-based macromodels of electrical interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. Emad Gad, Changzhong Chen, Michel S. Nakhla, Ramachandra Achar
2005	Misc	`conf`	Projection Based Fast Passive Compact Macromodeling of High-Speed VLSI Circuits and Interconnects. VLSI Design Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla
2004	—	`conf`	Computing large-change sensitivity of periodic responses of nonlinear circuits using reduction techniques. ISCAS (5) Praveen Pai, Emad Gad, Ramachandra Achar, Roni Khazaka, Michel S. Nakhla
2004	—	`conf`	Fast sensitivity analysis of transmission line networks. ISCAS (5) Natalie Nakhla, Anestis Dounavis, Ramachandra Achar, Michel S. Nakhla
2003	—	`conf`	Passive macromodeling of subnetworks characterized by measured data. ISCAS (3) Dharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla
2002	—	`conf`	Passive closed-form time-domain macromodels for on-chip distributed RC interconnects. CICC Anestis Dounavis, Ramachandra Achar, Michel S. Nakhla
2001	—	`conf`	A general class of passive macromodels for efficient sensitivity analysis of high-speed distributed interconnects with nonlinear terminations. ICECS Anestis Dounavis, Ramachandra Achar, Michel S. Nakhla
2001	J	`jnl`	Correction To "simulation of high-speed Interconnects". Proc. IEEE Ramachandra Achar, Michel S. Nakhla
2001	J	`jnl`	Simulation of high-speed interconnects. Proc. IEEE Ramachandra Achar, Michel S. Nakhla
2000	A*	`conf`	Passive model order reduction of multiport distributed interconnects. DAC Emad Gad, Anestis Dounavis, Michel S. Nakhla, Ramachandra Achar
2000	J	`jnl`	Simulation of high-speed distributed interconnects using Krylov-space techniques. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pavan K. Gunupudi, Michel S. Nakhla, Ramachandra Achar
1999	—	`conf`	Efficient simulation of on-chip RF components using model-reduction techniques. ISCAS (2) Ramachandra Achar, Michel S. Nakhla
1999	—	`ch.`	Interconnect Modeling and Simulation. The VLSI Handbook Michel S. Nakhla, Ramachandra Achar
1999	—	`conf`	Multi-point multi-port reduction of high-speed distributed interconnects using Krylov-space techniques. ISCAS (6) Pavan K. Gunupudi, Michel S. Nakhla, Ramachandra Achar
1998	J	`jnl`	Full-wave analysis of high-speed interconnects using complex frequency hopping. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ramachandra Achar, Michel S. Nakhla, Qi-Jun Zhang
1996	A	`conf`	An efficient approach for moment-matching simulation of linear subnetworks with measured or tabulated data. ICCAD Guowu Zheng, Qi-Jun Zhang, Michel S. Nakhla, Ramachandra Achar
1995	A	`conf`	Addressing high frequency effects in VLSI interconnects with full wave model and CFH. ICCAD Ramachandra Achar, Michel S. Nakhla, Qi-Jun Zhang

{'decompiled': [{'decompiled_function_hash': '1f0dd5f0fe1f0f28d39c8f98bf5eb5b06a98405389873053efd1df2f3ca12179', 'decompiled_function': 'bool z\n\nif (arg3 == *arg2)\n    *arg2 = arg1\n    z = true\nelse\n    *arg2\n    z = false\n\nint64_t result\nresult.b = z\nreturn result', 'decompiled_function_name': 'sync/atomic.CompareAndSwapUintptr', 'decompiled_function_prototype': 'int64_t sync/atomic.CompareAndSwapUintptr(int64_t arg1, int64_t* arg2 @ rax, int64_t arg3 @ rbx)', 'decompiled_function_address': 4198528, 'function_type': 'USER', 'functions_caller': [], 'functions_call': [], 'flattened_score': 0.0, 'mba_score': 0.0, 'disassembled_function_hash': '09e03a03d3a93deea76172fc49c83d407cff050807a0e40d5b25b8848182f060'}, {'decompiled_function_hash': '02b054c1841b6532a667e3e61f8c3363dffbc0893dc9cee31e16e6438a6b32ee', 'decompiled_function': 'int64_t rcx = data_6531e8\nint64_t* internal/abi.kindNames_1 = internal/abi.kindNames\n\nif (arg1 s>= rcx)\n    if (rcx u> 0)\n        internal/abi.kindNames_1[1]\n        return *internal/abi.kindNames_1\n    \n    runtime.panicIndex(0)\nelse if (arg1 u< rcx)\n    internal/abi.kindNames_1[arg1 * 2 + 1]\n    return internal/abi.kindNames_1[arg1 * 2]\n\nruntime.panicIndexU()\nbreakpoint', 'decompiled_function_name': 'internal/abi.Kind.String', 'decompiled_function_prototype': 'int64_t internal/abi.Kind.String(int64_t arg1 @ rax)', 'decompiled_function_address': 4198720, 'function_type': 'USER', 'functions_caller': [], 'functions_call': ['runtime.panicIndex(0)', 'runtime.panicIndexU()'], 'flattened_score': 0.0, 'mba_score': 0.0, 'disassembled_function_hash': 'ba0c8a4a2a408f300d085876a7263294d4b54f4214bc693afe46b9e8378cbf31'}, {'decompiled_function_hash': '03a962adee69ce6e97437b8250ca1e912d9f55f0c17a29845e7e55e9544b5fa9', 'decompiled_function': 'if ((zx.q(*(arg1 + 0x17)) & 0x1f) != 0x11)\n    return 0\n\nreturn *(arg1 + 0x40)', 'decompiled_function_name': 'internal/abi.(*Type).Len', 'decompiled_function_prototype': 'int64_t internal/abi.(*Type).Len(void* arg1 @ rax)', 'decompiled_function_address': 4198816, 'function_type': 'USER', 'functions_caller': [], 'functions_call': [], 'flattened_score': 0.0, 'mba_score': 0.3333333333333333, 'disassembled_function_hash': 'a2843f9a81f7822d6b6b55e43df329ee31eed92dae8dc41ca991d56d7632c1b9'}, {'decompiled_function_hash': 'd782b427b58ad2cf84c6a7c609d1d872f14db0788919434f18e9c183125af6d3', 'decompiled_function': 'void* rsi_4\n\nif ((*(arg1 + 0x14) & 1) == 0)\n    rsi_4 = nullptr\nelse\n    int64_t rsi_3 = (zx.q(*(arg1 + 0x17)) & 0x1f) - 0x11\n    \n    if (rsi_3 u<= 8)\n        jump(internal/abi.(*Type).ExportedMethods.jump7[rsi_3])\n    \n    rsi_4 = arg1 + 0x30\n\nif (rsi_4 == 0)\n    return 0\n\nuint64_t rdx = zx.q(*(rsi_4 + 6))\n\nif (rdx.w == 0)\n    return nullptr\n\nif (rdx u<= 0x10000)\n    return rsi_4 + zx.q(*(rsi_4 + 8))\n\nruntime.panicSlice3Alen()\nbreakpoint', 'decompiled_function_name': 'internal/abi.(*Type).ExportedMethods', 'decompiled_function_prototype': 'void* internal/abi.(*Type).ExportedMethods(void* arg1 @ rax)', 'decompiled_function_address': 4198880, 'function_type': 'USER', 'functions_caller': [], 'functions_call': ['jump(internal/abi.(*Type).ExportedMethods.jump7[rsi_3])', 'runtime.panicSlice3Alen()'], 'flattened_score': 0.0, 'mba_score': 0.125, 'disassembled_function_hash': 'e2558c9cf3ebac3a28dff29dcc0b8918965ca5091e4d5e0361af301ebc9d7fba'}, {'decompiled_function_hash': '407d3d24d10ffe65a17c09aa88e6d7283d00fcdd9df10741af968c91841cc9b2', 'decompiled_function': 'while (&__return_addr u<= *(arg3 + 0x10))\n    runtime.morestack_noctxt.abi0()\n\nuint64_t rcx_1 = zx.q(*(arg1 + 0x17)) & 0x1f\n\nif (rcx_1 == 0x14)\n    return *(arg1 + 0x40)\n\ninternal/abi.(*Type).ExportedMethods(arg1, rcx_1)\nreturn arg2', 'decompiled_function_name': 'internal/abi.(*Type).NumMethod', 'decompiled_function_prototype': 'int64_t internal/abi.(*Type).NumMethod(void* arg1 @ rax, int64_t arg2 @ rbx, void* arg3 @ r14)', 'decompiled_function_address': 4199072, 'function_type': 'USER', 'functions_caller': [], 'functions_call': ['internal/abi.(*Type).ExportedMethods(arg1, rcx_1)', 'runtime.morestack_noctxt.abi0()'], 'flattened_score': 1.0, 'mba_score': 0.14285714285714285, 'disassembled_function_hash': '270037f0c8addf478f25bc075eb0dc05fc54dff87fba6dff63ab8d0555e4929a'}, {'decompiled_function_hash': '9f2a44ad4622a0e2d0e1b439b1d46754301fd5f7060b91e3766482b1383494da', 'decompiled_function': 'if (arg1 == 0)\n    return 0\n\nint64_t rcx = 0\nint64_t rdx = 0\n\nwhile (true)\n    int64_t rbx_2 = rcx * 7\n    *(arg1 + rcx + 1)\n    \n    if (rbx_2 s< 0)\n        runtime.panicshift()\n        breakpoint\n    \n    uint32_t rdi_3 = zx.d(*(arg1 + rcx + 1))\n    rdx += (zx.q(rdi_3) & 0x7f) << rbx_2.b & sbb.q(rbx_2, rbx_2, rbx_2 u< 0x40)\n    \n    if ((rdi_3.b & 0x80) == 0)\n        break\n    \n    rcx += 1\n\nint64_t rcx_1\n\nif (rdx != 1)\n    rcx_1 = 0\nelse\n    rcx_1.b = *(arg1 + 2) == 0x5f\n\nreturn zx.q(rcx_1.d)', 'decompiled_function_name': 'internal/abi.Name.IsBlank', 'decompiled_function_prototype': 'uint64_t internal/abi.Name.IsBlank(void* arg1 @ rax)', 'decompiled_function_address': 4199168, 'function_type': 'USER', 'functions_caller': [], 'functions_call': ['runtime.panicshift()'], 'flattened_score': 0.7692307692307693, 'mba_score': 0.05, 'disassembled_function_hash': '7a693574e5a54de381301402832a96b61c8f4d2a2671d8150e93fb29f8692e0f'}, {'decompiled_function_hash': 'aaadbfaff6f26ed203060269065749f25f44d295aadde2386ab73f8c4a5dd767', 'decompiled_function': 'while (true)\n    int64_t* rsp\n    \n    if (rsp u> *(arg3 + 0x10))\n        *(rsp - 8) = arg2\n        rsp -= 8\n        arg2 = rsp\n        \n        if (arg1 == 0)\n            *rsp\n            return 0\n        \n        void* rcx_1 = nullptr\n        int64_t rdx_1 = 0\n        \n        while (true)\n            void* rsi_2 = rcx_1 * 7\n            *(rcx_1 + arg1 + 1)\n            \n            if (rsi_2 s< 0)\n                break\n            \n            uint32_t r8_3 = zx.d(*(rcx_1 + arg1 + 1))\n            rdx_1 += (zx.q(r8_3) & 0x7f) << rsi_2.b & sbb.q(rsi_2, rsi_2, rsi_2 u< 0x40)\n            \n            if ((r8_3.b & 0x80) == 0)\n                if (rdx_1 s>= 0)\n                    int64_t rcx_4 = neg.q(rcx_1 + arg1 + 2)\n                    \n                    if (rcx_4 u>= rdx_1)\n                        *rsp\n                        return rcx_1 + arg1 + 2\n                    \n                    if (rcx_1 + arg1 != -2)\n                        runtime.panicunsafestringlen(rcx_4)\n                    \n                    runtime.panicunsafestringnilptr()\n                \n                runtime.panicunsafestringlen()\n                break\n            \n            rcx_1 += 1\n        \n        arg1 = runtime.panicshift()\n    \n    rsp[1] = arg1\n    runtime.morestack_noctxt.abi0()\n    arg1 = rsp[1]', 'decompiled_function_name': 'internal/abi.Name.Name', 'decompiled_function_prototype': 'void* internal/abi.Name.Name(int64_t arg1 @ rax, int64_t* arg2 @ rbp, void* arg3 @ r14)', 'decompiled_function_address': 4199296, 'function_type': 'USER', 'functions_caller': [], 'functions_call': ['runtime.panicunsafestringlen(rcx_4)', 'runtime.panicunsafestringnilptr()', 'runtime.panicunsafestringlen()', 'arg1 = runtime.panicshift()', 'runtime.morestack_noctxt.abi0()'], 'flattened_score': 1.0, 'mba_score': 0.029411764705882353, 'disassembled_function_hash': '21ad7fe65b5907f2e2bd82711c3d5cda50e2cda11dd6cb13e472a1879a0f5ee0'}, {'decompiled_function_hash': '6bc616921202fbee6edcbe36548ca6c0123ae51ecb86c0eea217f3889c581d25', 'decompiled_function': 'while (true)\n    int64_t* rsp\n    \n    if (rsp u> *(arg3 + 0x10))\n        *(rsp - 8) = arg2\n        rsp -= 8\n        arg2 = rsp\n        \n        if ((*arg1 & 2) == 0)\n            *rsp\n            return 0\n        \n        void* rcx_1 = nullptr\n        void* rdx_2 = nullptr\n        \n        while (true)\n            void* rsi_2 = rcx_1 * 7\n            *(rcx_1 + arg1 + 1)\n            \n            if (rsi_2 s< 0)\n                break\n            \n            uint32_t r8_3 = zx.d(*(rcx_1 + arg1 + 1))\n            rdx_2 += (zx.q(r8_3) & 0x7f) << rsi_2.b & sbb.q(rsi_2, rsi_2, rsi_2 u< 0x40)\n            \n            if ((r8_3.b & 0x80) == 0)\n                int64_t rcx_3 = 0\n                int64_t rbx_3 = 0\n                \n                while (true)\n                    void* rsi_4 = rdx_2 + rcx_1 + rcx_3\n                    int64_t rdi_3 = rcx_3 * 7\n                    *(arg1 + rsi_4 + 2)\n                    \n                    if (rdi_3 s< 0)\n                        break\n                    \n                    uint32_t r8_9 = zx.d(*(arg1 + rsi_4 + 2))\n                    rbx_3 += (zx.q(r8_9) & 0x7f) << rdi_3.b & sbb.q(rdi_3, rdi_3, rdi_3 u< 0x40)\n                    \n                    if ((r8_9.b & 0x80) == 0)\n                        if (rbx_3 s>= 0)\n                            int64_t rcx_6 = neg.q(arg1 + rsi_4 + 3)\n                            \n                            if (rcx_6 u>= rbx_3)\n                                *rsp\n                                return arg1 + rsi_4 + 3\n                            \n                            if (arg1 + rsi_4 != -3)\n                                runtime.panicunsafestringlen(rcx_6)\n                            \n                            runtime.panicunsafestringnilptr()\n                        \n                        runtime.panicunsafestringlen()\n                        break\n                    \n                    rcx_3 += 1\n                \n                runtime.panicshift()\n                break\n            \n            rcx_1 += 1\n        \n        arg1 = runtime.panicshift()\n    \n    rsp[1] = arg1\n    runtime.morestack_noctxt.abi0()\n    arg1 = rsp[1]', 'decompiled_function_name': 'internal/abi.Name.Tag', 'decompiled_function_prototype': 'void* internal/abi.Name.Tag(char* arg1 @ rax, int64_t* arg2 @ rbp, void* arg3 @ r14)', 'decompiled_function_address': 4199488, 'function_type': 'USER', 'functions_caller': [], 'functions_call': ['runtime.panicunsafestringlen(rcx_6)', 'runtime.panicunsafestringnilptr()', 'runtime.panicunsafestringlen()', 'runtime.panicshift()', 'arg1 = runtime.panicshift()', 'runtime.morestack_noctxt.abi0()'], 'flattened_score': 1.0, 'mba_score': 0.041666666666666664, 'disassembled_function_hash': '0621c0c17af04d429b48b7855fd82627f2e835ec864eaa49d0de3183fd3d9fbf'}, {'decompiled_function_hash': '917d57a1b59aad9ee7b1197909e67f4ee8d39a0d26f2390ceacbbc54bde37a43', 'decompiled_function': 'while (true)\n    void* rsp\n    \n    if (rsp - 0x30 u> *(arg9 + 0x10))\n        *(rsp - 8) = arg6\n        arg6 = rsp - 8\n        rsp -= 0xb0\n        *(rsp + 0xb8) = arg4\n        *(rsp + 0xc8) = arg1\n        \n        if (arg5 s< 0x20000000)\n            if (arg8 s< 0x20000000)\n                __builtin_memset(rsp + 0x84, 0, 0x14)\n                int64_t rdx = arg5\n                int64_t r9_1 = 0\n                \n                while (true)\n                    char r10_2 = arg5.b\n                    arg5 s>>= 7\n                    char r10_3 = r10_2 & 0x7f\n                    \n                    if (arg5 == 0)\n                        if (r9_1 u< 0xa)\n                            *(rsp + r9_1 + 0x8e) = r10_3\n                            int64_t rbx = arg8\n                            int64_t r10_4 = 0\n                            \n                            while (true)\n                                char r11_2 = arg8.b\n                                arg8 s>>= 7\n                                char r11_3 = r11_2 & 0x7f\n                                \n                                if (arg8 == 0)\n                                    if (r10_4 u< 0xa)\n                                        *(rsp + r10_4 + 0x84) = r11_3\n                                        int64_t r11_4 = rdx + r9_1\n                                        int64_t r12_3\n                                        \n                                        if (rbx == 0)\n                                            r12_3 = r9_1 + rdx + 2\n                                        else\n                                            r12_3 = rbx + r10_4 + r11_4 + 3\n                                            arg7 |= 2\n                                        \n                                        *(rsp + 0x78) = rdx\n                                        *(rsp + 0x48) = r9_1 + rdx + 2\n                                        *(rsp + 0x70) = rbx\n                                        *(rsp + 0xb8) = arg4\n                                        *(rsp + 0xc8) = arg1\n                                        *(rsp + 0x68) = r11_4\n                                        *(rsp + 0x50) = r10_4\n                                        *(rsp + 0x58) = r9_1\n                                        \n                                        if (arg3 != 0)\n                                            arg7 |= 8\n                                        \n                                        *(rsp + 0x3f) = arg7.b\n                                        *(rsp + 0x60) = r12_3\n                                        char* result = runtime.makeslice(r12_3)\n                                        void* rcx_1 = *(rsp + 0x60)\n                                        \n                                        if (rcx_1 u> 0)\n                                            *(rsp + 0xa0) = result\n                                            *result = *(rsp + 0x3f)\n                                            void* rsi = rcx_1 - 1\n                                            uint64_t rdx_6 = (zx.q((neg.q(rcx_1 - 1) s>> 0x3f).d) & 1) + result\n                                            void* rdi_2 = *(rsp + 0x58)\n                                            \n                                            if (rdi_2 + 1 s< rsi)\n                                                rsi = rdi_2 + 1\n                                            \n                                            if (rsp + 0x8e != rdx_6)\n                                                runtime.memmove(rsi, rdx_6, rsp + 0x8e)\n                                                result = *(rsp + 0xa0)\n                                                rcx_1 = *(rsp + 0x60)\n                                                rdi_2 = *(rsp + 0x58)\n                                            \n                                            if (rcx_1 u>= rdi_2 + 2)\n                                                void* rdi_3 = rcx_1 - rdi_2 - 2\n                                                void* rdx_9 = ((rdi_2 + 2) & neg.q(rcx_1 - rdi_2 - 2) s>> 0x3f) + result\n                                                void* rsi_6 = *(rsp + 0x78)\n                                                \n                                                if (rsi_6 s< rdi_3)\n                                                    rdi_3 = rsi_6\n                                                \n                                                int128_t* rbx_3 = *(rsp + 0xb8)\n                                                void* rdx_10\n                                                bool cond:0_1\n                                                \n                                                if (rbx_3 != rdx_9)\n                                                    runtime.memmove(rdi_3, rdx_9, rbx_3)\n                                                    rdx_10 = *(rsp + 0x70)\n                                                    cond:0_1 = rdx_10 == 0\n                                                    result = *(rsp + 0xa0)\n                                                    rcx_1 = *(rsp + 0x60)\n                                                else\n                                                    rdx_10 = *(rsp + 0x70)\n                                                    cond:0_1 = rdx_10 == 0\n                                                \n                                                if (cond:0_1)\n                                                    *(rsp + 0xa8)\n                                                    return result\n                                                \n                                                uint64_t rsi_7 = *(rsp + 0x48)\n