Rakesh Malik

18 papers A 1C 3Journal 3Unranked 11
YearRankTypeTitle / Venue / Authors
2018 J jnl
Fast Analysis of Time Interval Error in Current-Mode Drivers.
IEEE Trans. Very Large Scale Integr. Syst.
Jai Narayan Tripathi, Ramachandra Achar, Rakesh Malik
2017 J jnl
A 0.065-mm
IEEE J. Solid State Circuits
Ashish Kumar, Chandrajit Debnath, Pratap Narayan Singh, Vivek Bhatia, Shivani Chaudhary, Vigyan Jain, Stéphane Le Tual, Rakesh Malik
2017 — conf
Distortion analysis for a DC-DC buck converter.
ISOCC
Vijender Kumar Sharma, Hitesh Shrimali, Jai Narayan Tripathi, Rakesh Malik
2017 — conf
Nonlinear modeling and analysis of buck converter using volterra series.
ICECS
Hitesh Shrimali, Vijender Kumar Sharma, Jai Narayan Tripathi, Rakesh Malik
2016 — conf
A 0.065mm
ESSCIRC
Ashish Kumar, Chandrajit Debnath, Pratap Narayan Singh, Vivek Bhatia, Shivani Chaudhary, Vigyan Jain, Stéphane Le Tual, Rakesh Malik
2015 — conf
Analysis of a serial link for power supply induced jitter.
SoCC
Jai Narayan Tripathi, Hiten Advani, Raj Kumar Nagpal, Vijender Kumar Sharma, Rakesh Malik
2014 C conf
Decoupling network optimization in high speed systems by mixed-integer programming.
ISCAS
Jai Narayan Tripathi, Ashutosh Mahajan, Jayanta Mukherjee, Raj Kumar Nagpal, Rakesh Malik, Nitin Gupta
2013 A conf
Handwritten Musical Document Retrieval Using Music-Score Spotting.
ICDAR
Rakesh Malik, Partha Pratim Roy, Umapada Pal, Fumitaka Kimura
2013 — conf
Power Integrity analysis and discrete optimization of decoupling capacitors on high speed power planes by particle swarm optimization.
ISQED
Jai Narayan Tripathi, Raj Kumar Nagpal, Nitin Kumar Chhabra, Rakesh Malik, Jayanta Mukherjee, Prakash R. Apte
2012 C conf
Damping the cavity-mode anti-resonances' peaks on a power plane by swarm intelligence algorithms.
ISCAS
Jai Narayan Tripathi, Nitin Kumar Chhabra, Raj Kumar Nagpal, Rakesh Malik, Jayanta Mukherjee
2012 — conf
Maintaining Power Integrity by damping the cavity-mode anti-resonances' peaks on a power plane by Particle Swarm Optimization.
ISQED
Jai Narayan Tripathi, Raj Kumar Nagpal, Nitin Kumar Chhabra, Rakesh Malik, Jayanta Mukherjee
2012 J jnl
Selling to the BRIC: the background to the scholarly publishing market in India.
Learn. Publ.
Rakesh Malik
2011 — conf
Cost-effective optimization of serial link system for Signal Integrity and Power Integrity.
ISQED
Raj Kumar Nagpal, Jai Narayan Tripathi, Rakesh Malik
2010 — conf
Modelling of Power Distribution Network and Decoupling Network Design for High Speed VLSI Design.
DELTA
Abhishek Pathak, Sushanta K. Mandal, Raj Kumar Nagpal, Rakesh Malik
2010 — conf
Robust optimization of serial link system for signal integrity and power integrity.
NESEA
Jai Narayan Tripathi, Raj Kumar Nagpal, Rakesh Malik
2009 C conf
Signal Integrity and Power Integrity Methodology for Robust Analysis of On-the-Board System for High Speed Serial Links.
DSD
Raj Kumar Nagpal, Rakesh Malik, Jai Narayan Tripathi
2008 — conf
A 1.2v 11b 100Msps 15mW ADC realized using 2.5b pipelined stage followed by time interleaved SAR in 65nm digital CMOS process.
CICC
Pratap Narayan Singh, Ashish Kumar, Chandrajit Debnath, Rakesh Malik
2007 — conf
20mW, 125 Msps, 10 bit Pipelined ADC in 65nm Standard Digital CMOS Process.
CICC
Pratap Narayan Singh, Ashish Kumar, Chandrajit Debnath, Rakesh Malik