Rakesh Biswas - RankMe

13 papers Misc 1Journal 6Unranked 6

Year	Rank	Type	Title / Venue / Authors
2023	J	`jnl`	A power-aware ECG processing node for real-time feature extraction in WBAN. Microprocess. Microsystems Jitumani Sarma, Rakesh Biswas
2022	—	`conf`	A Power-Aware ECG Transmission Framework with Server Aided Lossless Compression. APCCAS Jitumani Sarma, Rakesh Biswas
2022	J	`jnl`	A digitally controlled adaptive LDO for power management unit in sensor node. Integr. Jitumani Sarma, Shatadal Chatterjee, Rakesh Biswas, Sounak Roy
2022	—	`conf`	Depth Invariant Real-time Fixed/Random Valued Impulse Noise Removal Algorithm for Back-end of Ultrasonography Systems. iSES Pradyut Kumar Sanki, Rakesh Biswas
2021	—	`conf`	Data encoding for IoHT ECG Application. ISDCS Sucheta Biswas, Rakesh Biswas
2020	—	`conf`	A Fast Transient Digitally Assisted Flash-Based Modular LDO for Sensor Nodes in WBAN. ISVLSI Jitumani Sarma, Shatadal Chatterjee, Rakesh Biswas, Sounak Roy
2020	—	`conf`	An Adaptive Digitally Tuned Flash-based LDO with Reduced Hardware for Sensor Nodes in WBAN. VDAT Jitumani Sarma, Shatadal Chatterjee, Rakesh Biswas, Sounak Roy
2020	J	`jnl`	Smartphone-Based Point-of-Care System Using Continuous-Wave Portable Doppler. IEEE Trans. Instrum. Meas. Biswabandhu Jana, Rakesh Biswas, Pallab Kumar Nath, Goutam Saha, Swapna Banerjee
2020	Misc	`conf`	VLSI based Adaptive Power Management Architecture for ECG Monitoring in WBAN. VLSID Jitumani Sarma, Rakesh Biswas
2019	—	`conf`	Power-aware IoT based Smart Health Monitoring using Wireless Body Area Network. ISQED Jitumani Sarma, Akash Katiyar, Rakesh Biswas, Hemanta Kumar Mondal
2018	J	`jnl`	A High-Precision Low-Area Unified Architecture for Lossy and Lossless 3D Multi-Level Discrete Wavelet Transform. IEEE Trans. Circuits Syst. Video Technol. Rakesh Biswas, Siddarth Reddy Malreddy, Swapna Banerjee
2015	J	`jnl`	An FPGA-based architecture of DSC-SRI units specially for motion blind ultrasound systems. J. Real Time Image Process. Rakesh Biswas, Kishor Sarawadekar, Srinivas Varna, Swapna Banerjee
2010	J	`jnl`	Architectural design and FPGA implementation of radix-4 CORDIC processor. Microprocess. Microsystems Kaushik Bhattacharyya, Rakesh Biswas, Anindya Sundar Dhar, Swapna Banerjee