Rajit Karmakar

22 papers A* 1A 2C 3Misc 5Journal 7Unranked 4
YearRankTypeTitle / Venue / Authors
2022 J jnl
A Cellular Automata Guided Finite-State-Machine Watermarking Strategy for IP Protection of Sequential Circuits.
IEEE Trans. Emerg. Top. Comput.
Rajit Karmakar, Suman Sekhar Jana, Santanu Chattopadhyay
2021 J jnl
Efficient Key-Gate Placement and Dynamic Scan Obfuscation Towards Robust Logic Encryption.
IEEE Trans. Emerg. Top. Comput.
Rajit Karmakar, Harshit Kumar, Santanu Chattopadhyay
2020 A conf
A Particle Swarm Optimization Guided Approximate Key Search Attack on Logic Locking in The Absence of Scan Access.
DATE
Rajit Karmakar, Santanu Chattopadhyay
2020 J jnl
A Scan Obfuscation Guided Design-for-Security Approach for Sequential Circuits.
IEEE Trans. Circuits Syst. II Express Briefs
Rajit Karmakar, Santanu Chattopadhyay, Rohit Kapur
2020 J jnl
A cellular automata guided two level obfuscation of Finite-State-Machine for IP protection.
Integr.
Rajit Karmakar, Suman Sekhar Jana, Santanu Chattopadhyay
2020 A conf
Hardware IP Protection Using Logic Encryption and Watermarking.
ITC
Rajit Karmakar, Santanu Chattopadhyay
2020 — conf
On Securing Scan Obfuscation Strategies Against ScanSAT Attack.
ISQED
Rajit Karmakar, Santanu Chattopadhyay
2019 A* conf
A Cellular Automata Guided Obfuscation Strategy For Finite-State-Machine Synthesis.
DAC
Rajit Karmakar, Suman Sekhar Jana, Santanu Chattopadhyay
2019 C conf
Improving Security of Logic Encryption in Presence of Design-for-Testability Infrastructure.
ISCAS
Rajit Karmakar, Santanu Chattopadhyay, Mrityunjoy Chakraborty
2018 J jnl
Encrypt Flip-Flop: A Novel Logic Encryption Technique For Sequential Circuits.
CoRR
Rajit Karmakar, Santanu Chattopadhyay, Rohit Kapur
2018 C conf
On Finding Suitable Key-Gate Locations In Logic Encryption.
ISCAS
Rajit Karmakar, Harshit Kumar, Santanu Chattopadhyay
2017 Misc conf
A New Logic Encryption Strategy Ensuring Key Interdependency.
VLSID
Rajit Karmakar, N. Prasad, Santanu Chattopadhyay, Rohit Kapur, Indranil Sengupta
2017 — conf
Enhancing security of logic encryption using embedded key generation unit.
ITC-Asia
Rajit Karmakar, Santanu Chattopadhyay, Rohit Kapur
2017 C conf
Runtime mitigation of illegal packet request attacks in Networks-on-Chip.
ISCAS
N. Prasad, Rajit Karmakar, Santanu Chattopadhyay, Indrajit Chakrabarti
2017 J jnl
Temperature and data size trade-off in dictionary based test data compression.
Integr.
Rajit Karmakar, Santanu Chattopadhyay
2016 Misc conf
Optimization of the IEEE 1687 access network for hybrid access schedules.
VTS
Srinivasa Shashank Nuthakki, Rajit Karmakar, Santanu Chattopadhyay, Krishnendu Chakrabarty
2016 Misc conf
Thermal-Safe Schedule Generation for System-on-Chip Testing.
VLSID
Rajit Karmakar, Santanu Chattopadhyay
2015 — conf
Test Infrastructure Development and Test Scheduling of 3D-Stacked ICs under Resource and Power Constraints.
ATS
Rajit Karmakar, Aditya Agarwal, Santanu Chattopadhyay
2015 Misc conf
Testing of 3D-stacked ICs with hard- and soft-dies - a Particle Swarm Optimization based approach.
VTS
Rajit Karmakar, Aditya Agarwal, Santanu Chattopadhyay
2015 Misc conf
Thermal-Aware Test Data Compression Using Dictionary Based Coding.
VLSID
Rajit Karmakar, Santanu Chattopadhyay
2015 J jnl
Window-based peak power model and Particle Swarm Optimization guided 3-dimensional bin packing for SoC test scheduling.
Integr.
Rajit Karmakar, Santanu Chattopadhyay
2014 — conf
Particle Swarm Optimization guided multi-frequency power-aware System-on-Chip test scheduling using window-based peak power model.
VDAT
Rajit Karmakar, Aditya Agarwal, Santanu Chattopadhyay