Rajib Kumar Jha

64 papers B 2C 4Journal 42Unranked 16
YearRankTypeTitle / Venue / Authors
2025 conf
NCC
Arjun Abhishek, Sagar Deep Deb, Rajib Kumar Jha, Ruchi Sinha, Kamlesh Jha
2025 J jnl
Biomed. Signal Process. Control.
Arjun Abhishek, Sagar Deep Deb, Rajib Kumar Jha, Ruchi Sinha, Kamlesh Jha
2024 C conf
TENCON
Gaurav Sundaram, Snehan Shourya, Ayush Kumar, Rajib Kumar Jha, Rashmi Ranjan Maharana, Sumit Kumar
2024 J jnl
Multim. Tools Appl.
Sagar Deep Deb, Rajib Kumar Jha
2024 conf
ICMLSC
Sagar Deep Deb, Rachit Kashyap, Arjun Abhishek, Rajib Kumar Jha
2023 conf
NCC
Sagar Deep Deb, Arjun Abhishek, Rajib Kumar Jha
2023 J jnl
Biomed. Signal Process. Control.
Arjun Abhishek, Rajib Kumar Jha, Ruchi Sinha, Kamlesh Jha
2023 J jnl
Biomed. Signal Process. Control.
Sagar Deep Deb, Rajib Kumar Jha
2023 conf
NCC
Sagar Deep Deb, Rajib Kumar Jha, Sudhir Kumar
2023 conf
NCC
Arjun Abhishek, Sagar Deep Deb, Rajib Kumar Jha, Ruchi Sinha, Kamlesh Jha
2023 J jnl
IET Image Process.
Gaurav Sundaram, Bhaskar Panna, Rajib Kumar Jha, Sumit Kumar
2022 J jnl
Biomed. Signal Process. Control.
Sagar Deep Deb, Rajib Kumar Jha, Kamlesh Jha, Prem S. Tripathi
2022 J jnl
Biomed. Signal Process. Control.
Arjun Abhishek, Rajib Kumar Jha, Ruchi Sinha, Kamlesh Jha
2021 J jnl
Multim. Tools Appl.
Mausam Chouksey, Rajib Kumar Jha
2021 J jnl
J. Vis. Commun. Image Represent.
Avishek Kumar, Rajib Kumar Jha, Naveen K. Nishchal
2021 J jnl
Expert Syst. Appl.
Mausam Chouksey, Rajib Kumar Jha
2021 J jnl
J. Vis. Commun. Image Represent.
Avishek Kumar, Rajib Kumar Jha, Naveen K. Nishchal
2021 J jnl
J. Electronic Imaging
Avishek Kumar, Rajib Kumar Jha, Naveen K. Nishchal
2020 J jnl
Multim. Tools Appl.
Mausam Chouksey, Rajib Kumar Jha, Rajat Sharma
2020 J jnl
Multidimens. Syst. Signal Process.
Sumit Kumar, Rajib Kumar Jha
2020 conf
ICCCNT
Sagar Deep Deb, Mohammad Akhlaqur Rahman, Rajib Kumar Jha
2020 conf
APSIPA
Mausam Chouksey, Rajib Kumar Jha
2019 J jnl
Neural Process. Lett.
Sumit Kumar, Ayush Kumar, Rajib Kumar Jha
2019 J jnl
Multim. Tools Appl.
Vivek Singh Verma, Anuj Bhardwaj, Rajib Kumar Jha
2019 C conf
TENCON
Sumit Kumar, Akshita Gupta, Rajib Kumar Jha
2019 J jnl
IET Image Process.
Sumit Kumar, Rajib Kumar Jha
2019 J jnl
IET Image Process.
Mohammad Akhlaqur Rahman, Rajib Kumar Jha, Abhishek Kumar Gupta
2019 J jnl
Medical Biol. Eng. Comput.
Sumit Kumar, Bhaskar Panna, Rajib Kumar Jha
2019 J jnl
Circuits Syst. Signal Process.
Sumit Kumar, Rajib Kumar Jha
2019 J jnl
Circuits Syst. Signal Process.
Sumit Kumar, Rajib Kumar Jha
2018 conf
APSIPA
Sumit Kumar, Rajib Kumar Jha
2018 conf
ISED
Sumit Kumar, Rajib Kumar Jha, R. Sharma, Agya Ram Verma, Yashvir Singh
2018 J jnl
Multim. Tools Appl.
Anuj Bhardwaj, Vivek Singh Verma, Rajib Kumar Jha
2017 J jnl
Comput. Vis. Image Underst.
Deepika Shukla, Aparajita Ojha, Rajib Kumar Jha
2017 J jnl
Multidimens. Syst. Signal Process.
Suraj Suman, Rajib Kumar Jha
2017 J jnl
J. Signal Process. Syst.
Rajlaxmi Chouhan, Rajib Kumar Jha, Prabir Kumar Biswas
2017 J jnl
J. Frankl. Inst.
Vivek Singh Verma, Rajib Kumar Jha
2016 conf
ISED
Snehan Shourya, Sumit Kumar, Rajib Kumar Jha
2016 J jnl
Signal Process. Image Commun.
Deepika Shukla, Rajib Kumar Jha, Aparajita Ojha
2016 J jnl
J. Electronic Imaging
Nidhi Gupta, Rajib Kumar Jha
2016 conf
ICVGIP
Sumit Kumar, Rajib Kumar Jha
2016 conf
ISED
Vivek Singh Verma, Ajay Kumar Garg, Anuj Bhardwaj, Rajib Kumar Jha, Aparajita Ojha
2016 J jnl
J. Vis. Commun. Image Represent.
Deepika Shukla, Rajib Kumar Jha
2015 J jnl
Signal Image Video Process.
Deepika Shukla, Rajib Kumar Jha
2015 J jnl
J. Vis. Commun. Image Represent.
Vivek Singh Verma, Rajib Kumar Jha, Aparajita Ojha
2015 J jnl
Signal Image Video Process.
Rajlaxmi Chouhan, Prabir Kumar Biswas, Rajib Kumar Jha
2015 J jnl
Signal Image Video Process.
Vivek Singh Verma, Rajib Kumar Jha
2015 J jnl
Expert Syst. Appl.
Vivek Singh Verma, Rajib Kumar Jha, Aparajita Ojha
2015 J jnl
Pattern Recognit. Lett.
Deepika Shukla, Rajib Kumar Jha, Aparajita Ojha
2014 J jnl
J. Frankl. Inst.
Rajib Kumar Jha, Rajlaxmi Chouhan
2014 J jnl
Comput. Electr. Eng.
Rajib Kumar Jha, Rajlaxmi Chouhan, Kiyoharu Aizawa
2014 J jnl
Signal Image Video Process.
Rajib Kumar Jha, Rajlaxmi Chouhan
2013 conf
PReMI
Deepika Shukla, Rajib Kumar Jha
2013 C conf
VCIP
Deepika Shukla, Rajib Kumar Jha, Kiyoharu Aizawa
2013 conf
NCVPRIPG
Deepika Shukla, Rajib Kumar Jha
2013 J jnl
IET Image Process.
Rajlaxmi Chouhan, Rajib Kumar Jha, Prabir Kumar Biswas
2013 J jnl
Int. J. Image Graph.
Rajib Kumar Jha, Prabir Kumar Biswas, B. N. Chatterji
2013 J jnl
Signal Image Video Process.
Rajib Kumar Jha, Prabir Kumar Biswas, S. Shrivastava
2012 conf
EUSIPCO
Rajib Kumar Jha, Onkar Krishna, Kiyoharu Aizawa
2012 C conf
ISDA
Rajlaxmi Chouhan, Rajib Kumar Jha, Prabir Kumar Biswas
2012 B conf
ICIP
Rajib Kumar Jha, Rajlaxmi Chouhan, Prabir Kumar Biswas, Kiyoharu Aizawa
2012 J jnl
J. Electronic Imaging
Rajib Kumar Jha, Prabir Kumar Biswas, Bhupendra Gupta, Deepak Mishra
2012 conf
ICVGIP
Rajlaxmi Chouhan, Rajib Kumar Jha, Prabir Kumar Biswas
2011 B conf
ICIP
Rajlaxmi Chouhan, Rajib Kumar Jha, Apoorv Chaturvedi, Toshihiko Yamasaki, Kiyoharu Aizawa
tests/unit/test_decompile_arch.py
← Index tests/unit/test_decompile_arch.py python
"""Unit tests for architecture modules:
- bninja/arch/creator.py
- bninja/arch/x86.py
"""
import sys
import pytest

# Install binaryninja stubs before importing arch modules
from tests.unit.conftest_binja_stubs import install_binja_stubs
install_binja_stubs()

from redb.extractors.decompiler.bninja.arch.creator import ArchitectureCreator
from redb.extractors.decompiler.bninja.arch.x86 import Arch_x86


# ============================================================================
# 3a. ArchitectureCreator
# ============================================================================

class TestArchitectureCreator:
    def test_create_x86(self):
        arch = ArchitectureCreator("x86").get()
        assert isinstance(arch, Arch_x86)

    def test_create_x86_case_insensitive(self):
        for name in ["X86", "x86", "X86"]:
            arch = ArchitectureCreator(name).get()
            assert isinstance(arch, Arch_x86)

    def test_unsupported_arch_raises(self):
        with pytest.raises(ValueError, match="Unsupported architecture"):
            ArchitectureCreator("arm").get()


# ============================================================================
# 3b. Arch_x86
# ============================================================================

class TestArch_x86Registers:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_register_valid(self):
        assert self.arch.is_register("RAX") is True
        assert self.arch.is_register("eax") is True
        assert self.arch.is_register("XMM0") is True

    def test_is_register_invalid(self):
        assert self.arch.is_register("INVALID_REG") is False

    def test_is_general_purpose_register(self):
        assert self.arch.is_general_purpose_register("RAX") is True
        assert self.arch.is_general_purpose_register("XMM0") is False

    def test_is_stack_register(self):
        assert self.arch.is_stack_register("RSP") is True
        assert self.arch.is_stack_register("RBP") is True
        assert self.arch.is_stack_register("RAX") is False

    def test_is_xmm_register(self):
        assert self.arch.is_xmm_register("XMM0") is True
        assert self.arch.is_xmm_register("RAX") is False


class TestArch_x86OpcodeCategories:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_opcode_categories_populated(self):
        assert len(self.arch.opcode_categories) > 0

    def test_opcode_mov_category(self):
        assert self.arch.opcode_categories["MOV"] == "DATA_MOVEMENT"

    def test_opcode_call_category(self):
        assert self.arch.opcode_categories["CALL"] == "CONTROL_FLOW"

    def test_opcode_add_category(self):
        assert self.arch.opcode_categories["ADD"] == "ARITHMETIC"


class TestArch_x86ControlFlow:
    def setup_method(self):
        self.arch = Arch_x86()

    def test_is_control_flow_instruction_by_mnemonic(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("JMP") is True
        assert self.arch.is_control_flow_instruction_by_mnemonic("MOV") is False

    def test_is_control_flow_instruction_call(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("CALL") is True

    def test_is_control_flow_instruction_ret(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("RET") is True

    def test_is_control_flow_instruction_loop(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("LOOP") is True

    def test_is_control_flow_instruction_empty(self):
        assert self.arch.is_control_flow_instruction_by_mnemonic("") is False
        assert self.arch.is_control_flow_instruction_by_mnemonic(None) is False