Rajesh Raina - RankMe

26 papers A* 2A 16Misc 4Journal 2Unranked 2

Year	Rank	Type	Title / Venue / Authors
2008	A	`conf`	Achieving Zero-Defects for Automotive Applications. ITC Rajesh Raina
2006	A	`conf`	What is DFM & DFY and Why Should I Care ? ITC Rajesh Raina
2005	A	`conf`	Have we overcome the challenges associated with SoC and multi-core testing? ITC Rajesh Raina
2005	A	`conf`	Have we overcome the challenges associated with SoC and multi-core testing? ITC Rajesh Raina
2005	A	`conf`	Is the concern for soft-error overblown? ITC Rajesh Raina
2005	A	`conf`	Is the concern for soft-error overblown? ITC Rajesh Raina
2004	J	`jnl`	Skew measurements in clock distribution circuits using an analytic signal method. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida
2002	A	`conf`	A Wavelet-Based Timing Parameter Extraction Method. ITC Mani Soma, Welela Haileselassie, Jessica Yan, Rajesh Raina
2002	Misc	`conf`	Novel Techniques for Achieving High At-Speed Transition Fault Test Coverage for Motorola's Microprocessors Based on PowerPC(tm) Instruction Set Architecture. VTS Nandu Tendolkar, Rajesh Raina, Rick Woltenberg, Xijiang Lin, Bruce Swanson, Greg Aldrich
2002	A	`conf`	Test Methodology for Motorola's High Performance e500 Core Based on PowerPC Instruction Set Architecture. ITC Robert Bailey, A. Metayer, B. Svrcek, Nandu Tendolkar, E. Wolf, Eric Fiene, Mike Alexander, Rick Woltenberg, Rajesh Raina
2002	A	`conf`	Use of DFT Techniques In Speed Grading a 1GHz+ Microprocessor . ITC Dawit Belete, Ashutosh Razdan, William Schwarz, Rajesh Raina, Christopher Hawkins, Jeff Morehead
2002	A	`conf`	valuating ATE Features in Terms of Test Escape Rates and Other Cost of Test Culprits. ITC John Gatej, Lee Song, Carol Pyron, Rajesh Raina, Tom Munns
2001	Misc	`conf`	A Method for Measuring the Cycle-to-Cycle Period Jitter of High-Frequency Clock Signals. VTS Takahiro J. Yamaguchi, Masahiro Ishida, Mani Soma, David Halter, Rajesh Raina, Jim Nissen
2001	A	`conf`	Testing clock distribution circuits using an analytic signal method. ITC Takahiro J. Yamaguchi, Mani Soma, Jim Nissen, David Halter, Rajesh Raina, Masahiro Ishida
2001	J	`jnl`	Very Low Cost Testers: Opportunities and Challenges. IEEE Des. Test Comput. Jay Bedsole, Rajesh Raina, Al Crouch, Magdy S. Abadir
2000	Misc	`conf`	At-Speed Testing of Delay Faults for Motorola's MPC7400, a PowerPC(tm) Microprocessor. VTS Nandu Tendolkar, Robert F. Molyneaux, Carol Pyron, Rajesh Raina
2000	A	`conf`	DFT advances in Motorola's Next-Generation 74xx PowerPC ITC Rajesh Raina, Robert Bailey, Dawit Belete, Vikram Khosa, Robert F. Molyneaux, Javier Prado, Ashutosh Razdan
2000	A	`conf`	Jitter measurements of a PowerPC ITC Takahiro J. Yamaguchi, Mani Soma, David Halter, Jim Nissen, Rajesh Raina, Masahiro Ishida, Toshifumi Watanabe
1999	A	`conf`	DFT advances in the Motorola's MPC7400, a PowerPC G4 microprocessor. ITC Carol Pyron, Mike Alexander, James Golab, George Joos, Bruce Long, Robert F. Molyneaux, Rajesh Raina, Nandu Tendolkar
1999	A	`conf`	Design-for-test methodology for Motorola PowerPC microprocessors. ITC Magdy S. Abadir, Rajesh Raina
1998	—	`conf`	Random Self-Test Method - Applications on PowerPC (tm) Microprocessor Caches. Great Lakes Symposium on VLSI Rajesh Raina, Robert F. Molyneaux
1997	A*	`conf`	Efficient Testing of Clock Regenerator Circuits in Scan Designs. DAC Rajesh Raina, Robert Bailey, Charles Njinda, Robert F. Molyneaux, Charlie Beh
1997	A	`conf`	How Seriously Do You Take Your Possible-Detect Faults? ITC Rajesh Raina, Charles Njinda, Robert F. Molyneaux
1997	Misc	`conf`	T4: Verification. VLSI Design Rajesh Raina, Jacob A. Abraham, A. K. Pujari
1996	A*	`conf`	Functional Verification Methodology for the PowerPC 604 Microprocessor. DAC James Monaco, David Holloway, Rajesh Raina
1991	—	`conf`	Signature Analysis with Modified Linear Feedback Shift Registers (M-LFSRs). FTCS Rajesh Raina, Peter N. Marinos