Rajeevan Chandel

23 papers Journal 15Unranked 8
YearRankTypeTitle / Venue / Authors
2022 — conf
Improving the Flare Perturbation Response of Gasket Monopole Antenna for Custom Frequency Solutions.
iSES
Deepanshu Kaushal, Rajeevan Chandel
2022 J jnl
Proposal and analysis of carbon nanotube based differential multibit through glass vias.
Microelectron. J.
Ajay Kumar, Rajeevan Chandel, Rohit Dhiman
2021 J jnl
A prominent unified crosstalk model for linear and sub-threshold regions in mixed CNT bundle interconnects.
Microelectron. J.
Girish Kumar Mekala, Yash Agrawal, Vobulapuram Ramesh Kumar, Rajeevan Chandel
2021 J jnl
High speed RLC equivalent RC delay model using normalized asymptotic function for global VLSI interconnects.
Microelectron. J.
Sunil Jadav, Shubham Tayal, Rajeevan Chandel, Munish Vashishath
2021 J jnl
Proposal and analysis of relative stability in mixed CNT bundle for sub-threshold interconnects.
Integr.
Ashish Singh, Rajeevan Chandel, Rohit Dhiman
2021 J jnl
Variation tolerant and stability simulation of low power SRAM cell analysis using FGMOS.
Int. J. Model. Simul. Sci. Comput.
Neha Sharma, Rajeevan Chandel
2018 J jnl
A Unified Delay, Power and Crosstalk Model for Current Mode Signaling Multiwall Carbon Nanotube Interconnects.
Circuits Syst. Signal Process.
Yash Agrawal, Girish Kumar Mekala, Rajeevan Chandel
2017 J jnl
Modelling and performance analysis of dielectric inserted side contact multilayer graphene nanoribbon interconnects.
IET Circuits Devices Syst.
Girish Kumar Mekala, Yash Agrawal, Rajeevan Chandel
2017 — conf
Stability analysis of SRAM cell using CNT and GNR field effect transistors.
IC3
Parmjit Singh, Rajeevan Chandel, Neha Sharma
2016 — conf
Design of Low-Power High-Gain Operational Amplifier for Bio-Medical Applications.
ISVLSI
Sanjay Singh Rajput, Ashish Singh, Ashwani Kumar Chandel, Rajeevan Chandel
2016 — conf
Performance Analysis of Top-Contact MLGNR Based Interconnects.
iNIS
Ramesh Kumar, Rohit Dhiman, Rajeevan Chandel
2015 J jnl
Dynamic Crosstalk Analysis in Coupled Interconnects for Ultra-Low Power Applications.
Circuits Syst. Signal Process.
Rohit Dhiman, Rajeevan Chandel
2015 — conf
Performance Analysis of Multilayer Graphene Nano-Ribbon in Current-Mode Signaling Interconnect System.
iNIS
Yash Agrawal, Rajeevan Chandel, Girish Kumar Mekala
2015 — conf
Timing and Stability Analysis of Carbon Nanotube Interconnects.
iNIS
Girish Kumar Mekala, Rajeevan Chandel, Yash Agrawal
2014 J jnl
Carbon Nanotube Based Delay Model For High Speed Energy Efficient on Chip Data Transmission Using: Current Mode Technique.
CoRR
Sunil Jadav, Munish Vashistah, Rajeevan Chandel
2012 J jnl
Netlist bipartitioning using particle swarm optimisation technique.
Int. J. Artif. Intell. Soft Comput.
Sandeep Singh Gill, Rajeevan Chandel, Ashwani Kumar Chandel
2012 J jnl
Sub-Threshold Delay and Power Analysis of Complementary Metal-Oxide Semiconductor Buffer Driven Interconnect Load for Ultra Low Power Applications.
J. Low Power Electron.
Rohit Dhiman, Rajeevan Chandel
2011 — conf
Resistive analysis of mixed carbon nanotube bundle interconnect and its comparison with copper interconnect.
ICWET
Tafseer Alam, Rohit Dhiman, Rajeevan Chandel
2010 J jnl
Design and Analysis of Sub-DT Sub-Domino Logic Circuits for Ultra Low Power Applications.
J. Low Power Electron.
Ashutosh Nandi, Rajeevan Chandel
2010 J jnl
Design and Analysis of a Modified Low Power CMOS Full Adder Using Gate-Diffusion Input Technique.
J. Low Power Electron.
Kiran K. Chaddha, Rajeevan Chandel
2010 — conf
Impact of skew and jitter on the performance of VLSI interconnects.
APCCAS
Gargi Khanna, Rajeevan Chandel, Ashwani Kumar Chandel
2007 J jnl
An analysis of interconnect delay minimization by low-voltage repeater insertion.
Microelectron. J.
Rajeevan Chandel, Sankar Sarkar, Rajendra Prasad Agarwal
2007 J jnl
Investigations on Short-Circuit Power Dissipation in Repeater Loaded VLSI Interconnects.
J. Low Power Electron.
Rajeevan Chandel, Sankar Sarkar, Ashwani Kumar Chandel