Rajeev R. Rao

15 papers A* 3A 3Journal 7Unranked 2
YearRankTypeTitle / Venue / Authors
2013 J jnl
IBM POWER7+ design for higher frequency at fixed power.
IBM J. Res. Dev.
Victor V. Zyuban, Scott A. Taylor, Birger Christensen, A. R. Hall, Christopher J. Gonzalez, Joshua Friedrich, Frances Clougherty, Jon Tetzloff, Rajeev R. Rao
2009 J jnl
Circuit optimization techniques to mitigate the effects of soft errors in combinational logic.
ACM Trans. Design Autom. Electr. Syst.
Rajeev R. Rao, Vivek Joshi, David T. Blaauw, Dennis Sylvester
2007 J jnl
Computing the Soft Error Rate of a Combinational Logic Circuit Using Parameterized Descriptors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Rajeev R. Rao, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester
2006 A conf
An efficient static algorithm for computing the soft error rates of combinational circuits.
DATE
Rajeev R. Rao, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester
2006 J jnl
Analytical yield prediction considering leakage/performance correlation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Rajeev R. Rao, Anirudh Devgan, David T. Blaauw, Dennis Sylvester
2006 — conf
Logic SER Reduction through Flipflop Redesign.
ISQED
Vivek Joshi, Rajeev R. Rao, David T. Blaauw, Dennis Sylvester
2006 A conf
Soft error reduction in combinational logic using gate resizing and flipflop selection.
ICCAD
Rajeev R. Rao, David T. Blaauw, Dennis Sylvester
2005 — conf
An efficient surface-based low-power buffer insertion algorithm.
ISPD
Rajeev R. Rao, David T. Blaauw, Dennis Sylvester, Charles J. Alpert, Sani R. Nassif
2005 J jnl
Bus encoding for total power reduction using a leakage-aware buffer configuration.
IEEE Trans. Very Large Scale Integr. Syst.
Rajeev R. Rao, Harmander Deogun, David T. Blaauw, Dennis Sylvester
2005 J jnl
Modeling and Analysis of Parametric Yield under Power and Performance Constraints.
IEEE Des. Test Comput.
Rajeev R. Rao, David T. Blaauw, Dennis Sylvester, Anirudh Devgan
2004 A* conf
Leakage-and crosstalk-aware bus encoding for total power reduction.
DAC
Harmander Deogun, Rajeev R. Rao, Dennis Sylvester, David T. Blaauw
2004 A* conf
Parametric yield estimation considering leakage variability.
DAC
Rajeev R. Rao, Anirudh Devgan, David T. Blaauw, Dennis Sylvester
2004 J jnl
Statistical analysis of subthreshold leakage current for VLSI circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Rajeev R. Rao, Ashish Srivastava, David T. Blaauw, Dennis Sylvester
2003 A* conf
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation.
MICRO
Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pant, Rajeev R. Rao, Toan Pham, Conrad H. Ziesler, David T. Blaauw, Todd M. Austin, Krisztián Flautner, Trevor N. Mudge
2003 A conf
Statistical estimation of leakage current considering inter- and intra-die process variation.
ISLPED
Rajeev R. Rao, Ashish Srivastava, David T. Blaauw, Dennis Sylvester