Rajeev Balasubramonian

95 papers A* 42A 2B 14C 4Misc 2Journal 19Unranked 9

Year	Rank	Type	Title / Venue / Authors
2025	—	`conf`	FLEXPROF: Flexible, Side-Channel-Free Memory Access. ASPLOS (2) Jarrett Minton, Rajeev Balasubramonian
2024	A*	`conf`	Hyena: Balancing Packing, Reuse, and Rotations for Encrypted Inference. SP Sarabjeet Singh, Shreyas Singh, Sumanth Gudaparthi, Xiong Fan, Rajeev Balasubramonian
2024	—	`conf`	PATHFINDER: Practical Real-Time Learning for Data Prefetching. ASPLOS (3) Lin Jia, James Patrick Mcmahon, Sumanth Gudaparthi, Shreyas Singh, Rajeev Balasubramonian
2023	J	`jnl`	XCRYPT: Accelerating Lattice Based Cryptography with Memristor Crossbar Arrays. CoRR Sarabjeet Singh, Xiong Fan, Ananth Krishna Prasad, Lin Jia, Anirban Nag, Rajeev Balasubramonian, Mahdi Nazm Bojnordi, Elaine Shi
2023	J	`jnl`	XCRYPT: Accelerating Lattice-Based Cryptography With Memristor Crossbar Arrays. IEEE Micro Sarabjeet Singh, Xiong Fan, Ananth Krishna Prasad, Lin Jia, Anirban Nag, Rajeev Balasubramonian, Mahdi Nazm Bojnordi, Elaine Shi
2022	A*	`conf`	CANDLES: Channel-Aware Novel Dataflow-Microarchitecture Co-Design for Low Energy Sparse Neural Network Acceleration. HPCA Sumanth Gudaparthi, Sarabjeet Singh, Surya Narayanan, Rajeev Balasubramonian, Visvesh Sathe
2022	J	`jnl`	Efficient Oblivious Query Processing for Range and kNN Queries. IEEE Trans. Knowl. Data Eng. Zhao Chang, Dong Xie, Feifei Li, Jeff M. Phillips, Rajeev Balasubramonian
2022	A*	`conf`	Efficient and Oblivious Query Processing for Range and kNN Queries (Extended Abstract). ICDE Zhao Chang, Dong Xie, Feifei Li, Jeff M. Phillips, Rajeev Balasubramonian
2022	J	`jnl`	Interconnects for DNA, Quantum, In-Memory, and Optical Computing: Insights From a Panel Discussion. IEEE Micro Amlan Ganguly, Sergi Abadal, Ishan G. Thakkar, Natalie Enright Jerger, Marc D. Riedel, Masoud Babaie, Rajeev Balasubramonian, Abu Sebastian, Sudeep Pasricha, Baris Taskin
2021	A*	`conf`	Dvé: Improving DRAM Reliability and Performance On-Demand via Coherent Replication. ISCA Adarsh Patil, Vijay Nagarajan, Rajeev Balasubramonian, Nicolai Oswald
2021	Misc	`conf`	ONT-X: An FPGA Approach to Real-time Portable Genomic Analysis. FCCM C. N. Ramachandra, Anirban Nag, Rajeev Balasubramonian, Gurpreet S. Kalsi, Kamlesh R. Pillai, Sreenivas Subramoney
2021	A*	`conf`	OrderLight: Lightweight Memory-Ordering Primitive for Efficient Fine-Grained PIM Computations. MICRO Anirban Nag, Rajeev Balasubramonian
2020	A*	`conf`	Compact Leakage-Free Support for Integrity and Reliability. ISCA Meysam Taassori, Rajeev Balasubramonian, Siddhartha Chhabra, Alaa R. Alameldeen, Manjula Peddireddy, Rajat Agarwal, Ryan Stutsman
2020	A*	`conf`	SpinalFlow: An Architecture and Dataflow Tailored for Spiking Neural Networks. ISCA Surya Narayanan, Karl Taht, Rajeev Balasubramonian, Edouard Giacomin, Pierre-Emmanuel Gaillardon
2019	A*	`conf`	GenCache: Leveraging In-Cache Operators for Efficient Sequence Alignment. MICRO Anirban Nag, C. N. Ramachandra, Rajeev Balasubramonian, Ryan Stutsman, Edouard Giacomin, Hari Kambalasubramanyam, Pierre-Emmanuel Gaillardon
2019	—	`book`	Innovations in the Memory System Rajeev Balasubramonian
2019	B	`conf`	The POP Detector: A Lightweight Online Program Phase Detection Framework. ISPASS Karl Taht, James Greensky, Rajeev Balasubramonian
2019	A*	`conf`	Wire-Aware Architecture and Dataflow for CNN Accelerators. MICRO Sumanth Gudaparthi, Surya Narayanan, Rajeev Balasubramonian, Edouard Giacomin, Hari Kambalasubramanyam, Pierre-Emmanuel Gaillardon
2019	A*	`conf`	ρ: Relaxed Hierarchical ORAM. ASPLOS Chandrasekhar Nagarajan, Ali Shafiee, Rajeev Balasubramonian, Mohit Tiwari
2018	—	`conf`	A Case for Dynamic Activation Quantization in CNNs. EMC2@ASPLOS Karl Taht, Surya Narayanan, Rajeev Balasubramonian
2018	—	`conf`	An MLP-aware leakage-free memory controller. HASP@ISCA Andrew Vuong, Ali Shafiee, Meysam Taassori, Rajeev Balasubramonian
2018	—	`conf`	Moving CNN Accelerator Computations Closer to Data. EMC2@ASPLOS Sumanth Gudaparthi, Surya Narayanan, Rajeev Balasubramonian
2018	J	`jnl`	Newton: Gravitating Towards the Physical Limits of Crossbar Acceleration. CoRR Anirban Nag, Ali Shafiee, Rajeev Balasubramonian, Vivek Srikumar, Naveen Muralimanohar
2018	J	`jnl`	Newton: Gravitating Towards the Physical Limits of Crossbar Acceleration. IEEE Micro Anirban Nag, Rajeev Balasubramonian, Vivek Srikumar, Ross Walker, Ali Shafiee, John Paul Strachan, Naveen Muralimanohar
2018	A*	`conf`	Secure DIMM: Moving ORAM Primitives Closer to Memory. HPCA Ali Shafiee, Rajeev Balasubramonian, Mohit Tiwari, Feifei Li
2018	A*	`conf`	VAULT: Reducing Paging Overheads in SGX with Efficient Integrity Verification Structures. ASPLOS Meysam Taassori, Ali Shafiee, Rajeev Balasubramonian
2017	J	`jnl`	CACTI 7: New Tools for Interconnect Exploration in Innovative Off-Chip Memories. ACM Trans. Archit. Code Optim. Rajeev Balasubramonian, Andrew B. Kahng, Naveen Muralimanohar, Ali Shafiee, Vaishnav Srinivas
2017	B	`conf`	INXS: Bridging the throughput and energy gap for spiking neural networks. IJCNN Surya Narayanan, Ali Shafiee, Rajeev Balasubramonian
2017	B	`conf`	Introspective Computing. PACT Karl Taht, Rajeev Balasubramonian
2016	B	`conf`	Addressing service interruptions in memory with thread-to-rank assignment. ISPASS Manjunath Shevgoor, Rajeev Balasubramonian, Niladrish Chatterjee, Jung-Sik Kim
2016	C	`conf`	Enabling technologies for memory compression: Metadata, mapping, and prediction. ICCD Arjun Deb, Paolo Faraboschi, Ali Shafiee, Naveen Muralimanohar, Rajeev Balasubramonian, Robert Schreiber
2016	A*	`conf`	ISAAC: A Convolutional Neural Network Accelerator with In-Situ Analog Arithmetic in Crossbars. ISCA Ali Shafiee, Anirban Nag, Naveen Muralimanohar, Rajeev Balasubramonian, John Paul Strachan, Miao Hu, R. Stanley Williams, Vivek Srikumar
2016	J	`jnl`	Near-Data Processing [Guest editors' introduction]. IEEE Micro Rajeev Balasubramonian, Boris Grot
2016	C	`conf`	Understanding and alleviating intra-die and intra-DIMM parameter variation in the memory system. ICCD Meysam Taassori, Ali Shafiee, Rajeev Balasubramonian
2015	A*	`conf`	Avoiding information leakage in the memory controller with fixed service policies. MICRO Ali Shafiee, Akhila Gundu, Manjunath Shevgoor, Rajeev Balasubramonian, Mohit Tiwari
2015	A*	`conf`	Efficiently prefetching complex address patterns. MICRO Manjunath Shevgoor, Sahil Koladiya, Rajeev Balasubramonian, Chris Wilkerson, Seth H. Pugsley, Zeshan Chishti
2015	C	`conf`	Fixed-function hardware sorting accelerators for near data MapReduce execution. ICCD Seth H. Pugsley, Arjun Deb, Rajeev Balasubramonian, Feifei Li
2015	C	`conf`	Improving memristor memory with sneak current sharing. ICCD Manjunath Shevgoor, Naveen Muralimanohar, Rajeev Balasubramonian, Yoocharn Jeon
2015	A*	`conf`	Overcoming the challenges of crossbar resistive memory architectures. HPCA Cong Xu, Dimin Niu, Naveen Muralimanohar, Rajeev Balasubramonian, Tao Zhang, Shimeng Yu, Yuan Xie
2014	A*	`ed.`	Architectural Support for Programming Languages and Operating Systems, ASPLOS 2014, Salt Lake City, UT, USA, March 1-5, 2014 ASPLOS Rajeev Balasubramonian, Al Davis, Sarita V. Adve
2014	J	`jnl`	Comparing Implementations of Near-Data Computing with In-Memory MapReduce Workloads. IEEE Micro Seth H. Pugsley, Jeffrey Jestes, Rajeev Balasubramonian, Vijayalakshmi Srinivasan, Alper Buyuktosunoglu, Al Davis, Feifei Li
2014	A	`conf`	Managing DRAM Latency Divergence in Irregular GPGPU Applications. SC Niladrish Chatterjee, Mike O'Connor, Gabriel H. Loh, Nuwan Jayasena, Rajeev Balasubramonian
2014	A*	`conf`	MemZip: Exploring unconventional benefits from memory compression. HPCA Ali Shafiee, Meysam Taassori, Rajeev Balasubramonian, Al Davis
2014	—	`conf`	Memory bandwidth reservation in the cloud to avoid information leakage in the memory controller. HASP@ISCA Akhila Gundu, Gita Sreekumar, Ali Shafiee, Seth H. Pugsley, Hardik B. Jain, Rajeev Balasubramonian, Mohit Tiwari
2014	B	`conf`	NDC: Analyzing the impact of 3D-stacked memory+logic devices on MapReduce workloads. ISPASS Seth H. Pugsley, Jeffrey Jestes, Huihui Zhang, Rajeev Balasubramonian, Vijayalakshmi Srinivasan, Alper Buyuktosunoglu, Al Davis, Feifei Li
2014	J	`jnl`	Near-Data Processing: Insights from a MICRO-46 Workshop. IEEE Micro Rajeev Balasubramonian, Jichuan Chang, Troy Manning, Jaime H. Moreno, Richard Murphy, Ravi Nair, Steven Swanson
2014	A*	`conf`	Sandbox Prefetching: Safe run-time evaluation of aggressive prefetchers. HPCA Seth H. Pugsley, Zeshan Chishti, Chris Wilkerson, Peng-fei Chuang, Robert L. Scott, Aamer Jaleel, Shih-Lien Lu, Kingsum Chow, Rajeev Balasubramonian
2013	A*	`conf`	A novel system architecture for web scale applications using lightweight CPUs and virtualized I/O. HPCA Kshitij Sudan, Saisanthosh Balakrishnan, Sean Lie, Min Xu, Dhiraj Mallick, Gary Lauterbach, Rajeev Balasubramonian
2013	A*	`conf`	Quantifying the relationship between the power delivery network and architectural policies in a 3D-stacked memory device. MICRO Manjunath Shevgoor, Jung-Sik Kim, Niladrish Chatterjee, Rajeev Balasubramonian, Al Davis, Aniruddha N. Udipi
2012	B	`ed.`	2012 IEEE International Symposium on Performance Analysis of Systems & Software, New Brunswick, NJ, USA, April 1-3, 2012 ISPASS Rajeev Balasubramonian, Vijayalakshmi Srinivasan
2012	A*	`conf`	Efficient scrub mechanisms for error-prone emerging memories. HPCA Manu Awasthi, Manjunath Shevgoor, Kshitij Sudan, Bipin Rajendran, Rajeev Balasubramonian, Viji Srinivasan
2012	A*	`conf`	LOT-ECC: Localized and tiered reliability mechanisms for commodity memory systems. ISCA Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi
2012	A*	`conf`	Leveraging Heterogeneity in DRAM Main Memories to Accelerate Critical Word Access. MICRO Niladrish Chatterjee, Manjunath Shevgoor, Rajeev Balasubramonian, Al Davis, Zhen Fang, Ramesh Illikkal, Ravi R. Iyer
2012	J	`jnl`	Managing Data Placement in Memory Systems with Multiple Memory Controllers. Int. J. Parallel Program. Manu Awasthi, David W. Nellans, Kshitij Sudan, Rajeev Balasubramonian, Al Davis
2012	B	`conf`	Optimizing datacenter power with memory system levers for guaranteed quality-of-service. PACT Kshitij Sudan, Sadagopan Srinivasan, Rajeev Balasubramonian, Ravi R. Iyer
2012	A*	`conf`	Staged Reads: Mitigating the impact of DRAM writes on DRAM reads. HPCA Niladrish Chatterjee, Naveen Muralimanohar, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi
2011	—	`ch.`	Buses and Crossbars. Encyclopedia of Parallel Computing Rajeev Balasubramonian, Timothy Mark Pinkston
2011	J	`jnl`	CHOP: Integrating DRAM Caches for CMP Server Platforms. IEEE Micro Xiaowei Jiang, Niti Madan, Li Zhao, Mike Upton, Ravishankar R. Iyer, Srihari Makineni, Donald Newell, Yan Solihin, Rajeev Balasubramonian
2011	A*	`conf`	Combining memory and a controller with photonics through 3D-stacking to enable scalable and energy-efficient systems. ISCA Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi
2011	—	`book`	Multi-Core Cache Hierarchies Rajeev Balasubramonian, Norman P. Jouppi, Naveen Muralimanohar
2011	B	`conf`	Prediction Based DRAM Row-Buffer Management in the Many-Core Era. PACT Manu Awasthi, David W. Nellans, Rajeev Balasubramonian, Al Davis
2011	B	`conf`	Understanding the Behavior of Pthread Applications on Non-Uniform Cache Architectures. PACT Gagandeep S. Sachdev, Kshitij Sudan, Mary W. Hall, Rajeev Balasubramonian
2010	A*	`conf`	CHOP: Adaptive filter-based DRAM caching for CMP server platforms. HPCA Xiaowei Jiang, Niti Madan, Li Zhao, Mike Upton, Ravishankar R. Iyer, Srihari Makineni, Donald Newell, Yan Solihin, Rajeev Balasubramonian
2010	B	`conf`	Handling the problems and opportunities posed by multiple on-chip memory controllers. PACT Manu Awasthi, David W. Nellans, Kshitij Sudan, Rajeev Balasubramonian, Al Davis
2010	B	`conf`	Hardware prediction of OS run-length for fine-grained resource customization. ISPASS David W. Nellans, Kshitij Sudan, Rajeev Balasubramonian, Erik Brunvand
2010	—	`conf`	Improving Server Performance on Multi-cores via Selective Off-Loading of OS Functionality. ISCA Workshops David W. Nellans, Kshitij Sudan, Erik Brunvand, Rajeev Balasubramonian
2010	A*	`conf`	Micro-pages: increasing DRAM efficiency with locality-aware data placement. ASPLOS Kshitij Sudan, Niladrish Chatterjee, David W. Nellans, Manu Awasthi, Rajeev Balasubramonian, Al Davis
2010	A*	`conf`	Rethinking DRAM design and organization for energy-constrained multi-cores. ISCA Aniruddha N. Udipi, Naveen Muralimanohar, Niladrish Chatterjee, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi
2010	B	`conf`	SWEL: hardware cache coherence protocols to map shared data onto shared caches. PACT Seth H. Pugsley, Josef B. Spjut, David W. Nellans, Rajeev Balasubramonian
2010	A*	`conf`	Towards scalable, energy-efficient, bus-based on-chip networks. HPCA Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev Balasubramonian
2009	A*	`conf`	Dynamic hardware-assisted software-controlled page placement to manage capacity allocation and sharing within large caches. HPCA Manu Awasthi, Kshitij Sudan, Rajeev Balasubramonian, John B. Carter
2009	Misc	`conf`	Non-uniform power access in large caches with low-swing wires. HiPC Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev Balasubramonian
2009	J	`jnl`	OS execution on multi-cores: is out-sourcing worthwhile? ACM SIGOPS Oper. Syst. Rev. David W. Nellans, Rajeev Balasubramonian, Erik Brunvand
2009	A*	`conf`	Optimizing communication and capacity in a 3D stacked reconfigurable cache hierarchy. HPCA Niti Madan, Li Zhao, Naveen Muralimanohar, Aniruddha N. Udipi, Rajeev Balasubramonian, Ravishankar R. Iyer, Srihari Makineni, Donald Newell
2008	J	`jnl`	Architecting Efficient Interconnects for Large Caches with CACTI 6.0. IEEE Micro Naveen Muralimanohar, Rajeev Balasubramonian, Norman P. Jouppi
2008	B	`conf`	Scalable and reliable communication for hardware transactional memory. PACT Seth H. Pugsley, Manu Awasthi, Niti Madan, Naveen Muralimanohar, Rajeev Balasubramonian
2007	A*	`conf`	Interconnect design considerations for large NUCA caches. ISCA Naveen Muralimanohar, Rajeev Balasubramonian
2007	A*	`conf`	Leveraging 3D Technology for Improved Reliability. MICRO Niti Madan, Rajeev Balasubramonian
2007	A*	`conf`	Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0. MICRO Naveen Muralimanohar, Rajeev Balasubramonian, Norman P. Jouppi
2007	J	`jnl`	Power Efficient Approaches to Redundant Multithreading. IEEE Trans. Parallel Distributed Syst. Niti Madan, Rajeev Balasubramonian
2007	J	`jnl`	Understanding the Impact of 3D Stacked Layouts on ILP. J. Instr. Level Parallelism Manu Awasthi, Vivek Venkatesan, Rajeev Balasubramonian
2006	A*	`conf`	Interconnect-Aware Coherence Protocols for Chip Multiprocessors. ISCA Liqun Cheng, Naveen Muralimanohar, Karthik Ramani, Rajeev Balasubramonian, John B. Carter
2006	J	`jnl`	Leveraging Wire Properties at the Microarchitecture Level. IEEE Micro Rajeev Balasubramonian, Naveen Muralimanohar, Karthik Ramani, Liqun Cheng, John B. Carter
2006	B	`conf`	Power efficient resource scaling in partitioned architectures through dynamic heterogeneity. ISPASS Naveen Muralimanohar, Karthik Ramani, Rajeev Balasubramonian
2005	A*	`conf`	Microarchitectural Wire Management for Performance and Power in Partitioned Architectures. HPCA Rajeev Balasubramonian, Naveen Muralimanohar, Karthik Ramani, Venkatanand Venkatachalapathy
2004	A	`conf`	Cluster prefetch: tolerating on-chip wire delays in clustered microarchitectures. ICS Rajeev Balasubramonian
2003	J	`jnl`	A Dynamically Tunable Memory Hierarchy. IEEE Trans. Computers Rajeev Balasubramonian, David H. Albonesi, Alper Buyuktosunoglu, Sandhya Dwarkadas
2003	A*	`conf`	Dynamically Managing the Communication-Parallelism Trade-off in Future Clustered Processors. ISCA Rajeev Balasubramonian, Sandhya Dwarkadas, David H. Albonesi
2003	J	`jnl`	Dynamically Tuning Processor Resources with Adaptive Processing. Computer David H. Albonesi, Rajeev Balasubramonian, Steve Dropsho, Sandhya Dwarkadas, Eby G. Friedman, Michael C. Huang, Volkan Kursun, Grigorios Magklis, Michael L. Scott, Greg Semeraro, Pradip Bose, Alper Buyuktosunoglu, Peter W. Cook, Stanley Schuster
2003	—	`conf`	Hot-and-Cold: Using Criticality in the Design of Energy-Efficient Caches. PACS Rajeev Balasubramonian, Viji Srinivasan, Sandhya Dwarkadas, Alper Buyuktosunoglu
2002	A*	`conf`	Energy-Efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling. HPCA Greg Semeraro, Grigorios Magklis, Rajeev Balasubramonian, David H. Albonesi, Sandhya Dwarkadas, Michael L. Scott
2002	—	`conf`	Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power. IEEE PACT Steve Dropsho, Alper Buyuktosunoglu, Rajeev Balasubramonian, David H. Albonesi, Sandhya Dwarkadas, Greg Semeraro, Grigorios Magklis, Michael L. Scott
2001	A*	`conf`	Dynamically allocating processor resources between nearby and distant ILP. ISCA Rajeev Balasubramonian, Sandhya Dwarkadas, David H. Albonesi
2001	A*	`conf`	Reducing the complexity of the register file in dynamic superscalar processors. MICRO Rajeev Balasubramonian, Sandhya Dwarkadas, David H. Albonesi
2000	A*	`conf`	Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures. MICRO Rajeev Balasubramonian, David H. Albonesi, Alper Buyuktosunoglu, Sandhya Dwarkadas