Rainer Dömer - RankMe

95 papers A* 2A 12C 8Misc 4Journal 18Unranked 45

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	Mixed-Level Modeling and Evaluation of a Cache-less Grid of Processing Cells. ACM Trans. Embed. Comput. Syst. Vivek Govindasamy, Rainer Dömer
2025	C	`conf`	A Quantitative Guide to Navigate Speed/Accuracy Tradeoffs in System Level Design of RISC-V Processor Grids. FDL Lars Luchterhandt, Vivek Govindasamy, Yutong Wang, Christoph Scheytt, Wolfgang Müller, Rainer Dömer
2024	A	`conf`	BusyMap, an Efficient Data Structure to Observe Interconnect Contention in SystemC TLM-2.0. DATE Emad Malekzadeh Arasteh, Vivek Govindasamy, Rainer Dömer
2024	J	`jnl`	Fast Loosely-Timed Deep Neural Network Models with Accurate Memory Contention. ACM Trans. Embed. Comput. Syst. Emad Malekzadeh Arasteh, Rainer Dömer
2023	C	`conf`	Instruction-Level Modeling and Evaluation of a Cache-Less Grid of Processing Cells. FDL Vivek Govindasamy, Rainer Dömer
2023	—	`conf`	Towards a Rocket Chip Based Implementation of the RISC-V GPC Architecture. MBMV Lars Luchterhandt, Tom Nellius, Robert Beck, Rainer Dömer, Pascal Kneuper, Wolfgang Mueller, Babak Sadiye
2022	—	`conf`	Demonstrating Scalability of the Checkerboard GPC with SystemC TLM-2.0. IESS Yutong Wang, Arya Daroui, Rainer Dömer
2022	—	`conf`	Minimizing Memory Contention in an APNG Encoder Using a Grid of Processing Cells. IESS Vivek Govindasamy, Emad Malekzadeh Arasteh, Rainer Dömer
2021	C	`conf`	Improving Parallelism in System Level Models by Assessing PDES Performance. FDL Emad Malekzadeh Arasteh, Rainer Dömer
2021	—	`conf`	Pushing the Limits of Parallel Discrete Event Simulation for SystemC. A Journey of Embedded and Cyber-Physical Systems Rainer Dömer, Zhongqi Cheng, Daniel Mendoza, Emad Malekzadeh Arasteh
2021	J	`jnl`	Scaled Static Analysis and IP Reuse for Out-of-Order Parallel SystemC Simulation. Int. J. Parallel Program. Zhongqi Cheng, Tim Schmidt, Rainer Dömer
2020	—	`conf`	Event Delivery using Prediction for Faster Parallel SystemC Simulation. ASP-DAC Zhongqi Cheng, Emad Malekzadeh Arasteh, Rainer Dömer
2020	A	`conf`	Lazy Event Prediction using Defining Trees and Schedule Bypass for Out-of-Order PDES. DATE Daniel Mendoza, Zhongqi Cheng, Emad Malekzadeh Arasteh, Rainer Dömer
2019	—	`conf`	An Untimed SystemC Model of GoogLeNet. IESS Emad Malekzadeh Arasteh, Rainer Dömer
2019	J	`jnl`	Analyzing Variable Entanglement for Parallel Simulation of SystemC TLM-2.0 Models. ACM Trans. Embed. Comput. Syst. Zhongqi Cheng, Rainer Dömer
2018	A	`conf`	Port call path sensitive conflict analysis for instance-aware parallel SystemC simulation. DATE Tim Schmidt, Zhongqi Cheng, Rainer Dömer
2018	C	`conf`	SystemC Coding Guideline for Faster Out-of-order Parallel Discrete Event Simulation. FDL Zhongqi Cheng, Tim Schmidt, Rainer Dömer
2017	A*	`conf`	Exploiting Thread and Data Level Parallelism for Ultimate Parallel SystemC Simulation. DAC Tim Schmidt, Guantao Liu, Rainer Dömer
2017	—	`conf`	Hybrid analysis of SystemC models for fast and accurate parallel simulation. ASP-DAC Tim Schmidt, Guantao Liu, Rainer Dömer
2017	—	`ch.`	Introduction to Hardware/Software Codesign. Handbook of Hardware/Software Codesign Soonhoi Ha, Jürgen Teich, Christian Haubelt, Michael Glaß, Tulika Mitra, Rainer Dömer, Petru Eles, Aviral Shrivastava, Andreas Gerstlauer, Shuvra S. Bhattacharyya
2017	—	`ch.`	Parallel Simulation. Handbook of Hardware/Software Codesign Rainer Dömer, Guantao Liu, Tim Schmidt
2017	—	`ch.`	SCE: System-on-Chip Environment. Handbook of Hardware/Software Codesign Gunar Schirner, Andreas Gerstlauer, Rainer Dömer
2017	—	`conf`	Thread- and data-level parallel simulation in SystemC, a Bitcoin miner case study. HLDVT Zhongqi Cheng, Tim Schmidt, Guantao Liu, Rainer Dömer
2016	—	`conf`	A segment-aware multi-core scheduler for system C PDES. HLDVT Guantao Liu, Tim Schmidt, Rainer Dömer
2016	C	`conf`	Automatic Generation of Thread Communication Graphs from SystemC Source Code. SCOPES Tim Schmidt, Guantao Liu, Rainer Dömer
2016	J	`jnl`	Seven Obstacles in the Way of Standard-Compliant Parallel SystemC Simulation. IEEE Embed. Syst. Lett. Rainer Dömer
2015	—	`conf`	Communication protocol analysis of transaction-level models using Satisfiability Modulo Theories. ASP-DAC Che-Wei Chang, Rainer Dömer
2015	A	`conf`	May-happen-in-parallel analysis of ESL models using UPPAAL model checking. DATE Che-Wei Chang, Rainer Dömer
2015	—	`conf`	Optimizing thread-to-core mapping on manycore platforms with distributed Tag Directories. ASP-DAC Guantao Liu, Tim Schmidt, Rainer Dömer, Ajit Dingankar, Desmond Kirkpatrick
2014	—	`conf`	A Program State Machine Based Virtual Processing Model in SystemC. EWiLi Tim Schmidt, Kim Grüttner, Rainer Dömer, Achim Rettberg
2014	J	`jnl`	A program state machine based virtual processing model in SystemC. SIGBED Rev. Tim Schmidt, Kim Grüttner, Rainer Dömer, Achim Rettberg
2014	C	`conf`	Automated estimation of power consumption for rapid system level design. IPCCC Yasaman Samei Syahkal, Rainer Dömer
2014	A	`conf`	May-happen-in-parallel analysis based on segment graphs for safe ESL models. DATE Weiwei Chen, Xu Han, Rainer Dömer
2014	J	`jnl`	Out-of-Order Parallel Discrete Event Simulation for Transaction Level Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Weiwei Chen, Xu Han, Che-Wei Chang, Guantao Liu, Rainer Dömer
2014	C	`conf`	Powermonitor: a versatile API for automated power-aware ESL design. FDL Yasaman Samei Syahkal, Rainer Dömer
2013	J	`jnl`	Advances in Parallel Discrete Event Simulation for Electronic System-Level Design. IEEE Des. Test Weiwei Chen, Xu Han, Che-Wei Chang, Rainer Dömer
2013	—	`conf`	Designer-in-the-loop recoding of ESL models using static parallel access conflict analysis. M-SCOPES Xu Han, Weiwei Chen, Rainer Dömer
2013	—	`conf`	Formal Deadlock Analysis of SpecC Models Using Satisfiability Modulo Theories. IESS Che-Wei Chang, Rainer Dömer
2013	A	`conf`	Optimized out-of-order parallel discrete event simulation using predictions. DATE Weiwei Chen, Rainer Dömer
2013	—	`conf`	TECSCE: HW/SW Codesign Framework for Data Parallelism Based on Software Component. IESS Takuya Azumi, Yasaman Samei Syahkal, Yuko Hara-Azumi, Hiroshi Oyama, Rainer Dömer
2012	—	`conf`	An optimizing compiler for out-of-order parallel ESL simulation exploiting instance isolation. ASP-DAC Weiwei Chen, Rainer Dömer
2012	J	`jnl`	Computer-Aided Recoding to Create Structured and Analyzable System Models. ACM Trans. Embed. Comput. Syst. Pramod Chandraiah, Rainer Dömer
2012	—	`conf`	Eliminating race conditions in system-level models by using parallel simulation infrastructure. HLDVT Weiwei Chen, Che-Wei Chang, Xu Han, Rainer Dömer
2012	A	`conf`	Out-of-order parallel simulation for ESL design. DATE Weiwei Chen, Xu Han, Rainer Dömer
2012	—	`conf`	Parallel discrete event simulation of Transaction Level Models. ASP-DAC Rainer Dömer, Weiwei Chen, Xu Han
2011	—	`conf`	Multi-core parallel simulation of System-level Description Languages. ASP-DAC Rainer Dömer, Weiwei Chen, Xu Han, Andreas Gerstlauer
2011	J	`jnl`	Multicore Simulation of Transaction-Level Models Using the SoC Environment. IEEE Des. Test Comput. Weiwei Chen, Xu Han, Rainer Dömer
2010	—	`conf`	A fast heuristic scheduling algorithm for periodic ConcurrenC models. ASP-DAC Weiwei Chen, Rainer Dömer
2010	—	`conf`	Computer-aided recoding for multi-core systems. ASP-DAC Rainer Dömer
2010	—	`conf`	ESL design and multi-core validation using the System-on-Chip Environment. HLDVT Weiwei Chen, Xu Han, Rainer Dömer
2010	J	`jnl`	Fast and accurate processor models for efficient MPSoC design. ACM Trans. Design Autom. Electr. Syst. Gunar Schirner, Andreas Gerstlauer, Rainer Dömer
2010	A	`conf`	Panel Session - Who Is Closing the embedded software design gap? DATE Wolfgang Ecker, Pierre Bricaud, Rainer Dömer, Yossi Veller, Stefan Heinen, Jürgen Mössinger, Andreas von Schwerin
2010	—	`conf`	System-level development of embedded software. ASP-DAC Gunar Schirner, Andreas Gerstlauer, Rainer Dömer
2009	—	`conf`	A Configurable TLM of Wireless Sensor Networks for Fast Exploration of System Communication Performance. IESS Ines Viskic, Rainer Dömer
2009	—	`conf`	ConcurrenC: A New Approach towards Effective Abstraction of C-Based SLDLs. IESS Weiwei Chen, Rainer Dömer
2009	—	`conf`	Efficient Modeling of Embedded Systems Using Computer-Aided Recoding. IESS Rainer Dömer
2009	—	`conf`	Introduction to hardware-dependent software design hardware-dependent software for multi- and many-core embedded systems. ASP-DAC Rainer Dömer, Andreas Gerstlauer, Wolfgang Müller
2009	A	`conf`	Programming MPSoC platforms: Road works ahead! DATE Rainer Leupers, Andras Vajda, Marco Bekooij, Soonhoi Ha, Rainer Dömer, Achim Nohl
2008	J	`jnl`	An Interactive Design Environment for C-Based High-Level Synthesis of RTL Processors. IEEE Trans. Very Large Scale Integr. Syst. Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel Gajski
2008	—	`conf`	Automatic generation of hardware dependent software for MPSoCs from abstract system specifications. ASP-DAC Gunar Schirner, Andreas Gerstlauer, Rainer Dömer
2008	—	`conf`	Automatic re-coding of reference code into structured and analyzable SoC models. ASP-DAC Pramod Chandraiah, Rainer Dömer
2008	J	`jnl`	Code and Data Structure Partitioning for Parallel and Flexible MPSoC Specification Using Designer-Controlled Recoding. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Pramod Chandraiah, Rainer Dömer
2008	A	`conf`	Introducing Preemptive Scheduling in Abstract RTOS Models using Result Oriented Modeling. DATE Gunar Schirner, Rainer Dömer
2008	J	`jnl`	Quantitative analysis of the speed/accuracy trade-off in transaction level modeling. ACM Trans. Embed. Comput. Syst. Gunar Schirner, Rainer Dömer
2008	J	`jnl`	System-on-Chip Environment: A SpecC-Based Framework for Heterogeneous MPSoC Design. EURASIP J. Embed. Syst. Rainer Dömer, Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Lukai Cai, Haobo Yu, Samar Abdi, Daniel D. Gajski
2007	—	`conf`	Abstract, Multifaceted Modeling of Embedded Processors for System Level Design. ASP-DAC Gunar Schirner, Andreas Gerstlauer, Rainer Dömer
2007	—	`conf`	An Interactive Design Environment for C-based High-Level Synthesis. IESS Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski
2007	—	`conf`	An Interactive Model Re-Coder for Efficient SoC Specification. IESS Pramod Chandraiah, Rainer Dömer
2007	J	`jnl`	Automatic Layer-Based Generation of System-On-Chip Bus Communication Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Andreas Gerstlauer, Dongwan Shin, Junyu Peng, Rainer Dömer, Daniel Gajski
2007	—	`conf`	Creating Explicit Communication in SoC Models Using Interactive Re-Coding. ASP-DAC Pramod Chandraiah, Junyu Peng, Rainer Dömer
2007	A*	`conf`	Designer-Controlled Generation of Parallel and Flexible Heterogeneous MPSoC Specification. DAC Pramod Chandraiah, Rainer Dömer
2007	—	`conf`	Embedded Software Development in a System-Level Design Flow. IESS Gunar Schirner, Gautam Sachdeva, Andreas Gerstlauer, Rainer Dömer
2007	—	`ed.`	Embedded System Design: Topics, Techniques and Trends, IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30 - June 1, 2007, Irvine, CA, USA IESS Achim Rettberg, Mauro Cesar Zanella, Rainer Dömer, Andreas Gerstlauer, Franz-Josef Rammig
2007	Misc	`conf`	Pointer re-coding for creating definitive MPSoC models. CODES+ISSS Pramod Chandraiah, Rainer Dömer
2007	J	`jnl`	Result-Oriented Modeling - A Novel Technique for Fast and Accurate TLM. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Gunar Schirner, Rainer Dömer
2006	C	`conf`	A Flexible, Syntax Independent Representation (SIR) for System Level Design Models. DSD Ines Viskic, Rainer Dömer
2006	Misc	`conf`	Accurate yet fast modeling of real-time communication. CODES+ISSS Gunar Schirner, Rainer Dömer
2006	Misc	`conf`	Automatic generation of transaction level models for rapid design space exploration. CODES+ISSS Dongwan Shin, Andreas Gerstlauer, Junyu Peng, Rainer Dömer, Daniel D. Gajski
2006	A	`conf`	Fast and accurate transaction level models using result oriented modeling. ICCAD Gunar Schirner, Rainer Dömer
2006	A	`conf`	Quantitative analysis of transaction level models for the AMBA bus. DATE Gunar Schirner, Rainer Dömer
2005	—	`conf`	Abstract Communication Modeling. IESS Gunar Schirner, Rainer Dömer
2005	—	`conf`	Automatic Generation of Communication Architectures. IESS Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski
2005	Misc	`conf`	Automatic network generation for system-on-chip communication design. CODES+ISSS Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski
2005	—	`conf`	Software and Driver Synthesis from Transaction Level Models. IESS Haobo Yu, Rainer Dömer, Daniel D. Gajski
2005	—	`conf`	System-level communication modeling for network-on-chip synthesis. ASP-DAC Andreas Gerstlauer, Dongwan Shin, Rainer Dömer, Daniel D. Gajski
2004	—	`conf`	Embedded software generation from system level design languages. ASP-DAC Haobo Yu, Rainer Dömer, Daniel Gajski
2002	—	`conf`	The Formal Execution Semantics of SpecC. ISSS Rainer Dömer, Andreas Gerstlauer, Wolfgang Müller
2001	—	`book`	System Design - A Practical Guide with SpecC. Andreas Gerstlauer, Rainer Dömer, Junyu Peng, Daniel D. Gajski
2000	—	`conf`	Reuse and protection of intellectual property in the SpecC system. ASP-DAC Rainer Dömer, Daniel Gajski
2000	—	`—`	System-level modeling and design with the SpecC language. Rainer Dömer
1998	—	`conf`	IP-Centric Methodology and Specification Language. DIPES Daniel Gajski, Rainer Dömer, Jianwen Zhu
1998	J	`jnl`	Specification and Design of Embedded Systems. Informationstechnik Tech. Inform. Rainer Dömer, Daniel D. Gajski, Jianwen Zhu
1997	—	`conf`	Built-in chaining: introducing complex components into architectural synthesis. ASP-DAC Peter Marwedel, Birger Landwehr, Rainer Dömer
1996	—	`conf`	A Technique for Avoiding Isomorphic Netlists in Architectural Synthesis. ED&TC Peter Marwedel, Steven Bashford, Rainer Dömer, Birger Landwehr, Ingolf Markhof
1994	—	`conf`	OSCAR: optimum simultaneous scheduling, allocation and resource binding based on integer programming. EURO-DAC Birger Landwehr, Peter Marwedel, Rainer Dömer