Rahul Rithe

12 papers A 1Misc 1Journal 6Unranked 3
YearRankTypeTitle / Venue / Authors
2014 J jnl
Correction to "Reconfigurable Processor for Energy-Efficient Computational Photography".
IEEE J. Solid State Circuits
Rahul Rithe, Priyanka Raina, Nathan Ickes, Srikanth V. Tenneti, Anantha P. Chandrakasan
2014 — —
Energy-efficient system design for mobile processing platforms.
Rahul Rithe
2013 J jnl
Reconfigurable Processor for Energy-Efficient Computational Photography.
IEEE J. Solid State Circuits
Rahul Rithe, Priyanka Raina, Nathan Ickes, Srikanth V. Tenneti, Anantha P. Chandrakasan
2013 — conf
Reconfigurable processor for energy-scalable computational photography.
ISSCC
Rahul Rithe, Priyanka Raina, Nathan Ickes, Srikanth V. Tenneti, Anantha P. Chandrakasan
2012 J jnl
A 28 nm 0.6 V Low Power DSP for Mobile Applications.
IEEE J. Solid State Circuits
Nathan Ickes, Gordon Gammie, Mahmut E. Sinangil, Rahul Rithe, Jie Gu, Alice Wang, Hugh Mair, Satyendra Datla, Bing Rong, Sushma Honnavara Prasad, Lam Ho, Greg Baldwin, Dennis Buss, Anantha P. Chandrakasan, Uming Ko
2012 J jnl
Design of Low-Voltage Digital Building Blocks and ADCs for Energy-Efficient Systems.
IEEE Trans. Circuits Syst. II Express Briefs
Mahmut E. Sinangil, Marcus Yip, Masood Qazi, Rahul Rithe, Joyce Kwong, Anantha P. Chandrakasan
2012 J jnl
Quad Full-HD Transform Engine for Dual-Standard Low-Power Video Coding.
IEEE J. Solid State Circuits
Rahul Rithe, Chih-Chi Cheng, Anantha P. Chandrakasan
2012 J jnl
The Effect of Random Dopant Fluctuations on Logic Timing at Low Voltage.
IEEE Trans. Very Large Scale Integr. Syst.
Rahul Rithe, Sharon Chou, Jie Gu, Alice Wang, Satyendra Datla, Gordon Gammie, Dennis Buss, Anantha P. Chandrakasan
2011 — conf
A 28nm 0.6V low-power DSP for mobile applications.
ISSCC
Gordon Gammie, Nathan Ickes, Mahmut E. Sinangil, Rahul Rithe, Jie Gu, Alice Wang, Hugh Mair, Satyendra Datla, Bing Rong, Sushma Honnavara Prasad, Lam Ho, Greg Baldwin, Dennis Buss, Anantha P. Chandrakasan, Uming Ko
2011 Misc conf
Cell Library Characterization at Low Voltage Using Non-linear Operating Point Analysis of Local Variations.
VLSI Design
Rahul Rithe, Sharon Chou, Jie Gu, Alice Wang, Satyendra Datla, Gordon Gammie, Dennis Buss, Anantha P. Chandrakasan
2011 — conf
Quad Full-HD transform engine for dual-standard low-power video coding.
A-SSCC
Rahul Rithe, Chih-Chi Cheng, Anantha P. Chandrakasan
2010 A conf
Non-linear Operating Point Statistical Analysis for Local Variations in logic timing at low voltage.
DATE
Rahul Rithe, Jie Gu, Alice Wang, Satyendra Datla, Gordon Gammie, Dennis Buss, Anantha P. Chandrakasan