Raghavendra B. Deshmukh

18 papers B 1Misc 1Journal 8Unranked 8
YearRankTypeTitle / Venue / Authors
2025 J jnl
Analysis of Outdoor Air Quality Using Low-Cost MEMS-Based Electronic Nose and Gas Analyzer With Multivariate Statistical Approach.
IEEE Embed. Syst. Lett.
Tushar Gawande, Raghavendra B. Deshmukh, Sharvari Deshmukh
2022 J jnl
Optimization of elliptic curve scalar multiplication using constraint based scheduling.
J. Parallel Distributed Comput.
Pravin Zode, Raghavendra B. Deshmukh
2021 J jnl
Novel fault attack resistant architecture for elliptic curve cryptography.
Microprocess. Microsystems
Pravin Zode, Raghavendra B. Deshmukh
2020 J jnl
A Machine Condition Monitoring Framework Using Compressed Signal Processing.
Sensors
Meenu Rani, Sanjay B. Dhok, Raghavendra B. Deshmukh
2020 J jnl
Overlap Aware Compressed Signal Classification.
IEEE Access
Meenu Rani, Sanjay B. Dhok, Raghavendra B. Deshmukh, Punit Kumar
2018 — conf
Design and Fabrication of Versatile Low Power Wireless Sensor Nodes for IoT Applications.
VDAT
Saket Thool, Raghavendra B. Deshmukh, Rajendra M. Patrikar
2018 — conf
Real Time Mixing Index Measurement of Microchannels Using OpenCV.
VDAT
Khuushi, Vanadana Jain, Rajendra M. Patrikar, Raghavendra B. Deshmukh
2018 J jnl
Self-compensation scheme for truncation error in fixed width multipliers.
IET Circuits Devices Syst.
Pankaj U. Joshi, Raghavendra B. Deshmukh, Venkateshwarlu Gudur
2018 — conf
Supply and Temperature Independent Voltage Reference Circuit in Subthreshold Region.
VDAT
Vineysarathi Kokkula, Akash Joshi, Raghavendra B. Deshmukh
2017 — conf
Fast Architecture of Modular Inversion Using Itoh-Tsujii Algorithm.
VDAT
Pravin Zode, Raghavendra B. Deshmukh, Abdus Samad
2016 — conf
Data dependent spurious power reduction for fixed width multiplier.
VDAT
Bharti Navlani, Pankaj U. Joshi, Raghavendra B. Deshmukh
2016 J jnl
Design of resolution/power controllable Asynchronous Sigma-Delta Modulator.
EURASIP J. Adv. Signal Process.
Anita Arvind Deshmukh, Raghavendra B. Deshmukh
2015 — conf
Side channel attack resistant architecture for elliptic curve cryptography.
VDAT
Pravin Zode, Raghavendra B. Deshmukh
2013 — conf
Computational Functions' VLSI Implementation for Compressed Sensing.
VDAT
Shrirang Korde, Amol Khandare, Raghavendra B. Deshmukh, Rajendra M. Patrikar
2011 — conf
Low Power Asynchronous Sigma-Delta Modulator Using Hysteresis Level Control.
ISVLSI
Anita Arvind Deshmukh, Raghavendra B. Deshmukh, Rajendra M. Patrikar
2009 J jnl
Design of Low Power Parallel Multiplier.
J. Low Power Electron.
Rahul M. Badghare, Sanjiv Kumar Mangal, Raghavendra B. Deshmukh, Rajendra M. Patrikar
2007 Misc conf
FPGA Implementation of Low Power Parallel Multiplier.
VLSI Design
Sanjiv Kumar Mangal, Raghavendra B. Deshmukh, Rahul M. Badghare, Rajendra M. Patrikar
2006 B conf
Powering Wireless Sensor Nodes using Ambient RF Energy.
SMC
Shantanu A. Bhalerao, Abhishek V. Chaudhary, Raghavendra B. Deshmukh, Rajendra M. Patrikar