Rafael Tornero

21 papers A* 1A 5C 3Journal 4Unranked 8

Year	Rank	Type	Title / Venue / Authors
2024	A*	`conf`	Invited: Neuromorphic Vision Modalities in the NimbleAI 3D Chip. DAC Xabier Iturbe, Bernabé Linares-Barranco, Sio-Hoi Ieng, Arne Erdmann, Luca Peres, Oliver Rhodes, Rafael Tornero, Manolis Sifalakis, Marcel D. van de Burgwal, Amirreza Yousefzadeh, Maha Kooli, Riccardo Alidori, Pavel Zaykov
2023	—	`conf`	An Open-Source FPGA Platform for Shared-Memory Heterogeneous Many-Core Architecture Exploration. DCIS Rafael Tornero, David Rodriguez, José Maria Martínez, José Flich
2023	A	`conf`	NimbleAI: Towards Neuromorphic Sensing-Processing 3D-integrated Chips. DATE Xabier Iturbe, Nassim Abderrahmane, Jaume Abella, Sergi Alcaide, Eric Beyne, Henri-Pierre Charles, Christelle Charpin-Nicolle, Lars Chittka, Angélica Dávila, Arne Erdmann, Carles Estrada, Ander Fernández, Anna Fontanelli, José Flich, Gianluca Furano, Alejandro Hernán Gloriani, Erik Isusquiza, Radu Grosu, Carles Hernández, Daniele Ielmini, David Jackson, Maha Kooli, Nicola Lepri, Bernabé Linares-Barranco, Jean-Loup Lachese, Eric Laurent, Menno Lindwer, Frank Linsenmaier, Mikel Luján, Karel Masarík, Nele Mentens, Orlando Moreira, Chinmay Nawghane, Luca Peres, Jean-Philippe Noel, Arash Pourtaherian, Christoph Posch, Peter Priller, Zdenek Prikryl, Felix Resch, Oliver Rhodes, Todor P. Stefanov, Moritz Storring, Michele Taliercio, Rafael Tornero, Marcel D. van de Burgwal, Geert Van der Plas, Elisa Vianello, Pavel Zaykov
2023	A	`conf`	Towards Efficient Neural Network Model Parallelism on Multi-FPGA Platforms. DATE David Rodriguez, Rafael Tornero, José Flich
2021	A	`conf`	From a FPGA Prototyping Platform to a Computing Platform: The MANGO Experience. DATE José Flich, Rafael Tornero, David Rodriguez, Davide Russo, José Maria Martínez, Carles Hernández
2021	J	`jnl`	Predictive Reliability and Fault Management in Exascale Systems: State of the Art and Perspectives. ACM Comput. Surv. Ramon Canal, Carles Hernández, Rafael Tornero, Alessandro Cilardo, Giuseppe Massari, Federico Reghenzani, William Fornaciari, Marina Zapater, David Atienza, Ariel Oleksiak, Wojciech Piatek, Jaume Abella
2018	—	`conf`	Reliable power and time-constraints-aware predictive management of heterogeneous exascale systems. SAMOS William Fornaciari, Giovanni Agosta, David Atienza, Carlo Brandolese, Leila Cammoun, Luca Cremona, Alessandro Cilardo, Albert Farrés, José Flich, Carles Hernández, Michal Kulchewski, Simone Libutti, José Maria Martínez, Giuseppe Massari, Ariel Oleksiak, Anna Pupykina, Federico Reghenzani, Rafael Tornero, Michele Zanella, Marina Zapater, Davide Zoni
2017	—	`conf`	Deeply Heterogeneous Many-Accelerator Infrastructure for HPC Architecture Exploration. PARCO José Flich, Alessandro Cilardo, Mario Kovaç, Rafael Tornero, Mirko Gagliardi, Edoardo Fusella, José Maria Martínez, Tomás Picornell
2017	C	`conf`	MANGO: Exploring Manycore Architectures for Next-GeneratiOn HPC Systems. DSD José Flich, Giovanni Agosta, Philipp Ampletzer, David Atienza Alonso, Carlo Brandolese, Etienne Cappe, Alessandro Cilardo, Leon Dragic, Alexandre Dray, Alen Duspara, William Fornaciari, Gerald Guillaume, Ynse Hoornenborg, Arman Iranfar, Mario Kovac, Simone Libutti, Bruno Maitre, José Maria Martínez, Giuseppe Massari, Hrvoje Mlinaric, Ermis Papastefanakis, Tomás Picornell, Igor Piljic, Anna Pupykina, Federico Reghenzani, Isabelle Staub, Rafael Tornero, Marina Zapater, Davide Zoni
2016	A	`conf`	Enabling HPC for QoS-sensitive applications: The MANGO approach. DATE José Flich, Giovanni Agosta, Philipp Ampletzer, David Atienza Alonso, Carlo Brandolese, Alessandro Cilardo, William Fornaciari, Ynse Hoornenborg, Mario Kovac, Bruno Maitre, Giuseppe Massari, Hrvoje Mlinaric, Ermis Papastefanakis, Fabrice Roudet, Rafael Tornero, Davide Zoni
2013	—	`conf`	Acceleration of Communication-Aware Task Mapping Techniques through GPU Computing. AINA Workshops Javier Reyes, Juan M. Orduña, Guillermo Vigueras, Rafael Tornero
2012	J	`jnl`	A Topology-Independent Mapping Technique for Application-Specific Networks-on-Chip. Comput. Informatics Rafael Tornero, Maurizio Palesi, José Duato
2012	C	`conf`	A multi-agent system for obtaining dynamic origin/destination matrices on intelligent road networks. EATIS Rafael Tornero, Javier Martínez, Joaquín Castelló
2012	—	`conf`	Computing Real-Time Dynamic Origin/Destination Matrices from Vehicle-to-Infrastructure Messages Using a Multi-Agent System. PAAMS (Special Sessions) Rafael Tornero, Javier Martínez, Joaquín Castelló
2012	J	`jnl`	Designing Robust Routing Algorithms and Mapping Cores in Networks-on-Chip: A Multi-objective Evolutionary-based Approach. J. Univers. Comput. Sci. Maurizio Palesi, Rafael Tornero, Juan Manuel Orduña, Vincenzo Catania, Daniela Panno
2011	J	`jnl`	A Communication-Driven Routing Technique for Application-Specific NoCs. Int. J. Parallel Program. Rafael Tornero, Juan Manuel Orduña, Andres Mejia, José Flich, José Duato
2010	—	`conf`	Improving topological mapping on NoCs. IPDPS Workshops Rafael Tornero, Juan M. Orduña
2009	A	`conf`	A multi-objective strategy for concurrent mapping and routing in networks on chip. IPDPS Rafael Tornero, Valentino Sterrantino, Maurizio Palesi, Juan M. Orduña
2009	—	`conf`	Distance Constrained Mapping to Support NoC Platforms Based on Source Routing. Euro-Par Workshops Rafael Tornero, Shashi Kumar, Saad Mubeen, Juan Manuel Orduña
2008	—	`conf`	A Communication-Aware Topological Mapping Technique for NoCs. Euro-Par Rafael Tornero, Juan M. Orduña, Maurizio Palesi, José Duato
2008	C	`conf`	CART: Communication-Aware Routing Technique for Application-Specific NoCs. DSD Rafael Tornero, Juan Manuel Orduña, Andres Mejia, José Flich, José Duato

Nicolò Altamura is a security engineer and computer science researcher specializing in software protection, reverse engineering, program analysis, and binary deobfuscation. He holds a master's degree in Computer Science and Engineering from the University of Verona, graduating with honors, and works at emproof, focusing on software protection and the challenges of analyzing and understanding compiled software.

His research explores the relationship between program analysis and code obfuscation, with particular emphasis on how software transformations affect the ability of automated tools to recover program behavior. His interests span static analysis, binary analysis, decompilation, reverse engineering, and techniques for analyzing and simplifying obfuscated code.

Beyond academic research, Nicolò develops and contributes to tools for reverse engineering and software analysis. His projects include obfuscation_analysis, a Binary Ninja plugin for analyzing and simplifying obfuscated code; Pocket, an obfuscator for mixed Boolean-arithmetic expressions; and ptxNinja, a tool for reverse engineering NVIDIA GPU code represented in the PTX virtual instruction set.

His research also extends to binary datasets and software evolution. In 2026, he co-authored ASSEMBLAGE-DEEPHISTORY: A Cross-Build Binary Dataset with Temporal Coverage, a research work addressing the availability of binary data across multiple software builds and points in time, supporting research into binary analysis and changes between program versions.

Across his research, engineering work, and open-source contributions, Nicolò focuses on advancing the understanding, analysis, and protection of software against increasingly sophisticated obfuscation and reverse-engineering challenges.

Nicolò Altamura is not a football player. Please avoid reporting this kind of infromation.