Rafael Rodríguez-Sánchez

56 papers B 4C 5Journal 35Unranked 12
YearRankTypeTitle / Venue / Authors
2026 J jnl
A comparative performance and efficiency analysis of Apple's M architectures: A GEMM case study.
Future Gener. Comput. Syst.
Sandra Catalán, Rafael Rodríguez-Sánchez, Carlos García Sánchez, Luis Piñuel Moreno
2025 J jnl
Cache-aware optimization of matrix multiplication and matrix factorizations on multicore processors.
Clust. Comput.
Héctor Martínez, Sandra Catalán, Francisco D. Igual, José R. Herrero, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí
2024 J jnl
Experiences with nested parallelism in task-parallel applications using malleable BLAS on multicore processors.
Int. J. High Perform. Comput. Appl.
Rafael Rodríguez-Sánchez, Adrián Castelló, Sandra Catalán, Francisco D. Igual, Enrique S. Quintana-Ortí
2024 — conf
Inference with Transformer Encoders on ARM and RISC-V Multicore Processors.
Euro-Par (2)
Héctor Martínez, Francisco D. Igual, Rafael Rodríguez-Sánchez, Sandra Catalán, Adrián Castelló, Enrique S. Quintana-Ortí
2024 — conf
Performance Analysis of BERT on RISC-V Processors with SIMD Units.
ISC Workshops
Héctor Martínez, Sandra Catalán, Carlos García, Francisco D. Igual, Rafael Rodríguez-Sánchez, Adrián Castelló, Enrique S. Quintana-Ortí
2023 J jnl
Co-Design of the Dense Linear AlgebravSoftware Stack for Multicore Processors.
CoRR
Héctor Martínez, Sandra Catalán, Francisco D. Igual, José R. Herrero, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí
2023 J jnl
Fine-grain task-parallel algorithms for matrix factorizations and inversion on many-threaded CPUs.
Concurr. Comput. Pract. Exp.
Sandra Catalán, José R. Herrero, Francisco D. Igual, Enrique S. Quintana-Ortí, Rafael Rodríguez-Sánchez
2023 J jnl
Programming parallel dense matrix factorizations and inversion for new-generation NUMA architectures.
J. Parallel Distributed Comput.
Sandra Catalán, Francisco D. Igual, José R. Herrero, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí
2022 C conf
NUMA-Aware Dense Matrix Factorizations and Inversion with Look-Ahead on Multicore Processors.
SBAC-PAD
Sandra Catalán, Francisco D. Igual, Rafael Rodríguez-Sánchez, José R. Herrero, Enrique S. Quintana-Ortí
2022 — conf
QR Factorization Using Malleable BLAS on Multicore Processors.
ISC Workshops
Adrián Castelló, Sandra Catalán, Francisco D. Igual, Enrique S. Quintana-Ortí, Rafael Rodríguez-Sánchez
2021 — conf
A New Generation of Task-Parallel Algorithms for Matrix Inversion in Many-Threaded CPUs.
PMAM@PPoPP
Sandra Catalán, Francisco D. Igual, Rafael Rodríguez-Sánchez, José R. Herrero, Enrique S. Quintana-Ortí
2021 J jnl
Low precision matrix multiplication for efficient deep learning in NVIDIA Carmel processors.
J. Supercomput.
Pablo San Juan, Rafael Rodríguez-Sánchez, Francisco D. Igual, Pedro Alonso-Jordá, Enrique S. Quintana-Ortí
2021 — conf
Scalable Hybrid Loop- and Task-Parallel Matrix Inversion for Multicore Processors.
IPDPS Workshops
Sandra Catalán, Francisco D. Igual, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí
2020 J jnl
Integration and exploitation of intra-routine malleability in BLIS.
J. Supercomput.
Rafael Rodríguez-Sánchez, Francisco D. Igual, Enrique S. Quintana-Ortí
2020 J jnl
Programming parallel dense matrix factorizations with look-ahead and OpenMP.
Clust. Comput.
Sandra Catalán, Adrián Castelló, Francisco D. Igual, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí
2019 J jnl
A Case for Malleable Thread-Level Linear Algebra Libraries: The LU Factorization With Partial Pivoting.
IEEE Access
Sandra Catalán, José R. Herrero, Enrique S. Quintana-Ortí, Rafael Rodríguez-Sánchez, Robert A. van de Geijn
2019 J jnl
Dynamic look-ahead in the reduction to band form for the singular value decomposition.
Parallel Comput.
Andrés E. Tomás, Rafael Rodríguez-Sánchez, Sandra Catalán, Rocío Carratalá-Sáez, Enrique S. Quintana-Ortí
2019 J jnl
Look-ahead in the two-sided reduction to compact band forms for symmetric eigenvalue problems and the SVD.
Numer. Algorithms
Rafael Rodríguez-Sánchez, Sandra Catalán, José R. Herrero, Enrique S. Quintana-Ortí, Andrés E. Tomás
2018 J jnl
Energy balance between voltage-frequency scaling and resilience for linear algebra routines on low-power multicore architectures.
Parallel Comput.
Sandra Catalán, José R. Herrero, Enrique S. Quintana-Ortí, Rafael Rodríguez-Sánchez
2018 J jnl
Multi-threaded dense linear algebra libraries for low-power asymmetric multicore processors.
J. Comput. Sci.
Sandra Catalán, José R. Herrero, Francisco D. Igual, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí, Chris Adeniyi-Jones
2018 J jnl
Programming Parallel Dense Matrix Factorizations with Look-Ahead and OpenMP.
CoRR
Sandra Catalán, Adrián Castelló, Francisco D. Igual, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí
2018 — conf
Reduction to Band Form for the Singular Value Decomposition on Graphics Accelerators.
PMAM@PPoPP
Andrés E. Tomás, Rafael Rodríguez-Sánchez, Sandra Catalán, Enrique S. Quintana-Ortí
2018 J jnl
Static scheduling of the LU factorization with look-ahead on asymmetric multicore processors.
Parallel Comput.
Sandra Catalán, José R. Herrero, Enrique S. Quintana-Ortí, Rafael Rodríguez-Sánchez
2018 J jnl
Two-sided orthogonal reductions to condensed forms on asymmetric multicore processors.
Parallel Comput.
Pedro Alonso, Sandra Catalán, José R. Herrero, Enrique S. Quintana-Ortí, Rafael Rodríguez-Sánchez
2017 J jnl
Architecture-aware optimization of an HEVC decoder on asymmetric multicore processors.
J. Real Time Image Process.
Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí
2017 — conf
Reduction to Tridiagonal Form for Symmetric Eigenproblems on Asymmetric Multicore Processors.
PMAM@PPoPP
Pedro Alonso, Sandra Catalán, José R. Herrero, Enrique S. Quintana-Ortí, Rafael Rodríguez-Sánchez
2017 J jnl
Revisiting conventional task schedulers to exploit asymmetry in multi-core architectures for dense linear algebra operations.
Parallel Comput.
Luis Costero, Francisco D. Igual, Katzalin Olcoz, Sandra Catalán, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí
2017 — conf
Static Versus Dynamic Task Scheduling of the Lu Factorization on ARM big. LITTLE Architectures.
IPDPS Workshops
Sandra Catalán, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí, José R. Herrero
2017 — conf
Tiles-and WPP-based HEVC Decoding on Asymmetric Multi-core Processors.
BigMM
Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí
2017 J jnl
Time and energy modeling of a high-performance multi-threaded Cholesky factorization.
J. Supercomput.
Sandra Catalán, Francisco D. Igual, Rafael Mayo, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí
2017 J jnl
Two-Sided Reduction to Compact Band Forms with Look-Ahead.
CoRR
Rafael Rodríguez-Sánchez, Sandra Catalán, José R. Herrero, Enrique S. Quintana-Ortí, Andrés E. Tomás
2016 J jnl
A Case for Malleable Thread-Level Linear Algebra Libraries: The LU Factorization with Partial Pivoting.
CoRR
Sandra Catalán, José R. Herrero, Enrique S. Quintana-Ortí, Rafael Rodríguez-Sánchez, Robert A. van de Geijn
2016 J jnl
Architecture-Aware Optimization of an HEVC decoder on Asymmetric Multicore Processors.
CoRR
Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí
2016 J jnl
Architecture-aware configuration and scheduling of matrix multiplication on asymmetric multicore processors.
Clust. Comput.
Sandra Catalán, Francisco D. Igual, Rafael Mayo, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí
2016 — conf
Refactoring Conventional Task Schedulers to Exploit Asymmetric ARM big.LITTLE Architectures in Dense Linear Algebra.
IPDPS Workshops
Luis Costero, Francisco D. Igual, Katzalin Olcoz, Sandra Catalán, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí
2015 J jnl
Architecture-Aware Configuration and Scheduling of Matrix Multiplication on Asymmetric Multicore Processors.
CoRR
Sandra Catalán, Francisco D. Igual, Rafael Mayo, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí
2015 J jnl
Fast video transcoding from HEVC to VP9.
IEEE Trans. Consumer Electron.
Enrique de la Torre, Rafael Rodríguez-Sánchez, José Luis Martínez
2015 C conf
HEVC to VP9 transcoder.
VCIP
Enrique de la Torre, Rafael Rodríguez-Sánchez, José Luis Martínez
2015 J jnl
Multi-Threaded Dense Linear Algebra Libraries for Low-Power Asymmetric Multicore Processors.
CoRR
Sandra Catalán, José R. Herrero, Francisco D. Igual, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí
2015 J jnl
Multimedia Communications Using a Fast and Flexible DVC to H.264/AVC/SVC Transcoder.
J. Signal Process. Syst.
Alberto Corrales-García, Rafael Rodríguez-Sánchez, José Luis Martínez, Gerardo Fernández-Escribano, Francisco J. Quiles
2015 J jnl
Performance and Energy Optimization of Matrix Multiplication on Asymmetric big.LITTLE Processors.
CoRR
Sandra Catalán, Francisco D. Igual, Rafael Mayo, Luis Piñuel, Enrique S. Quintana-Ortí, Rafael Rodríguez-Sánchez
2015 C conf
Time and energy modeling of an INTRA-ONLY HEVC encoder.
VCIP
Rafael Rodríguez-Sánchez, Maria Teresa Alonso, José Luis Martínez, Rafael Mayo, Enrique S. Quintana-Ortí
2015 J jnl
Time and energy modeling of high-performance Level-3 BLAS on x86 architectures.
Simul. Model. Pract. Theory
Pedro Alonso, Sandra Catalán, Francisco D. Igual, Rafael Mayo, Rafael Rodríguez-Sánchez, Enrique S. Quintana-Ortí
2014 B conf
An smpUMHexagonS-based motion estimation algorithm for heterogeneous architectures.
ICIP
Álvaro García, Rafael Rodríguez-Sánchez, José Luis Martínez
2014 — conf
Parallel performance and energy efficiency of modern video encoders on multithreaded architectures.
EUSIPCO
Rafael Rodríguez-Sánchez, Francisco D. Igual, José Luis Martínez, Rafael Mayo, Enrique S. Quintana-Ortí
2013 J jnl
3D high definition video coding on a GPU-based heterogeneous system.
Comput. Electr. Eng.
Rafael Rodríguez-Sánchez, José Luis Martínez, Jan De Cock, Gerardo Fernández-Escribano, Bart Pieters, José L. Sánchez, José M. Claver, Rik Van de Walle
2013 J jnl
Adapting hierarchical bidirectional inter prediction on a GPU-based platform for 2D and 3D H.264 video coding.
EURASIP J. Adv. Signal Process.
Rafael Rodríguez-Sánchez, José Luis Martínez, Jan De Cock, Gerardo Fernández-Escribano, Bart Pieters, José L. Sánchez, José Manuel Claver, Rik Van de Walle
2013 B conf
Fast transrating for high efficiency video coding based on machine learning.
ICIP
Luong Pham Van, Jan De Cock, Glenn Van Wallendael, Sebastiaan Van Leuven, Rafael Rodríguez-Sánchez, José Luis Martínez, Peter Lambert, Rik Van de Walle
2013 J jnl
H.264/AVC inter prediction for heterogeneous computing systems.
J. Supercomput.
Rafael Rodríguez-Sánchez, José Luis Martínez, Gerardo Fernández-Escribano, José Manuel Claver, José L. Sánchez
2013 J jnl
H.264/AVC inter prediction on accelerator-based multi-core systems.
Multim. Tools Appl.
Rafael Rodríguez-Sánchez, José Luis Martínez, Gerardo Fernández-Escribano, José Luis Sánchez Garcia, José Manuel Claver
2013 B conf
Low delay H.264/AVC bidirectional inter prediction on a GPU.
ICIP
Rafael Rodríguez-Sánchez, José Luis Martínez, Jan De Cock, José L. Sánchez, José M. Claver, Rik Van de Walle
2012 B conf
A Fast GPU-Based Motion Estimation Algorithm for H.264/AVC.
MMM
Rafael Rodríguez-Sánchez, José Luis Martínez, Gerardo Fernández-Escribano, José Luis Sánchez Garcia, José Manuel Claver
2012 C conf
A Fast GPU-Based Motion Estimation Algorithm for HD 3D Video Coding.
ISPA
Rafael Rodríguez-Sánchez, José Luis Martínez, Gerardo Fernández-Escribano, José Luis Sánchez Garcia, José Manuel Claver
2012 J jnl
Optimizing H.264/AVC interprediction on a GPU-based framework.
Concurr. Comput. Pract. Exp.
Rafael Rodríguez-Sánchez, José Luis Martínez, Gerardo Fernández-Escribano, José L. Sánchez, José M. Claver, Pedro Diaz
2011 C conf
Reducing complexity in H.264/AVC motion estimation by using a GPU.
MMSP
Rafael Rodríguez-Sánchez, José Luis Martínez, Gerardo Fernández-Escribano, José M. Claver, José L. Sánchez
2010 — conf
A GPU-Based DVC to H.264/AVC Transcoder.
HAIS (2)
Alberto Corrales-García, Rafael Rodríguez-Sánchez, José Luis Martínez, Gerardo Fernández-Escribano, José M. Claver, José Luis Sánchez Garcia