Rafael Reif

11 papers Journal 4Unranked 7
YearRankTypeTitle / Venue / Authors
2005 — conf
Substrate noise analysis and experimental verification for the efficient noise prediction of a digital PLL.
CICC
Nisha Checka, Anantha P. Chandrakasan, Rafael Reif
2004 J jnl
Calibration of Rent's rule models for three-dimensional integrated circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Shamik Das, Anantha P. Chandrakasan, Rafael Reif
2004 — conf
Technology, performance, and computer-aided design of three-dimensional integrated circuits.
ISPD
Shamik Das, Andy Fan, Kuan-Neng Chen, Chuan Seng Tan, Nisha Checka, Rafael Reif
2004 — conf
Timing, energy, and thermal performance of three-dimensional integrated circuits.
ACM Great Lakes Symposium on VLSI
Shamik Das, Anantha P. Chandrakasan, Rafael Reif
2003 — conf
Design tools for 3-D integrated circuits.
ASP-DAC
Shamik Das, Anantha P. Chandrakasan, Rafael Reif
2003 — conf
Three-Dimensional Integrated Circuits: Performance, Design Methodology, and CAD Tools.
ISVLSI
Shamik Das, Anantha P. Chandrakasan, Rafael Reif
2003 J jnl
Wiring requirement and three-dimensional integration technology for field programmable gate arrays.
IEEE Trans. Very Large Scale Integr. Syst.
Arifur Rahman, Shamik Das, Anantha P. Chandrakasan, Rafael Reif
2002 — conf
Fabrication Technologies for Three-Dimensional Integrated Circuits (invited).
ISQED
Rafael Reif, Andy Fan, Kuan-Neng Chen, Shamik Das
2001 J jnl
Interconnect limits on gigascale integration (GSI) in the 21st century.
Proc. IEEE
Jeffery A. Davis, Raguraman Venkatesan, Alan Kaloyeros, Michael Beylansky, Shukri J. Souri, Kaustav Banerjee, Krishna C. Saraswat, Arifur Rahman, Rafael Reif, James D. Meindl
2001 — conf
Wiring requirement and three-dimensional integration of field-programmable gate arrays.
SLIP
Arifur Rahman, Shamik Das, Anantha P. Chandrakasan, Rafael Reif
2000 J jnl
System-level performance evaluation of three-dimensional integrated circuits.
IEEE Trans. Very Large Scale Integr. Syst.
Arifur Rahman, Rafael Reif