Rachit Nigam

17 papers A* 4B 1Journal 9Unranked 3
YearRankTypeTitle / Venue / Authors
2026 — conf
Parameterized Hardware Design with Latency-Abstract Interfaces.
ASPLOS (2)
Rachit Nigam, Ethan Gabizon, Edmund Lam, Carolyn Zech, Jonathan Balkind, Adrian Sampson
2024 J jnl
Correct and Compositional Hardware Generators.
CoRR
Rachit Nigam, Ethan Gabizon, Edmund Lam, Adrian Sampson
2024 J jnl
Unifying Static and Dynamic Intermediate Languages for Accelerator Generators.
Proc. ACM Program. Lang.
Caleb Kim, Pai Li, Anshuman Mohan, Andrew Butt, Adrian Sampson, Rachit Nigam
2024 J jnl
WatChat: Explaining perplexing programs by debugging mental models.
CoRR
Kartik Chandra, Tzu-Mao Li, Rachit Nigam, Joshua B. Tenenbaum, Jonathan Ragan-Kelley
2023 J jnl
Modular Hardware Design with Timeline Types.
CoRR
Rachit Nigam, Pedro Henrique Azevedo de Amorim, Adrian Sampson
2023 J jnl
Modular Hardware Design with Timeline Types.
Proc. ACM Program. Lang.
Rachit Nigam, Pedro Henrique Azevedo de Amorim, Adrian Sampson
2023 — conf
Stepwise Debugging for Hardware Accelerators.
ASPLOS (2)
Griffin Berlstein, Rachit Nigam, Christophe Gyurgyik, Adrian Sampson
2023 J jnl
Unifying Static and Dynamic Intermediate Languages for Accelerator Generators.
CoRR
Caleb Kim, Pai Li, Anshuman Mohan, Andrew Butt, Adrian Sampson, Rachit Nigam
2021 J jnl
A Compiler Infrastructure for Accelerator Generators.
CoRR
Rachit Nigam, Samuel Thomas, Zhijing Li, Adrian Sampson
2021 A* conf
A compiler infrastructure for accelerator generators.
ASPLOS
Rachit Nigam, Samuel Thomas, Zhijing Li, Adrian Sampson
2021 A* conf
Vectorization for digital signal processors via equality saturation.
ASPLOS
Alexa VanHattum, Rachit Nigam, Vincent T. Lee, James Bornholt, Adrian Sampson
2020 B conf
A Synthesis-Aided Compiler for DSP Architectures (WiP Paper).
LCTES
Alexa VanHattum, Rachit Nigam, Vincent T. Lee, James Bornholt, Adrian Sampson
2020 J jnl
Predictable Accelerator Design with Time-Sensitive Affine Types.
CoRR
Rachit Nigam, Sachille Atapattu, Samuel Thomas, Zhijing Li, Theodore Bauer, Yuwei Ye, Apurva Koti, Adrian Sampson, Zhiru Zhang
2020 A* conf
Predictable accelerator design with time-sensitive affine types.
PLDI
Rachit Nigam, Sachille Atapattu, Samuel Thomas, Zhijing Li, Theodore Bauer, Yuwei Ye, Apurva Koti, Adrian Sampson, Zhiru Zhang
2018 J jnl
Putting in All the Stops: Execution Control for JavaScript.
CoRR
Samuel Baxter, Rachit Nigam, Joe Gibbs Politz, Shriram Krishnamurthi, Arjun Guha
2018 A* conf
Putting in all the stops: execution control for JavaScript.
PLDI
Samuel Baxter, Rachit Nigam, Joe Gibbs Politz, Shriram Krishnamurthi, Arjun Guha
2017 — conf
Fission: Secure Dynamic Code-Splitting for JavaScript.
SNAPL
Arjun Guha, Jean-Baptiste Jeannin, Rachit Nigam, Jane Tangen, Rian Shambaugh