R. Venkatraman

13 papers C 1Misc 1Journal 2Unranked 9
YearRankTypeTitle / Venue / Authors
2025 J jnl
Adaptive fabrication of material extrusion-AM process using machine learning algorithms for print process optimization.
J. Intell. Manuf.
S. Sridhar, K. Venkatesh, G. Revathy, M. Venkatesan, R. Venkatraman
2023 C conf
Accurate Representation of Distribution System Dynamics in Bulk System Studies by Clusters of Composite Load Models.
IAS
Amarsagar Reddy Ramapuram Matavalam, R. Venkatraman, Venkataramana Ajjarapu
2009 Misc conf
Optimisation Quality Assessment in Large, Complex SoC Designs Challenges and Solutions.
VLSI Design
R. Venkatraman, Shrikrishna Pundoor, Arun Koithyar, Madhusudan Rao, Jagdish C. Rao
2009 — conf
Optimization strategies to improve statistical timing.
ISQED
Parimala Viswanath, Pranav Murthy, Debajit Das, R. Venkatraman, Ajoy Mandal, Arvind Veeravalli, H. Udayakumar
2009 — conf
Power & variability test chip architecture and 45nm-generation silicon-based analysis for robust, power-aware SoC design.
ISQED
R. Venkatraman, R. Castagnetti, Andres Teene, Benjamin Mbouombouo, S. Ramesh
2006 — conf
Enabling Quality and Schedule Predictability in SoC Design using HandoffQC.
ISQED
Bhaskar J. Karmakar, V. Kalyana Chakravarty, R. Venkatraman, Jagdish C. Rao
2006 — conf
The Statistics of Device Variations and its Impact on SRAM Bitcell Performance, Leakage and Stability.
ISQED
R. Venkatraman, R. Castagnetti, S. Ramesh
2005 — conf
A High-Performance SRAM Technology With Reduced Chip-Level Routing Congestion for SoC.
ISQED
Ruggero Castagnetti, R. Venkatraman, Brandon Bartz, Carl Monzel, T. Briscoe, Andres Teene, S. Ramesh
2003 — conf
Design and Use of Memory-Specific Test Structures to Ensure SRAM Yield and Manufacturability.
ISQED
F. Duan, R. Castagnetti, R. Venkatraman, O. Kobozeva, S. Ramesh
2002 — conf
Challenges in the Design of a Scalable Data-Acquisition and Processing System-on-Silicon.
ASP-DAC/VLSI Design
Karanth Shankaranarayana, Soujanna Sarkar, R. Venkatraman, Shyam S. Jagini, N. Venkatesh, Jagdish C. Rao, H. Udayakumar, M. Sambandam, K. P. Sheshadri, S. Talapatra, Parag Mhatre, Jais Abraham, Rubin A. Parekhji
2000 — conf
An evolutionary approach to timing driven FPGA placement.
ACM Great Lakes Symposium on VLSI
R. Venkatraman, Lalit M. Patnaik
2000 J jnl
Rule-based system application for a technical problem in inventory issue.
Artif. Intell. Eng.
R. Venkatraman, S. Venkatraman
1994 — conf
Common Ada bindings to compartmented mode workstations.
WADAS
C. Armstrong, R. Venkatraman