Quentin L. Meunier

33 papers C 1Journal 18Unranked 13
YearRankTypeTitle / Venue / Authors
2025 J jnl
Blind-Folded: Simple Power Analysis Attacks using Data with a Single Trace and no Training.
IACR Trans. Cryptogr. Hardw. Embed. Syst.
Xunyue Hu, Quentin L. Meunier, Emmanuelle Encrenaz
2025 J jnl
aLEAKator: HDL Mixed-Domain Simulation for Masked Hardware & Software Formal Verification.
IACR Cryptol. ePrint Arch.
Noé Amiot, Quentin L. Meunier, Karine Heydemann, Emmanuelle Encrenaz
2025 J jnl
aLEAKator: HDL Mixed-Domain Simulation for Masked Hardware \& Software Formal Verification.
CoRR
Noé Amiot, Quentin L. Meunier, Karine Heydemann, Emmanuelle Encrenaz
2024 J jnl
Blind-Folded: Simple Power Analysis Attacks using Data with a Single Trace and no Training.
IACR Cryptol. ePrint Arch.
Xunyue Hu, Quentin L. Meunier, Emmanuelle Encrenaz
2023 J jnl
LeakageVerif: Efficient and Scalable Formal Verification of Leakage in Symbolic Expressions.
IEEE Trans. Software Eng.
Quentin L. Meunier, Etienne Pons, Karine Heydemann
2023 J jnl
Optical flow algorithms optimized for speed, energy and accuracy on embedded GPUs.
J. Real Time Image Process.
Thomas Romera, Andrea Petreto, Florian Lemaitre, Manuel Bouyer, Quentin L. Meunier, Lionel Lacassagne, Daniel Etiemble
2023 C conf
VerifMSI: Practical Verification of Hardware and Software Masking Schemes Implementations.
SECRYPT
Quentin L. Meunier, Abdul Rahman Taleb
2023 J jnl
VerifMSI: Practical Verification of Hardware and Software Masking Schemes Implementations.
IACR Cryptol. ePrint Arch.
Quentin L. Meunier, Abdul Rahman Taleb
2022 J jnl
ARMISTICE: Microarchitectural Leakage Modeling for Masked Software Formal Verification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Arnaud de Grandmaison, Karine Heydemann, Quentin L. Meunier
2022 J jnl
Armistice: Micro-Architectural Leakage Modelling for Masked Software Formal Verification.
IACR Cryptol. ePrint Arch.
Arnaud de Grandmaison, Karine Heydemann, Quentin L. Meunier
2021 — conf
Implementations Impact on Iterative Image Processing for Embedded GPU.
EUSIPCO
Thomas Romera, Andrea Petreto, Florian Lemaitre, Manuel Bouyer, Quentin L. Meunier, Lionel Lacassagne
2021 J jnl
IntAct: A 96-Core Processor With Six Chiplets 3D-Stacked on an Active Interposer With Distributed Interconnects and Integrated Power Management.
IEEE J. Solid State Circuits
Pascal Vivet, Eric Guthmuller, Yvain Thonnart, Gaël Pillonnet, César Fuguet Tortolero, Ivan Miro-Panades, Guillaume Moritz, Jean Durupt, Christian Bernard, Didier Varreau, Julian J. H. Pontes, Sébastien Thuries, David Coriat, Michel Harrand, Denis Dutoit, Didier Lattard, Lucile Arnaud, Jean Charbonnier, Perceval Coudrain, Arnaud Garnier, Frédéric Berger, Alain Gueugnot, Alain Greiner, Quentin L. Meunier, Alexis Farcy, Alexandre Arriordaz, Séverine Cheramy, Fabien Clermidy
2021 J jnl
LeakageVerif: Scalable and Efficient Leakage Verification in Symbolic Expressions.
IACR Cryptol. ePrint Arch.
Quentin L. Meunier, Etienne Pons, Karine Heydemann
2020 — conf
2.3 A 220GOPS 96-Core Processor with 6 Chiplets 3D-Stacked on an Active Interposer Offering 0.6ns/mm Latency, 3Tb/s/mm
ISSCC
Pascal Vivet, Eric Guthmuller, Yvain Thonnart, Gaël Pillonnet, Guillaume Moritz, Ivan Miro-Panades, César Fuguet Tortolero, Jean Durupt, Christian Bernard, Didier Varreau, Julian J. H. Pontes, Sébastien Thuries, David Coriat, Michel Harrand, Denis Dutoit, Didier Lattard, Lucile Arnaud, Jean Charbonnier, Perceval Coudrain, Arnaud Garnier, Frédéric Berger, Alain Gueugnot, Alain Greiner, Quentin L. Meunier, Alexis Farcy, Alexandre Arriordaz, Séverine Cheramy, Fabien Clermidy
2020 J jnl
Maskara: Compilation of a Masking Countermeasure With Optimized Polynomial Interpolation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Nicolas Belleville, Damien Couroussé, Karine Heydemann, Quentin L. Meunier, Inès Ben El Ouahma
2019 — conf
A New Real-Time Embedded Video Denoising Algorithm.
DASIP
Andrea Petreto, Thomas Romera, Florian Lemaitre, Ian Masliah, Boris Gaillard, Manuel Bouyer, Quentin L. Meunier, Lionel Lacassagne
2019 J jnl
Side-channel robustness analysis of masked assembly codes using a symbolic approach.
J. Cryptogr. Eng.
Inès Ben El Ouahma, Quentin L. Meunier, Karine Heydemann, Emmanuelle Encrenaz
2018 — conf
A 29 Gops/Watt 3D-Ready 16-Core Computing Fabric with Scalable Cache Coherent Architecture Using Distributed L2 and Adaptive L3 Caches.
ESSCIRC
Eric Guthmuller, César Fuguet Tortolero, Pascal Vivet, Christian Bernard, Ivan Miro Panades, Jean Durupt, E. Beignc, Didier Lattard, Séverine Cheramy, Alain Greiner, Quentin L. Meunier, Pirouz Bazargan-Sabet
2018 — conf
A new Direct Connected Component Labeling and Analysis Algorithms for GPUs.
DASIP
Arthur M. Hennequin, Lionel Lacassagne, Laurent Cabaret, Quentin L. Meunier
2018 — conf
Energy and Execution Time Comparison of Optical Flow Algorithms on SIMD and GPU Architectures.
DASIP
Andrea Petreto, Arthur M. Hennequin, Thomas Koehler, Thomas Romera, Yohan Fargeix, Boris Gaillard, Manuel Bouyer, Quentin L. Meunier, Lionel Lacassagne
2018 — conf
Modeling a Cache Coherence Protocol with the Guarded Action Language.
MARS/VPT
Quentin L. Meunier, Yann Thierry-Mieg, Emmanuelle Encrenaz
2017 — conf
Decoupling Translation Lookaside Buffer Coherence from Cache Coherence.
ISVLSI
Hao Liu, Quentin L. Meunier, Alain Greiner
2017 J jnl
Executing secured virtual machines within a manycore architecture.
Microprocess. Microsystems
Clement Devigne, Jean-Baptiste Bréjon, Quentin L. Meunier, Franck Wajsbürt
2017 — conf
Symbolic Approach for Side-Channel Resistance Analysis of Masked Assembly Codes.
PROOFS
Inès Ben El Ouahma, Quentin L. Meunier, Karine Heydemann, Emmanuelle Encrenaz
2016 — conf
Exploiting Large Memory Using 32-Bit Energy-Efficient Manycore Architectures.
MCSoC
Mohamed Lamine Karaoui, Pierre-Yves Peneau, Quentin L. Meunier, Franck Wajsbürt, Alain Greiner
2015 — conf
Executing secured virtual machines within a manycore architecture.
NORCAS
Clement Devigne, Jean-Baptiste Bréjon, Quentin L. Meunier, Franck Wajsbürt
2015 J jnl
GECOS : Mécanisme de synchronisation passant à l'échelle à plusieurs lecteurs et un écrivain pour structures chaînées.
Tech. Sci. Informatiques
Mohamed Lamine Karaoui, Quentin L. Meunier, Franck Wajsbürt, Alain Greiner
2015 — conf
RWT: Suppressing Write-Through Cost When Coherence is Not Needed.
ISVLSI
Hao Liu, Clement Devigne, Lucas Garcia, Quentin L. Meunier, Franck Wajsbürt, Alain Greiner
2011 — conf
Fixed-point accuracy evaluation in the context of conditional structures.
EUSIPCO
Jean-Charles Naud, Quentin L. Meunier, Daniel Ménard, Olivier Sentieys
2011 J jnl
Systèmes de mémoire transactionnelle pour les architectures à base de NoC Conception, implémentation et comparaison de deux politiques.
Tech. Sci. Informatiques
Quentin L. Meunier, Frédéric Pétrot
2010 J jnl
Hardware/software support for adaptive work-stealing in on-chip multiprocessor.
J. Syst. Archit.
Quentin L. Meunier, Frédéric Pétrot, Jean-Louis Roch
2010 J jnl
Lightweight Transactional Memory systems for NoCs based architectures: Design, implementation and comparison of two policies.
J. Parallel Distributed Comput.
Quentin L. Meunier, Frédéric Pétrot
2010 — —
Étude de deux solutions pour le support matériel de la programmation parallèle dans les multiprocesseurs intégrés : vol de travail et mémoires transactionnelles. (Study of two Solutions for Hardware Support of Parallel Programming in Integrated Multiprocessors: Work-Stealing and Transactional Memory).
Quentin L. Meunier