Qizhe Wu

18 papers A* 2A 1C 2Misc 1Journal 6Unranked 6
YearRankTypeTitle / Venue / Authors
2025 A* conf
Exploring the Performance Improvement of Tensor Processing Engines through Transformation in the Bit-weight Dimension of MACs.
HPCA
Qizhe Wu, Huawen Liang, Yuchen Gui, Zhichen Zeng, Zerong He, Linfeng Tao, Xiaotian Wang, Letian Zhao, Zhaoxi Zeng, Wei Yuan, Wei Wu, Xi Jin
2025 J jnl
Exploring the Performance Improvement of Tensor Processing Engines through Transformation in the Bit-weight Dimension of MACs.
CoRR
Qizhe Wu, Huawen Liang, Yuchen Gui, Zhichen Zeng, Zerong He, Linfeng Tao, Xiaotian Wang, Letian Zhao, Zhaoxi Zeng, Wei Yuan, Wei Wu, Xi Jin
2025 A* conf
MHE-TPE: Multi-Operand High-Radix Encoder for Mixed-Precision Fixed-Point Tensor Processing Engines.
MICRO
Qizhe Wu, Jinyi Zhou, Zhanhe Hu, Zhichen Zeng, Huawen Liang, Jiuru Zhu, Linfeng Tao, Xin Zhang, Zekang Cheng, Letian Zhao, Wei Yuan, Xiaotian Wang, Xi Jin
2025 C conf
SageSC: Accelerating GraphSAGE Minibatch Inference on Memory-Intensive Graphs.
ICCD
Yuchen Gui, Wei Yuan, Qizhe Wu, Huawen Liang, Letian Zhao, Linfeng Tao, Zhongguang Xu, Xi Jin
2024 — conf
A FPGA-HBM-Based Hardware Streaming Accelerator for GNN Sampling.
ASAP
Yuchen Gui, Qizhe Wu, Wei Yuan, Huawen Liang, Xiaotian Wang, Xi Jin
2024 C conf
EN-T: Optimizing Tensor Computing Engines Performance via Encoder-Based Methodology.
ICCD
Qizhe Wu, Yuchen Gui, Zhichen Zeng, Xiaotian Wang, Huawen Liang, Xi Jin
2024 J jnl
EN-TensorCore: Advancing TensorCores Performance through Encoder-Based Methodology.
CoRR
Qizhe Wu, Yuchen Gui, Zhichen Zeng, Xiaotian Wang, Huawen Liang, Xi Jin
2024 A conf
Efficient Message Passing Architecture for GCN Training on HBM-based FPGAs with Orthogonal Topology On-Chip Networks.
FPGA
Qizhe Wu, Letian Zhao, Yuchen Gui, Huawen Liang, Xiaotian Wang, Xi Jin
2024 J jnl
Efficient Message Passing Architecture for GCN Training on HBM-based FPGAs with Orthogonal Topology On-Chip Networks.
CoRR
Qizhe Wu, Letian Zhao, Yuchen Gui, Huawen Liang, Xiaotian Wang
2024 — conf
HBM-Based Hardware Accelerator for GNN Sampling and Aggregation.
HPEC
Yuchen Gui, Qizhe Wu, Wei Yuan, Huawen Liang, Xiaotian Wang, Xi Jin
2024 Misc conf
RingTK: A Ring, Parallel and High Performance Top-K Sorter on FPGA.
FCCM
Huawen Liang, Qizhe Wu, Wei Yuan, Teng Tian, Xi Jin
2023 J jnl
FTW-GAT: An FPGA-Based Accelerator for Graph Attention Networks With Ternary Weights.
IEEE Trans. Circuits Syst. II Express Briefs
Zerong He, Teng Tian, Qizhe Wu, Xi Jin
2023 — conf
Scheduling Memory Access Optimization for HBM Based on CLOS.
ICACT
Shuang Xue, Huawei Liang, Qizhe Wu, Xi Jin
2022 — conf
An SSD-Based Accelerator for Singular Value Decomposition Recommendation Algorithm on Edge.
HPEC
Wei Wu, Letian Zhao, Qizhe Wu, Xiaotian Wang, Teng Tian, Xi Jin
2022 J jnl
FP-GNN: Adaptive FPGA accelerator for Graph Neural Networks.
Future Gener. Comput. Syst.
Teng Tian, Letian Zhao, Xiaotian Wang, Qizhe Wu, Wei Yuan, Xi Jin
2022 — conf
HuGraph: Acceleration of GCN Training on Heterogeneous FPGA Clusters with Quantization.
HPEC
Letian Zhao, Qizhe Wu, Xiaotian Wang, Teng Tian, Wei Wu, Xi Jin
2022 J jnl
QEGCN: An FPGA-based accelerator for quantized GCNs with edge-level parallelism.
J. Syst. Archit.
Wei Yuan, Teng Tian, Qizhe Wu, Xi Jin
2021 — conf
Software-Hardware Co-Optimization on Partial-Sum Problem for PIM-based Neural Network Accelerator.
HPEC
Qizhe Wu, Linfeng Tao, Huawen Liang, Wei Yuan, Teng Tian, Shuang Xue, Xi Jin