Qingjun Fan

17 papers C 6Journal 2Unranked 9
YearRankTypeTitle / Venue / Authors
2022 J jnl
A 5-GS/s 6-Bit 15.07-mW Flash ADC With Partially Active Second-Stage Comparison and 2× Time-Domain Interpolation.
IEEE Trans. Very Large Scale Integr. Syst.
Yulang Feng, Hao Deng, Qingjun Fan, Yuxuan Tang, Phaneendra Bikkina, Esko Mikkola, Jinghong Chen
2020 C conf
A 6-b 20-GS/s 2-Way Time-Interleaved Flash ADC with Automatic Comparator Offset Calibration in 28-nm FDSOI.
ISCAS
Yulang Feng, Hao Deng, Qingjun Fan, Runxi Zhang, Phaneendra Bikkina, Jinghong Chen
2020 C conf
A Quadrature Frequency Synthesizer with 118.7-fs Jitter, 27.94% Locking Range for Multiband 5G mmW Applications.
ISCAS
Runxi Zhang, Hui Yang, Zitong Zhang, Chunqi Shi, Qingjun Fan, Jinghong Chen
2020 J jnl
A Time-Interleaved SAR ADC With Bypass-Based Opportunistic Adaptive Calibration.
IEEE J. Solid State Circuits
Qingjun Fan, Yi Hong, Jinghong Chen
2020 — conf
An Automatic Comparator Offset Calibration for High-Speed Flash ADCs in FDSOI CMOS Technology.
LASCAS
Yulang Feng, Qingjun Fan, Hao Deng, Jeffrey Chen, Runxi Zhang, Phaneendra Bikkina, Jinghong Chen
2020 — conf
Machine-Learning Based Nonlinerity Correction for Coarse-Fine SAR-TDC Hybrid ADC.
MWSCAS
Hao Deng, Qingjun Fan, Runxi Zhang, Jinghong Chen
2019 — conf
A 1-GS/s 8-Bit 12.01-fJ/conv.-step Two-Step SAR ADC in 28-nm FDSOI Technology.
ESSCIRC
Qingjun Fan, Jinghong Chen
2019 — conf
A 2.4 GS/s 10-Bit Time-Interleaved SAR ADC with a Bypass Window and Opportunistic Offset Calibration.
ESSCIRC
Qingjun Fan, Jinghong Chen
2019 — conf
A 500 MS/s 10-Bit Single-Channel SAR ADC with A Double-Rate Comparator.
ESSCIRC
Qingjun Fan, Runxi Zhang, Phaneendra Bikkina, Esko Mikkola, Jinghong Chen
2019 C conf
A 500-MS/s 13-Bit SAR-Assisted Time-Interleaved Digital-Slope ADC.
ISCAS
Qingjun Fan, Jinghong Chen
2019 C conf
A Low-Power SiPM Readout Front-End with Fast Pulse Generation and Successive-Approximation Register ADC in 0.18 μm CMOS.
ISCAS
Yuxuan Tang, Qingjun Fan, Yulang Feng, Hao Deng, Runxi Zhang, Jinghong Chen
2018 — conf
A 25-GS/s 4-bit Single-core Flash ADC in 28 nm FDSOI CMOS.
APCCAS
Yulang Feng, Yuxuan Tang, Qingjun Fan, Jinghong Chen
2018 — conf
A Current Reuse Wideband LNA with Complementary Noise and Distortion Cancellation for Ultrasound Imaging Applications.
APCCAS
Yuxuan Tang, Yulang Feng, Qingjun Fan, Runxi Zhang, Jinghong Chen
2017 — conf
A 10-bit 400 MS/s asynchronous SAR ADC using dual-DAC architecture for speed enhancement.
MWSCAS
Qingjun Fan, Jinghong Chen
2017 C conf
A 14-bit 2.5 GS/s digital pre-distorted DAC in 65 nm CMOS with SFDR > 70 dB up to 1.2 GHz.
ISCAS
Zhiheng Zuo, Qingjun Fan, Jinghong Chen
2017 C conf
RFI mitigating receiver back-end for radiometers.
IGARSS
Phaneendra Bikkina, Qingjun Fan, Wenlan Wu, Jinghong Chen, Esko Mikkola
2016 — conf
Wideband LNA with 1.9 dB noise figure in 0.18 µm CMOS for high frequency ultrasound imaging applications.
NEWCAS
Yuxuan Tang, Yulang Feng, Zhiheng Zuo, Qingjun Fan, Cheng Fang, Jun Zou, Jinghong Chen