Qing Dong - RankMe

29 papers A* 1C 2Journal 9Unranked 17

Year	Rank	Type	Title / Venue / Authors
2021	J	`jnl`	RRAM-DNN: An RRAM and Model-Compression Empowered All-Weights-On-Chip DNN Accelerator. IEEE J. Solid State Circuits Ziyun Li, Zhehong Wang, Li Xu, Qing Dong, Bowen Liu, Chin-I Su, Wen-Ting Chu, George Tsou, Yu-Der Chih, Tsung-Yung Jonathan Chang, Dennis Sylvester, Hun-Seok Kim, David T. Blaauw
2020	—	`conf`	15.3 A 351TOPS/W and 372.4GOPS Compute-in-Memory SRAM Macro in 7nm FinFET CMOS for Machine-Learning Applications. ISSCC Qing Dong, Mahmut E. Sinangil, Burak Erbagci, Dar Sun, Win-San Khwa, Hung-Jen Liao, Yih Wang, Jonathan Chang
2020	J	`jnl`	A Self-Tuning IoT Processor Using Leakage-Ratio Measurement for Energy-Optimal Operation. IEEE J. Solid State Circuits Jeongsup Lee, Satoru Miyoshi, Masaru Kawaminami, David T. Blaauw, Dennis Sylvester, Yiqun Zhang, Qing Dong, Wootaek Lim, Mehdi Saligane, Yejoong Kim, Seokhyeon Jeong, Jongyup Lim, Makoto Yasuda
2020	—	`conf`	An All-Weights-on-Chip DNN Accelerator in 22nm ULL Featuring 24×1 Mb eRRAM. VLSI Circuits Zhehong Wang, Ziyun Li, Li Xu, Qing Dong, Chin-I Su, Wen-Ting Chu, George Tsou, Yu-Der Chih, Tsung-Yung Jonathan Chang, Dennis Sylvester, Hun-Seok Kim, David T. Blaauw
2019	J	`jnl`	A 1-Mb 28-nm 1T1MTJ STT-MRAM With Single-Cap Offset-Cancelled Sense Amplifier and In Situ Self-Write-Termination. IEEE J. Solid State Circuits Qing Dong, Zhehong Wang, Jongyup Lim, Yiqun Zhang, Mahmut E. Sinangil, Yi-Chun Shih, Yu-Der Chih, Tsung-Yung Jonathan Chang, David T. Blaauw, Dennis Sylvester
2019	—	`conf`	A 6.4pJ/Cycle Self-Tuning Cortex-M0 IoT Processor Based on Leakage-Ratio Measurement for Energy-Optimal Operation Across Wide-Range PVT Variation. ISSCC Jeongsup Lee, Yiqun Zhang, Qing Dong, Wootaek Lim, Mehdi Saligane, Yejoong Kim, Seokhyeon Jeong, Jongyup Lim, Makoto Yasuda, Satoru Miyoshi, Masaru Kawaminami, David T. Blaauw, Dennis Sylvester
2018	—	`conf`	A 0.04MM VLSI Circuits Xiao Wu, Inhee Lee, Qing Dong, Kaiyuan Yang, Dongkwun Kim, Jingcheng Wang, Yimai Peng, Yiqun Zhang, Mehdi Saligane, Makoto Yasuda, Kazuyuki Kumeno, Fumitaka Ohno, Satoru Miyoshi, Masaru Kawaminami, Dennis Sylvester, David T. Blaauw
2018	J	`jnl`	A 1920 × 1080 30-frames/s 2.3 TOPS/W Stereo-Depth Processor for Energy-Efficient Autonomous Navigation of Micro Aerial Vehicles. IEEE J. Solid State Circuits Ziyun Li, Qing Dong, Mehdi Saligane, Benjamin P. Kempke, Luyao Gong, Zhengya Zhang, Ronald G. Dreslinski, Dennis Sylvester, David T. Blaauw, Hun-Seok Kim
2018	—	`conf`	A 1Mb 28nm STT-MRAM with 2.8ns read access time at 1.2V VDD using single-cap offset-cancelled sense amplifier and in-situ self-write-termination. ISSCC Qing Dong, Zhehong Wang, Jongyup Lim, Yiqun Zhang, Yi-Chun Shih, Yu-Der Chih, Tsung-Yung Jonathan Chang, David T. Blaauw, Dennis Sylvester
2018	—	`conf`	A 28NM Integrated True Random Number Generator Harvesting Entropy from MRAM. VLSI Circuits Kaiyuan Yang, Qing Dong, Zhehong Wang, Yi-Chun Shih, Yu-Der Chih, Tsung-Yung Jonathan Chang, David T. Blaauw, Dennis Sylvester
2018	J	`jnl`	A 4 + 2T SRAM for Searching and In-Memory Computing With 0.3-V VDDmin. IEEE J. Solid State Circuits Qing Dong, Supreet Jeloka, Mehdi Saligane, Yejoong Kim, Masaru Kawaminami, Akihiko Harada, Satoru Miyoshi, Makoto Yasuda, David T. Blaauw, Dennis Sylvester
2018	—	`conf`	An Adaptive Body-Biaslna SoC Using in Situ Slack Monitoring for Runtime Replica Calibration. VLSI Circuits Mehdi Saligane, Jeongsup Lee, Qing Dong, Makoto Yasuda, Kazuyuki Kumeno, Fumitaka Ohno, Satoru Miyoshi, Masaru Kawaminami, David T. Blaauw, Dennis Sylvester
2018	J	`jnl`	Recryptor: A Reconfigurable Cryptographic Cortex-M0 Processor With In-Memory and Near-Memory Computing for IoT Security. IEEE J. Solid State Circuits Yiqun Zhang, Li Xu, Qing Dong, Jingcheng Wang, David T. Blaauw, Dennis Sylvester
2017	—	`conf`	11.2 A 1Mb embedded NOR flash memory with 39µW program power for mm-scale high-temperature sensor nodes. ISSCC Qing Dong, Yejoong Kim, Inhee Lee, Myungjoon Choi, Ziyun Li, Jingcheng Wang, Kaiyuan Yang, Yen-Po Chen, Junjie Dong, Minchang Cho, Gyouho Kim, Wei-Keng Chang, Yun-Sheng Chen, Yu-Der Chih, David T. Blaauw, Dennis Sylvester
2017	—	`conf`	14.7 A 288µW programmable deep-learning processor with 270KB on-chip weight storage using non-uniform memory hierarchy for mobile intelligence. ISSCC Suyoung Bang, Jingcheng Wang, Ziyun Li, Cao Gao, Yejoong Kim, Qing Dong, Yen-Po Chen, Laura Fick, Xun Sun, Ronald G. Dreslinski, Trevor N. Mudge, Hun-Seok Kim, David T. Blaauw, Dennis Sylvester
2017	—	`conf`	3.7 A 1920×1080 30fps 2.3TOPS/W stereo-depth processor for robust autonomous navigation. ISSCC Ziyun Li, Qing Dong, Mehdi Saligane, Benjamin P. Kempke, Shijia Yang, Zhengya Zhang, Ronald G. Dreslinski, Dennis Sylvester, David T. Blaauw, Hun-Seok Kim
2017	—	`conf`	8.3 A 553F ISSCC Kaiyuan Yang, Qing Dong, David T. Blaauw, Dennis Sylvester
2017	—	`conf`	9.2 A 0.6nJ -0.22/+0.19°C inaccuracy temperature sensor using exponential subthreshold oscillation dependence. ISSCC Kaiyuan Yang, Qing Dong, Wanyeong Jung, Yiqun Zhang, Myungjoon Choi, David T. Blaauw, Dennis Sylvester
2017	—	`conf`	A 1.02nW PMOS-only, trim-free current reference with 282ppm/°C from -40°C to 120°C and 1.6% within-wafer inaccuracy. ESSCIRC Qing Dong, Inhee Lee, Kaiyuan Yang, David T. Blaauw, Dennis Sylvester
2017	J	`jnl`	A 23-mW Face Recognition Processor with Mostly-Read 5T Memory in 40-nm CMOS. IEEE J. Solid State Circuits Dongsuk Jeon, Qing Dong, Yejoong Kim, Xiaolong Wang, Shuai Chen, Hao Yu, David T. Blaauw, Dennis Sylvester
2017	J	`jnl`	Exploiting the analog properties of digital circuits for malicious hardware. Commun. ACM Kaiyuan Yang, Matthew Hicks, Qing Dong, Todd M. Austin, Dennis Sylvester
2017	J	`jnl`	Low-Power and Compact Analog-to-Digital Converter Using Spintronic Racetrack Memory Devices. IEEE Trans. Very Large Scale Integr. Syst. Qing Dong, Kaiyuan Yang, Laura Fick, David Fick, David T. Blaauw, Dennis Sylvester
2017	C	`conf`	Rectified-linear and recurrent neural networks built with spin devices. ISCAS Qing Dong, Kaiyuan Yang, Laura Fick, David T. Blaauw, Dennis Sylvester
2016	—	`conf`	A 114-pW PMOS-only, trim-free voltage reference with 0.26% within-wafer inaccuracy for nW systems. VLSI Circuits Qing Dong, Kaiyuan Yang, David T. Blaauw, Dennis Sylvester
2016	A*	`conf`	A2: Analog Malicious Hardware. IEEE Symposium on Security and Privacy Kaiyuan Yang, Matthew Hicks, Qing Dong, Todd M. Austin, Dennis Sylvester
2015	—	`conf`	14.2 A physically unclonable function with BER ISSCC Kaiyuan Yang, Qing Dong, David T. Blaauw, Dennis Sylvester
2015	—	`conf`	A 23mW face recognition accelerator in 40nm CMOS with mostly-read 5T memory. VLSIC Dongsuk Jeon, Qing Dong, Yejoong Kim, Xiaolong Wang, Shuai Chen, Hao Yu, David T. Blaauw, Dennis Sylvester
2015	C	`conf`	Racetrack converter: A low power and compact data converter using racetrack spintronic devices. ISCAS Qing Dong, Kaiyuan Yang, Laura Fick, David Fick, David T. Blaauw, Dennis Sylvester
2014	—	`conf`	27.8 A static contention-free single-phase-clocked 24T flip-flop in 45nm for low-power applications. ISSCC Yejoong Kim, Wanyeong Jung, Inhee Lee, Qing Dong, Michael B. Henry, Dennis Sylvester, David T. Blaauw