Qijing Huang - RankMe

45 papers A* 6A 7B 1Misc 4Journal 20Unranked 6

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	31.9 Alpha-Vision: A Real-Time Always-on Vision Processor with 787µs Face Detection Latency in <5mW. ISSCC Ben Keller, Rangharajan Venkatesan, Steve Dai, Jason Clemons, Matthew Fojtik, Muya Chang, Thierry Tambe, Nathaniel Ross Pinckney, Stephen G. Tell, Qijing Huang, Shalini De Mello, Brucek Khailany
2026	J	`jnl`	Improving Efficiency of GPU Kernel Optimization Agents using a Domain-Specific Language and Speed-of-Light Guidance. CoRR Siva Kumar Sastry Hari, Vignesh Balaji, Sana Damani, Qijing Huang, Christos Kozyrakis
2026	J	`jnl`	SOL-ExecBench: Speed-of-Light Benchmarking for Real-World GPU Kernels Against Hardware Limits. CoRR Edward Lin, Sahil Modi, Siva Kumar Sastry Hari, Qijing Huang, Zhifan Ye, Nestor Qin, Fengzhe Zhou, Yuan Zhang, Jingquan Wang, Sana Damani, Dheeraj Peri, Ouye Xie, Aditya Kane, Moshe Maor, Michael Behar, Triston Cao, Rishabh Mehta, Vartika Singh, Vikram Sharma Mailthody, Terry Chen, Zihao Ye, Hanfeng Chen, Tianqi Chen, Vinod Grover, Wei Chen, Wei Liu, Eric Chung, Luis Ceze, Roger A. Bringmann, Cyril Zeller, Michael Lightstone, Christos Kozyrakis, Humphrey Shi
2025	A	`conf`	ChipVQA: Benchmarking Visual Language Models for Chip Design. DATE Haoyu Yang, Qijing Huang, Nathaniel Ross Pinckney, Walker J. Turner, Wenfei Zhou, Yanqing Zhang, Chia-Tung Ho, Chen-Chia Chang, Haoxing Ren
2025	—	`conf`	DEMOTIC: A Differentiable Sampler for Multi-Level Digital Circuits. ASP-DAC Arash Ardakani, Minwoo Kang, Kevin He, Qijing Huang, Vighnesh M. Iyer, Suhong Moon, John Wawrzynek
2025	J	`jnl`	DEMOTIC: A Differentiable Sampler for Multi-Level Digital Circuits. CoRR Arash Ardakani, Minwoo Kang, Kevin He, Qijing Huang, Vighnesh M. Iyer, Suhong Moon, John Wawrzynek
2025	J	`jnl`	DOSA: Differentiable Model-Based One-Loop Search for DNN Accelerators. CoRR Charles Hong, Qijing Huang, Grace Dinh, Mahesh Subedar, Yakun Sophia Shao
2025	—	`conf`	EdgeReasoning: Characterizing Reasoning LLM Deployment on Edge GPUs. IISWC Benjamin Kubwimana, Qijing Huang
2025	J	`jnl`	EdgeReasoning: Characterizing Reasoning LLM Deployment on Edge GPUs. CoRR Benjamin Kubwimana, Qijing Huang
2025	J	`jnl`	Efficient MoE Serving in the Memory-Bound Regime: Balance Activated Experts, Not Tokens. CoRR Yanpeng Yu, Haiyue Ma, Krish Agarwal, Nicolai Oswald, Qijing Huang, Hugo Linsenmaier, Chunhui Mei, Ritchie Zhao, Ritika Borkar, Bita Darvish Rouhani, David Nellans, Ronny Krashinsky, Anurag Khandelwal
2025	A	`conf`	High-Throughput SAT Sampling. DATE Arash Ardakani, Minwoo Kang, Kevin He, Qijing Huang, John Wawrzynek
2025	J	`jnl`	High-Throughput SAT Sampling. CoRR Arash Ardakani, Minwoo Kang, Kevin He, Qijing Huang, John Wawrzynek
2024	A*	`conf`	Mind the Gap: Attainable Data Movement and Operational Intensity Bounds for Tensor Algorithms. ISCA Qijing Huang, Po-An Tsai, Joel S. Emer, Angshuman Parashar
2023	A*	`conf`	DOSA: Differentiable Model-Based One-Loop Search for DNN Accelerators. MICRO Charles Hong, Qijing Huang, Grace Dinh, Mahesh Subedar, Yakun Sophia Shao
2023	J	`jnl`	Full Stack Optimization of Transformer Inference: a Survey. CoRR Sehoon Kim, Coleman Hooper, Thanakul Wattanawong, Minwoo Kang, Ruohan Yan, Hasan Genc, Grace Dinh, Qijing Huang, Kurt Keutzer, Michael W. Mahoney, Yakun Sophia Shao, Amir Gholami
2022	B	`conf`	Learning A Continuous and Reconstructible Latent Space for Hardware Accelerator Design. ISPASS Qijing Huang, Charles Hong, John Wawrzynek, Mahesh Subedar, Yakun Sophia Shao
2021	—	`—`	Co-design ofAlgorithms, Hardware, and Scheduling for Deep Learning Applications Qijing Huang
2021	A	`conf`	CoDeNet: Efficient Deployment of Input-Adaptive Object Detection on Embedded FPGAs. FPGA Qijing Huang, Dequan Wang, Zhen Dong, Yizhao Gao, Yaohui Cai, Tian Li, Bichen Wu, Kurt Keutzer, John Wawrzynek
2021	A*	`conf`	CoSA: Scheduling by Constrained Optimization for Spatial Accelerators. ISCA Qijing Huang, Aravind Kalaiah, Minwoo Kang, James Demmel, Grace Dinh, John Wawrzynek, Thomas Norell, Yakun Sophia Shao
2021	J	`jnl`	CoSA: Scheduling by Constrained Optimization for Spatial Accelerators. CoRR Qijing Huang, Minwoo Kang, Grace Dinh, Thomas Norell, Aravind Kalaiah, James Demmel, John Wawrzynek, Yakun Sophia Shao
2021	Misc	`conf`	HAO: Hardware-aware Neural Architecture Optimization for Efficient Inference. FCCM Zhen Dong, Yizhao Gao, Qijing Huang, John Wawrzynek, Hayden K. H. So, Kurt Keutzer
2021	J	`jnl`	HAO: Hardware-aware neural Architecture Optimization for Efficient Inference. CoRR Zhen Dong, Yizhao Gao, Qijing Huang, John Wawrzynek, Hayden K. H. So, Kurt Keutzer
2021	A*	`conf`	HAWQ-V3: Dyadic Neural Network Quantization. ICML Zhewei Yao, Zhen Dong, Zhangcheng Zheng, Amir Gholami, Jiali Yu, Eric Tan, Leyuan Wang, Qijing Huang, Yida Wang, Michael W. Mahoney, Kurt Keutzer
2020	J	`jnl`	Algorithm-hardware Co-design for Deformable Convolution. CoRR Qijing Huang, Dequan Wang, Yizhao Gao, Yaohui Cai, Zhen Dong, Bichen Wu, Kurt Keutzer, John Wawrzynek
2020	A	`conf`	AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs. DATE Keertana Settaluri, Ameer Haj-Ali, Qijing Huang, Kourosh Hakhamaneshi, Borivoje Nikolic
2020	J	`jnl`	AutoPhase: Juggling HLS Phase Orderings in Random Forests with Deep Reinforcement Learning. CoRR Qijing Huang, Ameer Haj-Ali, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek
2020	A	`conf`	BRU: Bandwidth Regulation Unit for Real-Time Multicore Processors. RTAS Farzad Farshchi, Qijing Huang, Heechul Yun
2020	J	`jnl`	CoDeNet: Algorithm-hardware Co-design for Deformable Convolution. CoRR Zhen Dong, Dequan Wang, Qijing Huang, Yizhao Gao, Yaohui Cai, Bichen Wu, Kurt Keutzer, John Wawrzynek
2020	J	`jnl`	HAWQV3: Dyadic Neural Network Quantization. CoRR Zhewei Yao, Zhen Dong, Zhangcheng Zheng, Amir Gholami, Jiali Yu, Eric Tan, Leyuan Wang, Qijing Huang, Yida Wang, Michael W. Mahoney, Kurt Keutzer
2020	J	`jnl`	ProTuner: Tuning Programs with Monte Carlo Tree Search. CoRR Ameer Haj-Ali, Hasan Genc, Qijing Huang, William S. Moses, John Wawrzynek, Krste Asanovic, Ion Stoica
2019	—	`conf`	Algorithm-hardware Co-design for Deformable Convolution. EMC2@NeurIPS Qijing Huang, Dequan Wang, Yizhao Gao, Yaohui Cai, Zhen Dong, Bichen Wu, Kurt Keutzer, John Wawrzynek
2019	Misc	`conf`	AutoPhase: Compiler Phase-Ordering for HLS with Deep Reinforcement Learning. FCCM Qijing Huang, Ameer Haj-Ali, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek
2019	J	`jnl`	AutoPhase: Compiler Phase-Ordering for High Level Synthesis with Deep Reinforcement Learning. CoRR Ameer Haj Ali, Qijing Huang, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek
2019	A	`conf`	Centrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-Acceleration. ICCAD Qijing Huang, Christopher Yarp, Sagar Karandikar, Nathan Pemberton, Benjamin Brock, Liang Ma, Guohao Dai, Robert Quitt, Krste Asanovic, John Wawrzynek
2019	A*	`conf`	FPGA Accelerated INDEL Realignment in the Cloud. HPCA Lisa Wu, David Bruns-Smith, Frank A. Nothaft, Qijing Huang, Sagar Karandikar, Johnny Le, Andrew Lin, Howard Mao, Brendan Sweeney, Krste Asanovic, David A. Patterson, Anthony D. Joseph
2019	J	`jnl`	FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud. IEEE Micro Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy Howard Katz, Jonathan Bachrach, Krste Asanovic
2019	—	`conf`	Integrating NVIDIA Deep Learning Accelerator (NVDLA) with RISC-V SoC on FireSim. EMC2@HPCA/CVPR/ISCA Farzad Farshchi, Qijing Huang, Heechul Yun
2019	J	`jnl`	Integrating NVIDIA Deep Learning Accelerator (NVDLA) with RISC-V SoC on FireSim. CoRR Farzad Farshchi, Qijing Huang, Heechul Yun
2019	A	`conf`	Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs. FPGA Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees A. Vissers, John Wawrzynek, Kurt Keutzer
2018	A*	`conf`	FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud. ISCA Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy H. Katz, Jonathan Bachrach, Krste Asanovic
2018	J	`jnl`	Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs. CoRR Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees A. Vissers, John Wawrzynek, Kurt Keutzer
2017	—	`conf`	Synthesis of program binaries into FPGA accelerators with runtime dependence validation. FPT Shaoyi Cheng, Qijing Huang, John Wawrzynek
2015	J	`jnl`	The Effect of Compiler Optimizations on High-Level Synthesis-Generated Hardware. ACM Trans. Reconfigurable Technol. Syst. Qijing Huang, Ruolong Lian, Andrew Canis, Jongsok Choi, Ryan Xi, Nazanin Calagar, Stephen Brown, Jason Helge Anderson
2013	Misc	`conf`	From software to accelerators with LegUp high-level synthesis. CASES Andrew Canis, Jongsok Choi, Blair Fort, Ruolong Lian, Qijing Huang, Nazanin Calagar, Marcel Gort, Jia Jun Qin, Mark Aldham, Tomasz S. Czajkowski, Stephen Brown, Jason Helge Anderson
2013	Misc	`conf`	The Effect of Compiler Optimizations on High-Level Synthesis for FPGAs. FCCM Qijing Huang, Ruolong Lian, Andrew Canis, Jongsok Choi, Ryan Xi, Stephen Brown, Jason Helge Anderson