Qi Xu

59 papers A* 3A 4B 1C 1Misc 1Journal 41Unranked 8
YearRankTypeTitle / Venue / Authors
2026 J jnl
Attention-Based EDA Tool Parameter Explorer: From Hybrid Parameters to Multi-QoR Metrics.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Donger Luo, Qi Sun, Peng Xu, Su Zheng, Qi Xu, Tinghuan Chen, Bei Yu, Hao Geng
2026 J jnl
Efficient Routing-Based Synthesis for Digital Microfluidic Biochips via Reinforcement Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Biao Liu, Chen Jiang, Qi Xu, Hailong Yao, Tsung-Yi Ho, Bo Yuan
2026 J jnl
GoSteiner: Constructing Rectilinear Steiner Minimum Tree on Directed Graph.
ACM Trans. Design Autom. Electr. Syst.
Rong Sun, Qi Xu, Song Chen, Yi Kang, Bei Yu
2026 J jnl
Real-Time Compensation Framework for Large-Scale ReRAM-Based Sparse LU Factorization.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Weiran Chen, Zaitian Chen, Bei Yu, Song Chen, Yi Kang, Qi Xu
2025 — conf
AIPlace: Analog IC Placement with Multi-Task Learning Framework.
ASP-DAC
Lijie Wang, Jing Wang, Song Chen, Qi Xu
2025 A* conf
LMM-IR: Large-Scale Netlist-Aware Multimodal Framework for Static IR-Drop Prediction.
DAC
Kai Ma, Zhen Wang, Hongquan He, Qi Xu, Tinghuan Chen, Hao Geng
2025 J jnl
LMM-IR: Large-Scale Netlist-Aware Multimodal Framework for Static IR-Drop Prediction.
CoRR
Kai Ma, Zhen Wang, Hongquan He, Qi Xu, Tinghuan Chen, Hao Geng
2025 Misc conf
Robust and Efficient Adversarial Defense in SNNs via Image Purification and Joint Detection.
ICASSP
Weiran Chen, Qi Xu
2025 — conf
ThePlace: Thermal-Aware Placement With Operator Learning-Based Ultra-Fast Simulator.
ASP-DAC
Xinfei Liu, Siting Liu, Bei Yu, Song Chen, Qi Xu
2024 J jnl
AD
ACM Trans. Design Autom. Electr. Syst.
Yongtian Bi, Qi Xu, Hao Geng, Song Chen, Yi Kang
2024 A conf
Attention-Based EDA Tool Parameter Explorer: From Hybrid Parameters to Multi-QoR metrics.
DATE
Donger Luo, Qi Sun, Qi Xu, Tinghuan Chen, Hao Geng
2024 J jnl
Floorplanning with Edge-aware Graph Attention Network and Hindsight Experience Replay.
ACM Trans. Design Autom. Electr. Syst.
Bo Yang, Qi Xu, Hao Geng, Song Chen, Bei Yu, Yi Kang
2024 J jnl
Graph Attention-Based Symmetry Constraint Extraction for Analog Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap.
Qi Xu, Lijie Wang, Jing Wang, Lin Cheng, Song Chen, Yi Kang
2024 A conf
Miracle: Multi-Action Reinforcement Learning-Based Chip Floorplanning Reasoner.
DATE
Bo Yang, Qi Xu, Hao Geng, Song Chen, Yi Kang
2024 J jnl
NicePIM: Design Space Exploration for Processing-In-Memory DNN Accelerators With 3-D Stacked-DRAM.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Junpeng Wang, Mengke Ge, Bo Ding, Qi Xu, Song Chen, Yi Kang
2024 A* conf
OTPlace-Vias: A Novel Optimal Transport Based Method for High Density Vias Placement in 3D Circuits.
DAC
Lin Chen, Qi Xu, Hu Ding
2024 A conf
Parallel Multi-Objective Bayesian Optimization Framework for CGRA Microarchitecture.
DATE
Bing Li, Wendi Sun, Xiaobing Ni, Kaixuan He, Qi Xu, Song Chen, Yi Kang
2023 J jnl
A Cooperative Multiagent Reinforcement Learning Framework for Droplet Routing in Digital Microfluidic Biochips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Chen Jiang, Rongquan Yang, Qi Xu, Hailong Yao, Tsung-Yi Ho, Bo Yuan
2023 J jnl
BusMap: Application Mapping With Bus Routing for Coarse-Grained Reconfigurable Array.
IEEE Trans. Circuits Syst. II Express Briefs
Xiaobing Ni, Mengke Ge, Yongjin Tao, Wendi Sun, Feixiang Duan, Xuefei Bai, Qi Xu, Song Chen, Yi Kang
2023 J jnl
DDAM: Data Distribution-Aware Mapping of CNNs on Processing-In-Memory Systems.
ACM Trans. Design Autom. Electr. Syst.
Junpeng Wang, Haitao Du, Bo Ding, Qi Xu, Song Chen, Yi Kang
2023 J jnl
Graph Attention-Based Symmetry Constraint Extraction for Analog Circuits.
CoRR
Qi Xu, Lijie Wang, Jing Wang, Song Chen, Lin Cheng, Yi Kang
2023 J jnl
Memory-aware Partitioning, Scheduling, and Floorplanning for Partially Dynamically Reconfigurable Systems.
ACM Trans. Design Autom. Electr. Syst.
Bo Ding, Jinglei Huang, Qi Xu, Junpeng Wang, Song Chen, Yi Kang
2023 — conf
Mixed-Type Wafer Failure Pattern Recognition.
ASP-DAC
Hao Geng, Qi Sun, Tinghuan Chen, Qi Xu, Tsung-Yi Ho, Bei Yu
2023 J jnl
NicePIM: Design Space Exploration for Processing-In-Memory DNN Accelerators with 3D-Stacked-DRAM.
CoRR
Junpeng Wang, Mengke Ge, Bo Ding, Qi Xu, Song Chen, Yi Kang
2023 J jnl
Reliability-Driven Memristive Crossbar Design in Neuromorphic Computing Systems.
IEEE Trans Autom. Sci. Eng.
Qi Xu, Junpeng Wang, Bo Yuan, Qi Sun, Song Chen, Bei Yu, Yi Kang, Feng Wu
2023 J jnl
Resist: Robust Network Training for Memristive Crossbar-Based Neuromorphic Computing Systems.
IEEE Trans. Circuits Syst. II Express Briefs
Yongtian Bi, Qi Xu, Hao Geng, Song Chen, Yi Kang
2023 J jnl
Task Modules Partitioning, Scheduling and Floorplanning for Partially Dynamically Reconfigurable Systems with Heterogeneous Resources.
ACM Trans. Design Autom. Electr. Syst.
Bo Ding, Jinglei Huang, Junpeng Wang, Qi Xu, Song Chen, Yi Kang
2023 B conf
Tolerating Device-to-Device Variation for Memristive Crossbar-Based Neuromorphic Computing Systems: A New Bayesian Perspective.
IJCNN
Yang Xiao, Qi Xu, Bo Yuan
2022 J jnl
Cellular Structure-Based Fault-Tolerance TSV Configuration in 3D-IC.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Qi Xu, Wenhao Sun, Song Chen, Yi Kang, Xiaoqing Wen
2022 J jnl
Fortune: A New Fault-Tolerance TSV Configuration in Router-Based Redundancy Structure.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Qi Xu, Hao Geng, Tianming Ni, Song Chen, Bei Yu, Yi Kang, Xiaoqing Wen
2022 J jnl
GoodFloorplan: Graph Convolutional Network and Reinforcement Learning-Based Floorplanning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Qi Xu, Hao Geng, Song Chen, Bo Yuan, Cheng Zhuo, Yi Kang, Xiaoqing Wen
2022 J jnl
High-Speed Adder Design Space Exploration via Graph Neural Processes.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hao Geng, Yuzhe Ma, Qi Xu, Jin Miao, Subhendu Roy, Bei Yu
2022 A* conf
PPATuner: pareto-driven tool parameter auto-tuning in physical design via gaussian process transfer learning.
DAC
Hao Geng, Qi Xu, Tsung-Yi Ho, Bei Yu
2022 J jnl
Synthesizing Brain-network-inspired Interconnections for Large-scale Network-on-chips.
ACM Trans. Design Autom. Electr. Syst.
Mengke Ge, Xiaobing Ni, Qi Xu, Song Chen, Jinglei Huang, Yi Kang, Feng Wu
2022 J jnl
Task modules Partitioning, Scheduling and Floorplanning for Partially Dynamically Reconfigurable Systems Based on Modern Heterogeneous FPGAs.
CoRR
Bo Ding, Jinglei Huang, Junpeng Wang, Qi Xu, Song Chen, Yi Kang
2021 J jnl
A Cost-Effective TSV Repair Architecture for Clustered Faults in 3-D IC.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tianming Ni, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan, Xiaoqing Wen
2021 J jnl
Cross-Layer Dual Modular Redundancy Hardened Scheme of Flip-Flop Design Based on Sense-Amplifier.
J. Circuits Syst. Comput.
Zhengfeng Huang, Zian Su, Tianming Ni, Qi Xu, Haochen Qi, Yingchun Lu, Manzi Eric, Hui Xu
2021 A conf
Reliability-Driven Neuromorphic Computing Systems Design.
DATE
Qi Xu, Junpeng Wang, Hao Geng, Song Chen, Xiaoqing Wen
2021 J jnl
Synthesizing Brain-Network-Inspired Interconnections for Large-Scale Network-on-Chips.
CoRR
Mengke Ge, Xiaobing Ni, Qi Xu, Song Chen, Jinglei Huang, Yi Kang, Feng Wu
2020 J jnl
Architecture of Cobweb-Based Redundant TSV for Clustered Faults.
IEEE Trans. Very Large Scale Integr. Syst.
Tianming Ni, Dongsheng Liu, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan
2020 J jnl
Fault tolerance in memristive crossbar-based neuromorphic computing systems.
Integr.
Qi Xu, Song Chen, Hao Geng, Bo Yuan, Bei Yu, Feng Wu, Zhengfeng Huang
2020 — conf
Fault-Tolerant-Driven Clustering for Large Scale Neuromorphic Computing Systems.
AICAS
Yuting Wu, Bo Ding, Qi Xu, Song Chen
2020 J jnl
Generalized Fault-Tolerance Topology Generation for Application-Specific Network-on-Chips.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Song Chen, Mengke Ge, Zhigang Li, Jinglei Huang, Qi Xu, Feng Wu
2020 J jnl
Integrated Optimization of Partitioning, Scheduling, and Floorplanning for Partially Dynamically Reconfigurable Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Song Chen, Jinglei Huang, Xiaodong Xu, Bo Ding, Qi Xu
2020 J jnl
Memristive Crossbar Mapping for Neuromorphic Computing Systems on 3D IC.
ACM Trans. Design Autom. Electr. Syst.
Qi Xu, Hao Geng, Song Chen, Bei Yu, Feng Wu
2020 J jnl
Non-Intrusive Online Distributed Pulse Shrinking-Based Interconnect Testing in 2.5D IC.
IEEE Trans. Circuits Syst.
Tianming Ni, Hao Chang, Tai Song, Qi Xu, Zhengfeng Huang, Huaguo Liang, Aibin Yan, Xiaoqing Wen
2020 C conf
Reliability-Driven Neural Network Training for Memristive Crossbar-Based Neuromorphic Computing Systems.
ISCAS
Junpeng Wang, Qi Xu, Bo Yuan, Song Chen, Bei Yu, Feng Wu
2020 — conf
Synthesizing A Generalized Brain-inspired Interconnection Network for Large-scale Network-on-chip Systems.
ACM Great Lakes Symposium on VLSI
Mengke Ge, Qi Xu, Huajie Ruan, Xiaobing Ni, Song Chen, Yi Kang
2019 J jnl
Adaptive 3D-IC TSV Fault Tolerance Structure Generation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Song Chen, Qi Xu, Bei Yu
2019 J jnl
Generalized Fault-Tolerance Topology Generation for Application Specific Network-on-Chips.
CoRR
Song Chen, Mengke Ge, Zhigang Li, Jinglei Huang, Qi Xu, Feng Wu
2019 J jnl
Temperature-Aware Floorplanning for Fixed-Outline 3D ICs.
IEEE Access
Tianming Ni, Hao Chang, Shidong Zhu, Lin Lu, Xueyun Li, Qi Xu, Huaguo Liang, Zhengfeng Huang
2018 J jnl
Adaptive 3D-IC TSV Fault Tolerance Structure Generation.
CoRR
Song Chen, Qi Xu, Bei Yu
2018 J jnl
Integrated Optimization of Partitioning, Scheduling and Floorplanning for Partially Dynamically Reconfigurable Systems.
CoRR
Song Chen, Jinglei Huang, Xiaodong Xu, Qi Xu
2018 — conf
Memristive Crossbar Mapping for Neuromorphic Computing Systems on 3D IC.
ACM Great Lakes Symposium on VLSI
Qi Xu, Song Chen, Bei Yu, Feng Wu
2017 — conf
An Integrated Optimization Framework for Partitioning, Scheduling and Floorplanning on Partially Dynamically Reconfigurable FPGAs.
ACM Great Lakes Symposium on VLSI
Xiaodong Xu, Qi Xu, Jinglei Huang, Song Chen
2017 J jnl
Clustered Fault Tolerance TSV Planning for 3-D Integrated Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Qi Xu, Song Chen, Xiaodong Xu, Bei Yu
2017 J jnl
Fast thermal analysis for fixed-outline 3D floorplanning.
Integr.
Qi Xu, Song Chen
2017 — conf
Integer linear programming based fault-tolerant topology synthesis for application-specific NoC.
ASICON
Zhigang Li, Jinglei Huang, Qi Xu, Song Chen
2016 J jnl
Combining the ant system algorithm and simulated annealing for 3D/2D fixed-outline floorplanning.
Appl. Soft Comput.
Qi Xu, Song Chen, Bin Li