Qi Liu - RankMe

94 papers A* 8C 7Journal 51Unranked 27

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	14.1 THz-TSI: A 0.33pJ/b 264Gb/s Through-Silicon Interconnect Module for 3D Integration Utilizing Terahertz Coupling. ISSCC Chen Jiang, Xiaodi Feng, Xiaohan Shen, Chixiao Chen, Qi Liu, Ming Liu, Ningsheng Xu
2026	—	`conf`	A 1.2GHz 12.77GB/s/mm ISSCC Yue Cao, Jinghao Jiang, Haijun Jiang, Qian Zhang, Xuanzhi Liu, Jinhui Cheng, Zhongze Han, Xiping Jiang, Fengguo Zuo, Song Wang, Fujun Bai, Yixin Guo, Chunmeng Dou, Jianguo Yang, Hangbing Lv, Qi Liu, Ming Liu
2026	—	`conf`	A 128×96 Multimodal Flash LiDAR SPAD Imager with Object Segmentation Latency of 18μs Based on Compute-Near-Sensor Ising Annealing Machine. ISSCC Jingyi Wang, Tao Hong, Bu Chen, Zhangcheng Huang, Qi Liu, Ming Liu
2026	J	`jnl`	A 13-GS/s 9-bit Time-Interleaved Pipelined-SAR ADC With Common-Mode Regulated Floating-Inverter-Amplifier and Rapid-Tracking Bootstrapped Switch. IEEE Trans. Circuits Syst. I Regul. Pap. Ji Guo, Jianwei Liu, Danfeng Zhai, Xinsheng Wang, Wenning Jiang, Qi Liu, Ming Liu
2026	—	`conf`	A 16Gb/s/pin 0.51pJ/b Single-Ended NRZ Transceiver with Distributed Dual-Loop VDDQ-Ripple Compensation and Dynamic Clock Duty-Cycle Calibration for Memory Interfaces. ISSCC Yuchen He, Yunbin Luo, Yunzhengmao Wang, Tengyue Yi, Chen Jiang, Chixiao Chen, Qi Liu, Ming Liu, Wenning Jiang
2026	J	`jnl`	A 21-Transistor Single-Phase-Clocked Flip-Flop With Low Leakage Current for Near-Threshold Voltage Operation. IEEE Trans. Circuits Syst. II Express Briefs Chenyang Li, Jingsong Zhang, Jin Xin, Keji Zhou, Jinhao Liang, Siyuan Ouyang, Fangduo Zhu, Xumeng Zhang, Qi Liu
2026	J	`jnl`	A 22-nm 109.3-to-249.5-TFLOPS/W Outlier-Aware Floating-Point SRAM Compute-in-Memory Macro for Large Language Models. IEEE J. Solid State Circuits Siqi He, Haozhe Zhu, Hongyi Zhang, Yujie Ma, Zexing Chen, Mengjie Li, Danfeng Zhai, Chixiao Chen, Qi Liu, Xiaoyang Zeng, Ming Liu
2026	J	`jnl`	A Sparse-Integrated Filtering Residual Spiking Neural Network for High-Accuracy Spike Sorting and Co-Optimization on Memristor Platforms. IEEE Trans. Biomed. Circuits Syst. Yiwen Zhu, Jingyi Chen, Lingli Cheng, Fangduo Zhu, Xumeng Zhang, Qi Liu
2026	J	`jnl`	COPIC: A Codesigned Accelerator for Efficient Octree-Based Learned Point Cloud Compression at Edge. IEEE Trans. Very Large Scale Integr. Syst. Jiapei Zheng, Yutong Su, Siqi He, Jie Yang, Haozhe Zhu, Qi Liu, Chixiao Chen
2026	J	`jnl`	SHINSAI: A 586 mm IEEE J. Solid State Circuits Haozhe Zhu, Bo Jiao, Yuman Zeng, Yongjiang Li, Jie Liao, Siyao Jia, Zexing Chen, Liyu Lin, Xuanda Lin, Suchang Huang, Mochen Tian, Jundong Zhu, Dexin Wen, Yan Wang, Yu Wang, Jian Xu, Feng Wang, Jun Tao, Chixiao Chen, Qi Liu, Ming Liu
2025	—	`conf`	37.4 SHINSAI: A 586mm ISSCC Bo Jiao, Haozhe Zhu, Yuman Zeng, Yongjiang Li, Jie Liao, Siyao Jia, Mochen Tian, Zexing Chen, Jundong Zhu, Dexin Wen, Yan Wang, Yu Wang, Jian Xu, Feng Wang, Jun Tao, Chixiao Chen, Qi Liu, Ming Liu
2025	C	`conf`	A 0.22 pJ/bit Processing-in-Controller GEMV Macro with Weight Prefetch for Efficient Near-Memory Computing. ISCAS Jie Yang, Jiapei Zheng, Siqi He, Lizhou Wu, Chen Mu, Haozhe Zhu, Liyu Lin, Qi Liu, Chixiao Chen
2025	J	`jnl`	A 101-dB DR 2.2GΩ-Input-Impedance Direct Digitization ExG Front-End With Δ-Modulation. IEEE Trans. Biomed. Circuits Syst. Yuying Li, Hao Li, Tianxiang Qu, Qi Liu, Zhiliang Hong, Jiawei Xu
2025	J	`jnl`	A 28-nm RRAM/SRAM Collaborative CIM Accelerator Supporting RRAM-Endurance-Latency Awareness for Edge Fine-Tuning. IEEE J. Solid State Circuits Chen Mu, Zhirui Huang, Hao Jiang, Jie Liao, Yuliang Zhou, Liang Chen, Yechu Zhang, Haozhe Zhu, Jianguo Yang, Qi Liu, Chixiao Chen
2025	J	`jnl`	A Novel Neuromorphic Hardware Using Area-Efficient Chain RRAM-Based Synapses and Compact Neurons With (Anti-) Integration Scheme. IEEE Trans. Circuits Syst. I Regul. Pap. Qiqiao Wu, Honghu Yang, Yixuan Liu, Yue Cao, Yongkang Han, Haijun Jiang, Keji Zhou, Hailan Yi, Jianguo Yang, Qi Liu
2025	—	`conf`	A PMOS-Based Deep Cryogenic CMOS Temperature Sensor Achieving a Range from 10K to 410K with a Relative Inaccuracy of 0.5% (3σ). CICC Xingyu Qi, Yingzhe Sha, Xufeng Kou, Xiaoyong Xue, Peng Wang, Zhangcheng Huang, Qi Liu, Ming Liu
2025	A*	`conf`	DRAFT: Decoupling Backpropagation from Pre-trained Backbone for Efficient Transformer Fine-Tuning on Edge. DAC Zhirui Huang, Shiwei Liu, Haozhe Zhu, Qi Liu, Chixiao Chen
2025	A*	`conf`	EIGEN: Enabling Efficient 3DIC Interconnect with Heterogeneous Dual-Layer Network-on-Active-Interposer. HPCA Siyao Jia, Bo Jiao, Haozhe Zhu, Chixiao Chen, Qi Liu, Ming Liu
2025	J	`jnl`	Efficient modeling of ionic and electronic interactions by a resistive memory-based reservoir graph neural network. Nat. Comput. Sci. Meng Xu, Shaocong Wang, Yangu He, Yi Li, Woyu Zhang, Ming Yang, Xiaojuan Qi, Zhongrui Wang, Ming Xu, Dashan Shang, Qi Liu, Xiangshui Miao, Ming Liu
2025	A*	`conf`	Hydra: Harnessing Expert Popularity for Efficient Mixture-of-Expert Inference on Chiplet System. DAC Siqi He, Haozhe Zhu, Jiapei Zheng, Lizhou Wu, Bo Jiao, Qi Liu, Xiaoyang Zeng, Chixiao Chen
2025	A*	`conf`	McPAL: Scaling Unstructured Sparse Inference with Multi-Chiplet HBM-PIM Architecture for LLMs. DAC Shiwei Liu, Zhirui Huang, Jiangnan Yu, Qi Liu, Chixiao Chen
2025	J	`jnl`	Memristive Hodgkin-Huxley Neurons with Diverse Firing Patterns for High-Order Neuromorphic Computing. Adv. Intell. Syst. Yue Yang, Xumeng Zhang, Pei Chen, Lingli Cheng, Chao Li, Yanting Ding, Qi Liu
2025	J	`jnl`	RT-FLOW: FPGA Implementation of Real-Time Optical-Flow-Based SLAM for High-Speed Tracking and High-Quality Mapping. IEEE Trans. Circuits Syst. I Regul. Pap. Mengjie Li, Yiming Zhang, Siqi He, Qi Liu, Xiaoyang Zeng, Chixiao Chen, Haozhe Zhu
2025	J	`jnl`	Resistive memory-based zero-shot liquid state machine for multimodal event data learning. Nat. Comput. Sci. Ning Lin, Shaocong Wang, Yi Li, Bo Wang, Shuhui Shi, Yangu He, Woyu Zhang, Yifei Yu, Yue Zhang, Xinyuan Zhang, Kwunhang Wong, Songqi Wang, Xiaoming Chen, Hao Jiang, Xumeng Zhang, Peng Lin, Xiaoxin Xu, Xiaojuan Qi, Zhongrui Wang, Dashan Shang, Qi Liu, Ming Liu
2025	A*	`conf`	SDISC: A Spike-Driven Human-Machine Interface with In-Situ Computing for Real-Time Low-Power Interaction. DAC Fangduo Zhu, Jingyi Chen, Jingsong Zhang, Xumeng Zhang, Siyuan Ouyang, Chenyang, Hao Jiang, Xiaonan Yang, Qi Liu
2024	—	`conf`	34.9 A Flash-SRAM-ADC-Fused Plastic Computing-in-Memory Macro for Learning in Neural Networks in a Standard 14nm FinFET Process. ISSCC Linfang Wang, Weizeng Li, Zhidao Zhou, Hanghang Gao, Zhi Li, Wang Ye, Hongyang Hu, Jing Liu, Jinshan Yue, Jianguo Yang, Qing Luo, Chunmeng Dou, Qi Liu, Ming Liu
2024	C	`conf`	A 128×128 CMOS SPAD Receiver for 500Mbps Free Space Optical Communication with Column-wise Decoding and Fast Spot Tracking. ISCAS Bu Chen, Zhangcheng Huang, Qi Liu
2024	—	`conf`	A 13b 500MS/s Dual-Residue Pipelined-SAR ADC with One-Way Switching Capacitive Interpolation and Background Offset Calibration. CICC Wenning Jiang, Yunbin Luo, Peizhe Li, Ji Guo, Chixiao Chen, Qi Liu
2024	—	`conf`	A 28-nm 10.4-fJ/b Cryogenic embedded DRAM with 3T1C Gain Cell and MBIST at 4-Kelvin. ISOCC Jiapei Zheng, Xinkai Nie, Zhenghang Zhi, Zhidong Tang, Qi Liu, Xufeng Kou, Chixiao Chen
2024	—	`conf`	A 28nm 76.25TOPS/W RRAM/SRAM-Collaborative CIM Fine-Tuning Accelerator with RRAM-Endurance/Latency-Aware Weight Allocation for CNN and Transformer. A-SSCC Chen Mu, Zhirui Huang, Hao Jiang, Jie Liao, Bo Jiao, Yuliang Zhou, Haozhe Zhu, Jianguo Yang, Qi Liu, Chixiao Chen
2024	—	`conf`	A 32×32 Flash LiDAR SPAD Sensor with Up-to-1kfps Motional Target Detection by Threshold-adaptive 2D Dynamic Vision. CICC Jingyi Wang, Zhangcheng Huang, Bu Chen, Hongyang Shang, Jiapei Zheng, Hankun Lv, Chixiao Chen, Qi Liu, Ming Liu
2024	—	`conf`	A 32×32 SPAD LiDAR Sensor with In-pixel Spatial-temporal Coincidence and Per-SPAD Pulse Delay for Resolution-lossless Imaging. A-SSCC Bu Chen, Zhangcheng Huang, Jingyi Wang, Hongyang Shang, Hankun Lv, Qi Liu, Ming Liu
2024	J	`jnl`	A 6.4-Gbps 0.41-pJ/b fully-digital die-to-die interconnect PHY for silicon interposer based 2.5D integration. Integr. Yinglin Yang, Yunzhengmao Wang, Tengyue Yi, Chixiao Chen, Qi Liu
2024	J	`jnl`	A 9-Mb HZO-Based Embedded FeRAM With 10-Cycle Endurance and 5/7-ns Read/Write Using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier. IEEE J. Solid State Circuits Qiqiao Wu, Yue Cao, Qing Luo, Haijun Jiang, Zhongze Han, Yongkang Han, Chunmeng Dou, Hangbing Lv, Qi Liu, Jianguo Yang, Ming Liu
2024	—	`conf`	A Real-Time Optical-Flow-based SLAM FPGA Accelerator with Inter-Frame Similarity Exploitation and Correlation-Guided Mixed-Precision Flow Update. A-SSCC Mengjie Li, Haozhe Zhu, Yiming Zhang, Siqi He, Qi Liu, Xiaoyang Zeng, Chixiao Chen
2024	J	`jnl`	A Scalable Area-Efficient Low-Delay Asynchronous AER Circuits Design for Neuromorphic Chips. IEEE Trans. Circuits Syst. II Express Briefs Siyuan Ouyang, Keji Zhou, Hao Jiang, Chenyang Li, Jinhao Liang, Fangduo Zhu, Xumeng Zhang, Qi Liu
2024	J	`jnl`	ANP-I: A 28-nm 1.5-pJ/SOP Asynchronous Spiking Neural Network Processor Enabling Sub-0.1-μ J/Sample On-Chip Learning for Edge-AI Applications. IEEE J. Solid State Circuits Jilin Zhang, Dexuan Huo, Jian Zhang, Chunqi Qian, Qi Liu, Liyang Pan, Zhihua Wang, Ning Qiao, Kea-Tiong Tang, Hong Chen
2024	A*	`conf`	CAMPER: Exploring the Potential of Content Addressable Memory for 3D Point Cloud Efficient Range Search. DAC Jiapei Zheng, Lizhou Wu, Yutong Su, Jingyi Wang, Zhangcheng Huang, Chixiao Chen, Qi Liu
2024	A*	`conf`	CEDAR: Computing-in-pixel Edge-aware Detection and Reconstruction Architecture for High-resolution 3D Imaging. DAC Bu Chen, Zhangcheng Huang, Qi Zheng, Weiyi Tang, Jingyi Wang, Hankun Lv, Chixiao Chen, Jianlu Wang, Qi Liu
2024	J	`jnl`	Continuous-Time Digital Twin with Analogue Memristive Neural Ordinary Differential Equation Solver. CoRR Hegan Chen, Jichang Yang, Jia Chen, Songqi Wang, Shaocong Wang, Dingchen Wang, Xinyu Tian, Yifei Yu, Xi Chen, Yinan Lin, Yangu He, Xiaoshan Wu, Yi Li, Xinyuan Zhang, Ning Lin, Meng Xu, Xumeng Zhang, Zhongrui Wang, Han Wang, Dashan Shang, Qi Liu, Kwang-Ting Cheng, Ming Liu
2024	J	`jnl`	Dynamic neural network with memristive CIM and CAM for 2D and 3D vision. CoRR Yue Zhang, Woyu Zhang, Shaocong Wang, Ning Lin, Yifei Yu, Yangu He, Bo Wang, Hao Jiang, Peng Lin, Xiaoxin Xu, Xiaojuan Qi, Zhongrui Wang, Xumeng Zhang, Dashan Shang, Qi Liu, Kwang-Ting Cheng, Ming Liu
2024	J	`jnl`	Efficient and accurate neural field reconstruction using resistive memory. CoRR Yifei Yu, Shaocong Wang, Woyu Zhang, Xinyuan Zhang, Xiuzhe Wu, Yangu He, Jichang Yang, Yue Zhang, Ning Lin, Bo Wang, Xi Chen, Songqi Wang, Xumeng Zhang, Xiaojuan Qi, Zhongrui Wang, Dashan Shang, Qi Liu, Kwang-Ting Cheng, Ming Liu
2024	J	`jnl`	FPIA: Communication-Aware Multi-Chiplet Integration With Field-Programmable Interconnect Fabric on Reusable Silicon Interposer. IEEE Trans. Circuits Syst. I Regul. Pap. Bo Jiao, Lei Xu, Xinyu Yu, Haitao Yang, Haozhe Zhu, Yu Wang, Jundong Zhu, Dexin Wen, Lingli Wang, Jun Tao, Chixiao Chen, Yinhe Han, Qi Liu, Ninghui Sun, Ming Liu
2024	J	`jnl`	HARDSEA: Hybrid Analog-ReRAM Clustering and Digital-SRAM In-Memory Computing Accelerator for Dynamic Sparse Self-Attention in Transformer. IEEE Trans. Very Large Scale Integr. Syst. Shiwei Liu, Chen Mu, Hao Jiang, Yunzhengmao Wang, Jinshan Zhang, Feng Lin, Keji Zhou, Qi Liu, Chixiao Chen
2024	J	`jnl`	Hi-NeRF: A Multicore NeRF Accelerator With Hierarchical Empty Space Skipping for Edge 3-D Rendering. IEEE Trans. Very Large Scale Integr. Syst. Lizhou Wu, Haozhe Zhu, Jiapei Zheng, Mengjie Li, Yinuo Cheng, Qi Liu, Xiaoyang Zeng, Chixiao Chen
2024	—	`conf`	High-efficient and Comprehensive Modeling of MFIM Ferroelectric Tunnel Junctions for Non-volatile/Volatile Applications. IMW Yu Li, Hao Jiang, Jie Yu, Xuanyu Zhao, Xiaodong Wang, Qihan Liu, Yingfen Wei, Qi Liu, Ming Liu
2024	J	`jnl`	Resistive Memory-based Neural Differential Equation Solver for Score-based Diffusion Model. CoRR Jichang Yang, Hegan Chen, Jia Chen, Songqi Wang, Shaocong Wang, Yifei Yu, Xi Chen, Bo Wang, Xinyuan Zhang, Binbin Cui, Yi Li, Ning Lin, Meng Xu, Xiaoxin Xu, Xiaojuan Qi, Zhongrui Wang, Xumeng Zhang, Dashan Shang, Han Wang, Qi Liu, Kwang-Ting Cheng, Ming Liu
2024	J	`jnl`	SLAM-CIM: A Visual SLAM Backend Processor With Dynamic-Range-Driven-Skipping Linear-Solving FP-CIM Macros. IEEE J. Solid State Circuits Mengjie Li, Haozhe Zhu, Siqi He, Hongyi Zhang, Jie Liao, Danfeng Zhai, Chixiao Chen, Qi Liu, Xiaoyang Zeng, Ninghui Sun, Ming Liu
2024	J	`jnl`	Write-Verify-Free MLC RRAM Using Nonbinary Encoding for AI Weight Storage at the Edge. IEEE Trans. Very Large Scale Integr. Syst. Junjie An, Zhidao Zhou, Linfang Wang, Wang Ye, Weizeng Li, Hanghang Gao, Zhi Li, Jinghui Tian, Yan Wang, Hongyang Hu, Jinshan Yue, Lingyan Fan, Shibing Long, Qi Liu, Chunmeng Dou
2023	C	`conf`	A $2.53 \mu \mathrm{W}/\text{channel}$ Event-Driven Neural Spike Sorting Processor with Sparsity-Aware Computing-In-Memory Macros. ISCAS Hao Jiang, Jiapei Zheng, Yunzhengmao Wang, Jinshan Zhang, Haozhe Zhu, Liangjian Lyu, Yingping Chen, Chixiao Chen, Qi Liu
2023	J	`jnl`	A 14b 500 MS/s Single-Channel Pipelined-SAR ADC With Reference Ripple Mitigation Techniques and Adaptively Biased Floating Inverter Amplifier. IEEE J. Solid State Circuits Wenning Jiang, Yan Zhu, Chixiao Chen, Hao Xu, Qi Liu, Ming Liu, Rui Paulo Martins, Chi-Hang Chan
2023	J	`jnl`	A 28-nm RRAM Computing-in-Memory Macro Using Weighted Hybrid 2T1R Cell Array and Reference Subtracting Sense Amplifier for AI Edge Inference. IEEE J. Solid State Circuits Wang Ye, Linfang Wang, Zhidao Zhou, Junjie An, Weizeng Li, Hanghang Gao, Zhi Li, Jinshan Yue, Hongyang Hu, Xiaoxin Xu, Jianguo Yang, Jing Liu, Dashan Shang, Feng Zhang, Jinghui Tian, Chunmeng Dou, Qi Liu, Ming Liu
2023	—	`conf`	A 28nm 53.8TOPS/W 8b Sparse Transformer Accelerator with In-Memory Butterfly Zero Skipper for Unstructured-Pruned NN and CIM-Based Local-Attention-Reusable Engine. ISSCC Shiwei Liu, Peizhe Li, Jinshan Zhang, Yunzhengmao Wang, Haozhe Zhu, Wenning Jiang, Shan Tang, Chixiao Chen, Qi Liu, Ming Liu
2023	—	`conf`	A 9Mb HZO-Based Embedded FeRAM with 10 ISSCC Jianguo Yang, Qing Luo, Xiaoyong Xue, Haijun Jiang, Qiqiao Wu, Zhongze Han, Yue Cao, Yongkang Han, Chunmeng Dou, Hangbing Lv, Qi Liu, Ming Liu
2023	C	`conf`	A Scalable Die-to-Die Interconnect with Replay and Repair Schemes for 2.5D/3D Integration. ISCAS Jie Liao, Bo Jiao, Jinshan Zhang, Shiwei Liu, Hao Jiang, Jun Tao, Wenning Jiang, Qi Liu, Lihua Zhang, Haozhe Zhu, Chixiao Chen
2023	—	`conf`	ANP-I: A 28nm 1.5pJ/SOP Asynchronous Spiking Neural Network Processor Enabling Sub-O.1 μJ/Sample On-Chip Learning for Edge-AI Applications. ISSCC Jilin Zhang, Dexuan Huo, Jian Zhang, Chunqi Qian, Qi Liu, Liyang Pan, Zhihua Wang, Ning Qiao, Kea-Tiong Tang, Hong Chen
2023	J	`jnl`	An Emerging NVM CIM Accelerator With Shared-Path Transpose Read and Bit-Interleaving Weight Storage for Efficient On-Chip Training in Edge Devices. IEEE Trans. Circuits Syst. II Express Briefs Zhiwang Guo, Deyang Chen, Chenyang Zhao, Jinbei Fang, Jingwen Jiang, Yixuan Liu, Haidong Tian, Xiankui Xiong, Keji Zhou, Xiaoyong Xue, Qi Liu, Xiaoyang Zeng
2023	—	`conf`	Bit-Offsetter: A Bit-serial DNN Accelerator with Weight-offset MAC for Bit-wise Sparsity Exploitation. AICAS Siqi He, Hongyi Zhang, Mengjie Li, Haozhe Zhu, Chixiao Chen, Qi Liu, Xiaoyang Zeng
2023	J	`jnl`	Echo state graph neural networks with analogue random resistive memory arrays. Nat. Mac. Intell. Shaocong Wang, Yi Li, Dingchen Wang, Woyu Zhang, Xi Chen, Danian Dong, Songqi Wang, Xumeng Zhang, Peng Lin, Claudio Gallicchio, Xiaoxin Xu, Qi Liu, Kwang-Ting Cheng, Zhongrui Wang, Dashan Shang, Ming Liu
2023	J	`jnl`	Multicore Spiking Neuromorphic Chip in 180-nm With ReRAM Synapses and Digital Neurons. IEEE J. Emerg. Sel. Topics Circuits Syst. Hao Jiang, Jikai Lu, Chenggao Zhang, Shuangzhu Tang, Junjie An, Lingli Cheng, Jian Lu, Jinsong Wei, Keji Zhou, Xumeng Zhang, Tuo Shi, Qi Liu
2023	J	`jnl`	Pruning random resistive memory for optimizing analogue AI. CoRR Yi Li, Songqi Wang, Yaping Zhao, Shaocong Wang, Woyu Zhang, Yangu He, Ning Lin, Binbin Cui, Xi Chen, Shiming Zhang, Hao Jiang, Peng Lin, Xumeng Zhang, Xiaojuan Qi, Zhongrui Wang, Xiaoxin Xu, Dashan Shang, Qi Liu, Kwang-Ting Cheng, Ming Liu
2023	J	`jnl`	Random resistive memory-based deep extreme point learning machine for unified visual processing. CoRR Shaocong Wang, Yizhao Gao, Yi Li, Woyu Zhang, Yifei Yu, Bo Wang, Ning Lin, Hegan Chen, Yue Zhang, Yang Jiang, Dingchen Wang, Jia Chen, Peng Dai, Hao Jiang, Peng Lin, Xumeng Zhang, Xiaojuan Qi, Xiaoxin Xu, Hayden K. H. So, Zhongrui Wang, Dashan Shang, Qi Liu, Kwang-Ting Cheng, Ming Liu
2023	J	`jnl`	Resistive memory-based zero-shot liquid state machine for multimodal event data learning. CoRR Ning Lin, Shaocong Wang, Yi Li, Bo Wang, Shuhui Shi, Yangu He, Woyu Zhang, Yifei Yu, Yue Zhang, Xiaojuan Qi, Xiaoming Chen, Hao Jiang, Xumeng Zhang, Peng Lin, Xiaoxin Xu, Qi Liu, Zhongrui Wang, Dashan Shang, Ming Liu
2023	A*	`conf`	TiPU: A Spatial-Locality-Aware Near-Memory Tile Processing Unit for 3D Point Cloud Neural Network. DAC Jiapei Zheng, Hao Jiang, Xinkai Nie, Zhangcheng Huang, Chixiao Chen, Qi Liu
2023	J	`jnl`	Ultralow-Power Compact Artificial Synapse Based on a Ferroelectric Fin Field-Effect Transistor for Spatiotemporal Information Processing. Adv. Intell. Syst. Zhaohao Zhang, Guohui Zhan, Weizhuo Gan, Yan Cheng, Xumeng Zhang, Yue Peng, Jianshi Tang, Fan Zhang, Jiali Huo, Gaobo Xu, Qingzhu Zhang, Zhenhua Wu, Yan Liu, Hangbing Lv, Qi Liu, Genquan Han, Huaxiang Yin, Jun Luo, Wenwu Wang
2022	C	`conf`	A 11.6μ W Computing-on-Memory-Boundary Keyword Spotting Processor with Joint MFCC-CNN Ternary Quantization. ISCAS Xinru Jia, Haozhe Zhu, Yunzheng Wang, Jinshan Zhang, Feng Lin, Xiankui Xiong, Dong Xu, Chixiao Chen, Qi Liu
2022	—	`conf`	A 200M-Query-Vector/s Computing-in-RRAM ADC-less k-Nearest-Neighbor Accelerator with Time-Domain Winner-Takes-All Circuits. AICAS Chen Mu, Yunzhengmao Wang, Jiapei Zheng, Shiwei Liu, Keji Zhou, Shan Tang, Chixiao Chen, Qi Liu
2022	J	`jnl`	A 28 nm 81 Kb 59-95.3 TOPS/W 4T2R ReRAM Computing-in-Memory Accelerator With Voltage-to-Time-to-Digital Based Output. IEEE J. Emerg. Sel. Topics Circuits Syst. Keji Zhou, Xinru Jia, Chenyang Zhao, Xumeng Zhang, Guangjian Wu, Chen Mu, Haozhe Zhu, Yanting Ding, Chixiao Chen, Xiaoyong Xue, Xiaoyang Zeng, Qi Liu
2022	J	`jnl`	A neuromorphic core based on threshold switching memristor with asynchronous address event representation circuits. Sci. China Inf. Sci. Jinsong Wei, Jilin Zhang, Xumeng Zhang, Zuheng Wu, Rui Wang, Jian Lu, Tuo Shi, Mansun Chan, Qi Liu, Hong Chen
2022	—	`conf`	COMB-MCM: Computing-on-Memory-Boundary NN Processor with Bipolar Bitwise Sparsity Optimization for Scalable Multi-Chiplet-Module Edge Machine Learning. ISSCC Haozhe Zhu, Bo Jiao, Jinshan Zhang, Xinru Jia, Yunzhengmao Wang, Tianchan Guan, Shengcheng Wang, Dimin Niu, Hongzhong Zheng, Chixiao Chen, Mingyu Wang, Lihua Zhang, Xiaoyang Zeng, Qi Liu, Yuan Xie, Ming Liu
2022	J	`jnl`	Conditional Uncorrelation and Efficient Subset Selection in Sparse Regression. IEEE Trans. Cybern. Jianji Wang, Shupei Zhang, Qi Liu, Shaoyi Du, Yu-Cheng Guo, Nanning Zheng, Fei-Yue Wang
2022	J	`jnl`	Fast and Reconfigurable Logic Synthesis in Memristor Crossbar Array. Adv. Intell. Syst. Wei Wang, Sen Liu, Qingjiang Li, Tuo Shi, Feng Zhang, Haijun Liu, Nan Li, Yongzhou Wang, Yi Sun, Bing Song, Hui Xu, Qi Liu
2022	J	`jnl`	High-Speed and Time-Interleaved ADCs Using Additive-Neural-Network-Based Calibration for Nonlinear Amplitude and Phase Distortion. IEEE Trans. Circuits Syst. I Regul. Pap. Danfeng Zhai, Wenning Jiang, Xinru Jia, Jingchao Lan, Mingqiang Guo, Sai-Weng Sin, Fan Ye, Qi Liu, Junyan Ren, Chixiao Chen
2021	J	`jnl`	An Energy Efficient Computing-in-Memory Accelerator With 1T2R Cell and Fully Analog Processing for Edge AI Applications. IEEE Trans. Circuits Syst. II Express Briefs Keji Zhou, Chenyang Zhao, Jinbei Fang, Jingwen Jiang, Deyang Chen, Yujie Huang, Ming-e Jing, Jun Han, Haidong Tian, Xiankui Xiong, Qi Liu, Xiaoyong Xue, Xiaoyang Zeng
2021	—	`conf`	Design of Multi-core Spiking Neural Network Chip Based on Butterfly Network. ASICON Hao Jiang, Jinsong Wei, Ye Li, Jikai Lu, Tuo Shi, Qi Liu
2021	J	`jnl`	Echo state graph neural networks with analogue random resistor arrays. CoRR Shaocong Wang, Yi Li, Dingchen Wang, Woyu Zhang, Xi Chen, Danian Dong, Songqi Wang, Xumeng Zhang, Peng Lin, Claudio Gallicchio, Xiaoxin Xu, Qi Liu, Kwang-Ting Cheng, Zhongrui Wang, Dashan Shang, Ming Liu
2021	J	`jnl`	Efficient and Robust Nonvolatile Computing-In-Memory Based on Voltage Division in 2T2R RRAM With Input-Dependent Sensing Control. IEEE Trans. Circuits Syst. II Express Briefs Linfang Wang, Wang Ye, Chunmeng Dou, Xin Si, Xiaoxin Xu, Jing Liu, Dashan Shang, Jianfeng Gao, Feng Zhang, Yongpan Liu, Meng-Fan Chang, Qi Liu
2021	J	`jnl`	Energy-Efficient Memristive Euclidean Distance Engine for Brain-Inspired Competitive Learning. Adv. Intell. Syst. Houji Zhou, Jia Chen, Yinan Wang, Sen Liu, Yi Li, Qingjiang Li, Qi Liu, Zhongrui Wang, Yuhui He, Hui Xu, Xiangshui Miao
2021	J	`jnl`	Energy-Efficient Memristive Euclidean Distance Engine for Brain-Inspired Competitive Learning. Adv. Intell. Syst. Houji Zhou, Jia Chen, Yinan Wang, Sen Liu, Yi Li, Qingjiang Li, Qi Liu, Zhongrui Wang, Yuhui He, Hui Xu, Xiangshui Miao
2021	—	`conf`	RRAM-based Analog-Weight Spiking Neural Network Accelerator with in-situ Learning for IoT Applications. ASICON Jikai Lu, Jinsong Wei, Junjie An, Chenggao Zhang, Tuo Shi, Qi Liu
2021	J	`jnl`	Recent progress of integrated circuits and optoelectronic chips. Sci. China Inf. Sci. Yue Hao, Shuiying Xiang, Genquan Han, Jincheng Zhang, Xiaohua Ma, Zhangming Zhu, Xingxing Guo, Yahui Zhang, Yanan Han, Ziwei Song, Yan Liu, Ling Yang, Hong Zhou, Jiangyi Shi, Wei Zhang, Min Xu, Weisheng Zhao, Biao Pan, Yangqi Huang, Qi Liu, Yimao Cai, Jian Zhu, Xin Ou, Tiangui You, Huaqiang Wu, Bin Gao, Zhiyong Zhang, Guoping Guo, Yonghua Chen, Yong Liu, Xiangfei Chen, Chunlai Xue, Xingjun Wang, Lixia Zhao, Xihua Zou, Lianshan Yan, Ming Li
2021	C	`conf`	Sparsity-Aware Clamping Readout Scheme for High Parallelism and Low Power Nonvolatile Computing-in-Memory Based on Resistive Memory. ISCAS Linfang Wang, Wang Ye, Junjie An, Chunmeng Dou, Qi Liu, Meng-Fan Chang, Ming Liu
2020	—	`conf`	33.2 A Fully Integrated Analog ReRAM Based 78.4TOPS/W Compute-In-Memory Chip with Fully Parallel MAC Computing. ISSCC Qi Liu, Bin Gao, Peng Yao, Dong Wu, Junren Chen, Yachuan Pang, Wenqiang Zhang, Yan Liao, Cheng-Xin Xue, Wei-Hao Chen, Jianshi Tang, Yu Wang, Meng-Fan Chang, He Qian, Huaqiang Wu
2020	J	`jnl`	An ultra-fast and high-precision VCO frequency calibration technique for fractional-N frequency synthesizers. IEICE Electron. Express Qi Liu, Yebing Gan, Tianchun Ye
2020	J	`jnl`	Conditional Uncorrelation and Efficient Non-approximate Subset Selection in Sparse Regression. CoRR Jianji Wang, Qi Liu, Nanning Zheng
2020	J	`jnl`	Ion-Gated Transistor: An Enabler for Sensing and Computing Integration. Adv. Intell. Syst. Xianbao Bu, Han Xu, Dashan Shang, Yue Li, Hangbing Lv, Qi Liu
2019	J	`jnl`	A Few-Step and Low-Cost Memristor Logic Based on MIG Logic for Frequent-Off Instant-On Circuits in IoT Applications. IEEE Trans. Circuits Syst. II Express Briefs Yiming Wang, Yun Li, Haihua Shen, Dongyu Fan, Wei Wang, Ling Li, Qi Liu, Feng Zhang, Xinghua Wang, Meng-Fan Chang, Ming Liu
2019	—	`conf`	A Reconfigurable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source With <6×10 ISSCC Yachun Pang, Bin Gao, Dong Wu, Shengyu Yi, Qi Liu, Wei-Hao Chen, Ting-Wei Chang, Wei-En Lin, Xiaoyu Sun, Shimeng Yu, He Qian, Meng-Fan Chang, Huaqiang Wu
2019	—	`conf`	An Asynchronous AER Circuits with Rotation Priority Tree Arbiter for Neuromorphic Hardware with Analog Neuron. ASICON Jinsong Wei, Jilin Zhang, Xumeng Zhang, Zuheng Wu, Chunmeng Dou, Tuo Shi, Hong Chen, Qi Liu
2019	—	`ch.`	Resistive Switching Devices: Mechanism, Performance and Integration. Handbook of Memristor Networks Ming Liu, Qi Liu, Hangbing Lv, Shibing Long
2018	J	`jnl`	Flexible cation-based threshold selector for resistive switching memory integration. Sci. China Inf. Sci. Xiaolong Zhao, Rui Wang, Xiangheng Xiao, Congyan Lu, Facai Wu, Rongrong Cao, Changzhong Jiang, Qi Liu
2017	—	`conf`	A 0.13μm 64Mb HfOx ReRAM using configurable ramped voltage write and low read-disturb sensing techniques for reliability improvement. CICC Xiaowei Han, Qian Jia, Hongbin Sun, Longfei Wang, Huaqiang Wu, Yimao Cai, Feng Zhang, Yongyi Xie, Fangxu Dong, Xiaoguang Wang, Xiaofei Xue, Li Pang, Xiaoqing Zhao, Mengnan Wu, Pu Bai, Qi Liu, Hangbing Lv, Bing Yu, Chao Zhao, He Qian, Ru Huang, Ming Liu, Yumei Zhou, Nanning Zheng, Qiwei Ren
2010	C	`conf`	Formation and annihilation of Cu conductive filament in the nonpolar resistive switching Cu/ZrO2: Cu/Pt ReRAM. ISCAS Ming Liu, Qi Liu, Shibing Long, Weihua Guan
2006	—	`conf`	Physics-based Modeling and Simulation of Dual Material Gate(DMG) LDMOS. APCCAS Yuehua Dai, Yuan Hu, Qi Liu, Daoming Ke, Junning Chen