| Year | Rank | Type | Title / Venue / Authors |
|---|---|---|---|
| 2019 | C | conf |
DSD
|
| 2016 | J | jnl |
A Dynamically Reconfigurable Multi-ASIP Architecture for Multistandard and Multimode Turbo Decoding.
IEEE Trans. Very Large Scale Integr. Syst.
|
| 2013 | — | conf |
ISVLSI
|
| 2013 | — | conf |
ReCoSoC
|
| 2013 | C | conf |
ISCAS
|
| 2013 | A | conf |
DATE
|
| 2013 | C | conf |
RSP
|
| 2013 | C | conf |
DSD
|
| 2012 | C | conf |
RSP
|
| 2011 | A | conf |
DATE
|
| 2011 | C | conf |
International Symposium on Rapid System Prototyping
|