Pui-In Mak - RankMe

376 papers B 4C 28Journal 219Unranked 124

Year	Rank	Type	Title / Venue / Authors
2026	—	`conf`	25.10 A 65nm 0.066pJ/b Floating-Latch-Based True Random Number Generator Resilient to Power-Noise Injection Attacks. ISSCC Kai Cheng, Yunbo Huang, Zunsong Yang, Li Wang, Hongyu Ren, Xiaoyu Shan, Pui-In Mak, Yong Chen, Bo Li
2026	—	`conf`	27.5 A $17.9-\text{to}-22.4 \text{GHz} 195.6 \pm 1.3 \text{dBc} / \text{Hz}$ FoM Quad-Core Class-F Class-F ISSCC Yue Wu, Yatao Peng, Jiawei Li, Fengen Yuan, Jinge Li, Jun Yin, Rui Paulo Martins, Pui-In Mak
2026	—	`conf`	A 0.068mm ISSCC Xincheng Du, Xiangxun Zhan, Tincheng Ou, Zaize Chen, Jinge Li, Haoran Li, Zhizhan Yang, Zhuo Xu, Pui-In Mak, Rui Paulo Martins, Jun Yin
2026	J	`jnl`	A 0.5-V Ultra-Low Voltage Relaxation Oscillator With Identical Asymmetric Swing-Boosted RC Network and Feedback-Based Amplifier Achieving 390-ppm RMS Period Jitter for Self-Powered Devices. IEEE Trans. Circuits Syst. I Regul. Pap. Mikki How-Wen Loo, Harikrishnan Ramiah, Dan Shi, Chee-Cheow Lim, Rui Paulo Martins, Pui-In Mak, Ka-Meng Lei
2026	—	`conf`	A 0.6V 9.4µW 1,892µm ISSCC Haihua Li, Dan Shi, Qi Zhou, Rui Paulo Martins, Pui-In Mak, Ka-Meng Lei
2026	J	`jnl`	A 3.51 TOPS/mm IEEE Trans. Circuits Syst. I Regul. Pap. Zhongyu Zhao, Rujian Cao, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak
2026	J	`jnl`	A 4100-μm IEEE J. Solid State Circuits Dan Shi, Rui Paulo Martins, Pui-In Mak, Ka-Meng Lei
2026	J	`jnl`	A Chip-Based Miniature MRI Platform With Integrated Frontend Probe for In-Situ 3D Cell Culture Monitoring. IEEE Trans. Biomed. Circuits Syst. Qi Zhou, Shuhao Fan, Yingying Liu, Rui Paulo Martins, Pui-In Mak, Yanwei Jia, Ka-Meng Lei
2026	J	`jnl`	A Low Phase Noise and High-Efficiency Biharmonic Class-F IEEE J. Solid State Circuits Yue Wu, Yatao Peng, Jun Yin, Rui Paulo Martins, Pui-In Mak
2026	J	`jnl`	A Low-Voltage-CMOS AC-DC Converter With Series-Capacitor Pre-Regulation and Fine-Grained Capacitance Reallocation for Mains-Powered IoT. IEEE J. Solid State Circuits Jiahao Shi, Xuchu Mu, Qiaobo Ma, Yang Jiang, Rui Paulo Martins, Pui-In Mak
2026	J	`jnl`	A Multi-Band RF Transmitter Employing a Transformer-Based N-Path Switched-Capacitor Modulator for CIM IEEE J. Solid State Circuits Gengzhen Qi, Pui-In Mak
2026	J	`jnl`	Graph-based surrogate modeling for structural eigenvalue problems with modal matching training. Eng. Comput. Chengqi Lin, Junzhe Ding, Jianlin Chen, Yuan Wang, Jianhao Jiao, Pui-In Mak, Nan Wang
2026	J	`jnl`	Magnetic Positioning System With CMOS Receiver for Calibrating Motion Artifacts During MRI Experiments. IEEE Trans. Biomed. Circuits Syst. Boyang Cao, Qi Zhou, Shuhao Fan, Rui Paulo Martins, Pui-In Mak, Ka-Meng Lei
2026	—	`book`	Resistor-Based Temperature Sensors in Deep-Submicron CMOS Technology Dan Shi, Rui Paulo Martins, Pui-In Mak, Ka-Meng Lei
2025	—	`conf`	14.5 A 28nm 192.3TFLOPS/W Accurate/Approximate Dual-Mode-Transpose Digital 6T-SRAM CIM Macro for Floating-Point Edge Training and Inference. ISSCC Yiyang Yuan, Bingxin Zhang, Yiming Yang, Yishan Luo, Qirui Chen, Shidong Lv, Hao Wu, Cailian Ma, Ming Li, Jinshan Yue, Xinghua Wang, Guozhong Xing, Pui-In Mak, Xiaoran Li, Feng Zhang
2025	—	`conf`	19.7 A 27GHz Fractional-N Sub-Sampling PLL Achieving 57.9fs ISSCC Haoran Li, Jinge Li, Xueying Jiang, Xi Meng, Jun Yin, Rui Paulo Martins, Pui-In Mak
2025	—	`conf`	27.5: A 4, 100µm ISSCC Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2025	J	`jnl`	A 0.0019-mm² LC-Ring Oscillator With an Ultra-Compact Transformer Achieving 175.2 dBc/Hz FoM@1MHz and 202.4 dBc/Hz FoMA. IEEE Trans. Circuits Syst. II Express Briefs Ya Zhao, Lingao Huang, Runchen Wang, Jun Yin, Pui-In Mak, Li Geng, Chao Fan
2025	J	`jnl`	A 0.35-0.5-V 0.0136-mm² 12 -MHz Digital Frequency-Locked Loop With 1.06%/V Line Sensitivity in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2025	C	`conf`	A 0.4V Relaxation Oscillator featuring Double Capacitor-Charging Headroom in CMOS 65nm. ISCAS Kanghong Yu, Mingrui Wang, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2025	—	`conf`	A 0.4μW/MHz Reference-Replication-Based RC Oscillator with Path-Delay and Comparator-Offset Cancellation Achieving 9.83ppm/°C from -40 to 125°C. ISSCC Yueduo Liu, Zihao Zhu, Xinyu Yang, Rongxin Bao, Zehao Zhang, Hongshuai Zhang, Jiaxin Liu, Zheng Wang, Mingkang Zhang, Na Yan, Jun Yin, Pui-In Mak, Shiheng Yang
2025	J	`jnl`	A 0.5-V 6.14- μW Trimming-Free Single-XO Dual-Output Frequency Reference With [5.1-nJ, 120- μs] XO Start-Up and [8.1-nJ, 200- μs] Successive-Approximation-Based RTC Calibration. IEEE J. Solid State Circuits Rui Luo, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2025	C	`conf`	A 0.6V Digital-intensive Pulse Injection 32-kHz Crystal Oscillator Using Stacked Logic Gates. ISCAS Zhizhan Yang, Jun Yin, Rui Paulo Martins, Pui-In Mak
2025	J	`jnl`	A 1.8% FAR, 2 ms Decision Latency, 1.73 nJ/Decision Keywords-Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-IF-Domain Computing and Scalable 5T-SRAM. IEEE J. Solid State Circuits Fei Tan, Wei-Han Yu, Jinhai Lin, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2025	J	`jnl`	A 28-nm MFCC-Free Keyword Switchable Keyword Spotting (KWS) System With Transferred Training Algorithm. IEEE Trans. Circuits Syst. II Express Briefs Fei Tan, Yujia Wang, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2025	—	`conf`	A 30-110V Resonant Buck-Boost Power-Bus Charger Achieving 50-A Peak Laser-Current Pulse Generation in 2ns for MHz-Frequency Automotive LiDAR Transmitter. CICC Hangxiao Ma, Qiaobo Ma, Xuchu Mu, Yang Jiang, Rui Paulo Martins, Pui-In Mak
2025	J	`jnl`	A 90.7-nW Vibration-Based Condition Monitoring Chip Featuring a Digital Compute-in-Memory- Based DNN Accelerator Using an Ultra-Low-Power 13T-SRAM Cell. IEEE J. Solid State Circuits Haochen Zhang, Wei-Han Yu, Zhizhan Yang, Ka-Fai Un, Jun Yin, Rui Paulo Martins, Pui-In Mak
2025	—	`conf`	A 94.8nW Battery-Free Intelligent Silicon Platform Enabling Distributed, Adaptive, and Event-Driven Multimodal Sensing at the Edge. ISSCC Haochen Zhang, Wei-Han Yu, Zhongyu Zhao, Zhizhan Yang, Ka-Fai Un, Jun Yin, Rui Paulo Martins, Pui-In Mak
2025	J	`jnl`	A 97.8 GOPS/W FPGA-Based Residual-Block-Aware CNN Accelerator Featuring Multi-Clock PW IEEE Trans. Circuits Syst. I Regul. Pap. Jixuan Li, Ke Li, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak
2025	—	`conf`	A 98.5% Peak Efficiency 2/3-Phase Buck-or-Boost Converter With VCR-Independent Loss Optimization and Unconditional RHP Zero Elimination Achieving 2.76A/mm CICC Xiongjie Zhang, Xinman Li, Yang Jiang, Zhangming Zhu, Rui Paulo Martins, Pui-In Mak
2025	C	`conf`	A BW-Extended Multi-Band Receiver with High-Order N-Path Filtering at RF Front-End and BB Achieving 200MHz BW and 36.5dBm OB-IIP3. ISCAS Gengzhen Qi, Yunchu Li, Shaolin Liao, Pui-In Mak
2025	J	`jnl`	A Capacitorless Flipped-Voltage-Follower-Based Low-Dropout Regulator Incorporating Adaptive-Compensation Buffer. IEEE Trans. Very Large Scale Integr. Syst. Tan Yee Chyan, Harikrishnan Ramiah, Sharifah Wan Muhamad Hatta, Chee-Cheow Lim, Rui Paulo Martins, Pui-In Mak, Yong Chen
2025	C	`conf`	A Chip-based Miniature MRI Platform with Integrated PDMS-PCB Coil Frontend for Microlitre-volume Sample Analysis. ISCAS Qi Zhou, Shuhao Fan, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2025	J	`jnl`	A Cryo-CMOS Wideband Mode-Switching Class-F VCO With Harmonic-Resonance Self-Alignment. IEEE J. Solid State Circuits Yue Wu, Yatao Peng, Andrea Ruffino, Jad Benserhir, Jun Yin, Rui Paulo Martins, Pui-In Mak, Edoardo Charbon
2025	—	`conf`	A Keyword-Spotting(KWS) Chip Featuring a Bio-Inspired Neuron Model in 65-nm CMOS. CNIOT Yantong Liu, Fei Tan, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak
2025	C	`conf`	A Linear-Regression-Assisted Trimming Scheme for CMOS Voltage Reference. ISCAS Chengyu Che, Yao Jiang, Xinfei Guo, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2025	J	`jnl`	A Miniature Multinuclei NMR/MRI Platform With a High-Voltage SOI ASIC. IEEE J. Solid State Circuits Shuhao Fan, Qi Zhou, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2025	J	`jnl`	A Series-LC-Assisted Oscillator Achieving -140.2 dBc/Hz Phase Noise and 187.5 dBc/Hz FoM at 10 MHz Offset From 10.7 GHz. IEEE Trans. Circuits Syst. II Express Briefs Xiangxun Zhan, Jun Yin, Rui Paulo Martins, Pui-In Mak
2025	J	`jnl`	A Single-XO Dual-Output Frequency Reference Featuring Adaptive RTC Calibration Achieving 0.63 ppm/°C Temperature Coefficient From -40 °C to 125 °C. IEEE Trans. Circuits Syst. II Express Briefs Rui Luo, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2025	J	`jnl`	A Systematic Review of Voltage Reference Circuits: Spanning Room Temperature to Cryogenic Applications. IEEE Trans. Circuits Syst. I Regul. Pap. Chen Deng, Sai Wu, Chengcheng Liu, Yatao Peng, Man-Kay Law, Jun Yin, Rui Paulo Martins, Pui-In Mak
2025	J	`jnl`	An 800-MHz 8.17-TOPS/W 0.63-TOPS/mm IEEE J. Solid State Circuits Jixuan Li, Ke Li, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak
2025	J	`jnl`	An 840-to-970 MHz Multimodal Wake-Up Receiver With a Q-Equalized Antenna-ED Interface and 2-Dimensional Wake-Up Identification. IEEE Trans. Circuits Syst. I Regul. Pap. Zhizhan Yang, Haochen Zhang, Jun Yin, Rui Paulo Martins, Pui-In Mak
2025	J	`jnl`	Analyses Concerning the Phase Noise and Nonlinear Behavior of the Charge-Sharing Integrator-Based Hybrid PLL. IEEE Trans. Circuits Syst. I Regul. Pap. Jingrun Song, Xinyu Yang, Jiaxu Liu, Yueduo Liu, Zihao Zhu, Zhengxuan Han, Zehao Zhang, Jiaxin Liu, Hongshuai Zhang, Jun Yin, Pui-In Mak, Shiheng Yang
2025	J	`jnl`	Analysis and Design of a Type-II Reference-Sampling PLL Using Gain-Boosting Phase Detector With Sampling Capacitor Reduction. IEEE Trans. Circuits Syst. II Express Briefs Tailong Xu, Haoran Li, Xi Meng, Xiangxun Zhan, Yatao Peng, Jun Yin, Shiheng Yang, Chao Fan, Zhixiang Huang, Rui Paulo Martins, Pui-In Mak
2025	J	`jnl`	Area-efficient ultra-wide-tuning-range ring oscillators in 65-nm complementary metal-oxide-semiconductor. Int. J. Circuit Theory Appl. Chaowei Yang, Yong Chen, Kai Cheng, Paolo Stefano Crovetti, Rui Paulo Martins, Pui-In Mak
2025	J	`jnl`	Design and Analysis of a Type-II Sampling PLL With Automatic Frequency and Phase Calibrations Achieving 0.62-μs Locking Time. IEEE Trans. Circuits Syst. I Regul. Pap. Jian Yang, Tailong Xu, Xi Meng, Zhenghao Li, Jun Yin, Rui Paulo Martins, Pui-In Mak, Quan Pan
2025	J	`jnl`	GSLP-CIM: A 28-nm Globally Systolic and Locally Parallel CNN/Transformer Accelerator With Scalable and Reconfigurable eDRAM Compute-in-Memory Macro for Flexible Dataflow. IEEE Trans. Circuits Syst. I Regul. Pap. Yi Zhan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2025	—	`conf`	On the Usage of Genetic Algorithms, Reinforcement Learning and Bayesian Optimisation for RF IC Design Automation. SMACD Margarida Lourenço, Bingbing Zhao, Junde Li, Marcelino B. Santos, Pui-In Mak, Rui Paulo Martins, Wei-Han Yu, Fábio Passos
2024	—	`conf`	10.9 A 23.2-to-26GHz Sub-Sampling PLL Achieving 48.3fsrms Jitter, -253.5dB FoMJ, and 0.55μs Locking Time Based on a Function-Reused VCO-Buffer and a Type-I FLL with Rapid Phase Alignment. ISSCC Haoran Li, Tailong Xu, Xi Meng, Jun Yin, Rui Paulo Martins, Pui-In Mak
2024	—	`conf`	17.2 A Miniature Multi-Nuclei NMR/MRI Platform with a High-Voltage SOI ASIC Achieving a 134.4dB Image SNR with a 173×250×103μm ISSCC Shuhao Fan, Qi Zhou, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2024	—	`conf`	17.9 A 1.8% FAR, 2ms Decision Latency, 1.73nJ/Decision Keywords Spotting (KWS) Chip Incorporating Transfer-Computing Speaker Verification, Hybrid-Domain Computing and Scalable 5T-SRAM. ISSCC Fei Tan, Wei-Han Yu, Jinhai Lin, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2024	—	`conf`	19.4 A 0.07 mm ISSCC Ya Zhao, Chao Fan, Qiuyu Fang, Guohe Zhang, Jun Yin, Pui-In Mak, Li Geng
2024	—	`conf`	23.4 A 167 μW 71.7dB-SFDR 2.4GHz BLE Receiver Using a Passive Quadrature-Front-End, a Double-Sided Double-Balanced Cascaded Mixer and a Dual-Transformer-Coupled Class-D VCO. ISSCC Haijun Shao, Rui Paulo Martins, Pui-In Mak
2024	—	`conf`	28.3 A 12-28V to 0.6-1.8V Ratio-Regulatable Dickson SC Converter with Dual-Mode Phase Misalignment Operations Achieving 93.1% Efficiency and 6A Output. ISSCC Qiaobo Ma, Yang Jiang, Huihua Li, Xiongjie Zhang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak
2024	—	`conf`	3.3 A 0.5V 6.14μW Trimming-Free Single-XO Dual-Output Frequency Reference with [5.1nJ, 120μs] XO Startup and [8.1nJ, 200μs] Successive-Approximation-Based RTC Calibration. ISSCC Rui Luo, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2024	—	`conf`	34.6 A 28nm 72.12TFLOPS/W Hybrid-Domain Outer-Product Based Floating-Point SRAM Computing-in-Memory Macro with Logarithm Bit-Width Residual ADC. ISSCC Yiyang Yuan, Yiming Yang, Xinghua Wang, Xiaoran Li, Cailian Ma, Qirui Chen, Meini Tang, Xi Wei, Zhixian Hou, Jialiang Zhu, Hao Wu, Qirui Ren, Guozhong Xing, Pui-In Mak, Feng Zhang
2024	—	`conf`	7.4 A 0.027mm ISSCC Yunbo Huang, Yong Chen, Zunsong Yang, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	A 0.012-mm Int. J. Circuit Theory Appl. Kai Cheng, Yong Chen, Paolo Stefano Crovetti, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	A 0.013 mm² 3.2-ns Input Range 10-Bit Cyclic Time-to-Digital Converter Using Gated Ring Oscillator With Phase Domain Reset in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs Xin Lu, Jiangchao Wu, Zhao Wang, Yifei Xiang, Liyuan Liu, Pui-In Mak, Rui Paulo Martins, Man-Kay Law
2024	J	`jnl`	A 0.05-mm IEEE J. Solid State Circuits Fei Tan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2024	—	`conf`	A 0.25pJ/Comparison, 27.3μV Input Noise Dynamic Comparator Exploiting Stacked Floating Preamplifier with Cross-Coupled Feedback Inverters in 180nm CMOS. CICC Jiangchao Wu, Ke Hu, Xuanlin Chen, Pui-In Mak, Rui Paulo Martins, Man Kay Law
2024	J	`jnl`	A 1024-Channel 268-nW/Pixel 36×36 μm IEEE J. Solid State Circuits Moon Hyung Jang, Maddy Hays, Wei-Han Yu, Changuk Lee, Pietro Caragiulo, Athanasios T. Ramkaj, Pingyu Wang, A. J. Phillips, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E. J. Chichilnisky, Boris Murmann, Dante G. Muratore
2024	J	`jnl`	A 12-/13.56-MHz Crystal Oscillator With Binary-Search-Assisted Two-Step Injection Achieving 5.0-nJ Startup Energy and 45.8-μs Startup Time. IEEE J. Solid State Circuits Haihua Li, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	A 12.9-to-24 GHz Dual-Mode Multi-Coil VCO Achieving 199.2 dBc/Hz Peak FoM IEEE Trans. Circuits Syst. II Express Briefs Ya Zhao, Chao Fan, Yuanxing Peng, Chenglong Liang, Jun Yin, Pui-In Mak, Li Geng
2024	J	`jnl`	A 12V-to-1V Outphase-Interleaved SC Hybrid Converter With Enhanced Inductor De-Energizing Slew Rate and Adaptive Deadtime Control. IEEE Trans. Circuits Syst. II Express Briefs Xiongjie Zhang, Xinman Li, Anyang Zhao, Yang Jiang, Weihang Zhang, Jincheng Zhang, Rui Paulo Martins, Pui-In Mak
2024	—	`conf`	A 14.7mW Blocker-Tolerant Wideband Receiver Using a Transformer-Based N-Path Passive-LNA and a 2 A-SSCC Gengzhen Qi, Pui-In Mak
2024	J	`jnl`	A 16-MHz Crystal Oscillator With 17.5- μ s Start-Up Time Under 10 IEEE J. Solid State Circuits Zixuan Wang, Xin Wang, Ka-Meng Lei, Wenjing Zhang, Yunjin Yin, Tailong Xu, Zhikuang Cai, Yufeng Guo, Pui-In Mak
2024	J	`jnl`	A 167- μW 71.7-dB SFDR 2.4-GHz BLE Receiver Using a Passive Quadrature Front End, a Double- Sided Double-Balanced Cascaded Mixer, and a Dual-Transformer-Coupled Class-D VCO. IEEE J. Solid State Circuits Haijun Shao, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	A 23.2-to-26-GHz Low-Jitter Fast-Locking Sub-Sampling PLL Based on a Function-Reused VCO-Buffer and a Type-I FLL With Rapid Phase Alignment. IEEE J. Solid State Circuits Haoran Li, Tailong Xu, Xi Meng, Jun Yin, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	A 24-V-Input Highly Integrated Interleaved-Inductor Multiple Step-Down Hybrid DC-DC Converter With Inherent Current Equalization Characteristics. IEEE J. Solid State Circuits Xiongjie Zhang, Anyang Zhao, Qiaobo Ma, Yang Jiang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	A 28-nm 18.7 TOPS/mm² 89.4-to-234.6 TOPS/W 8b Single-Finger eDRAM Compute-in-Memory Macro With Bit-Wise Sparsity Aware and Kernel-Wise Weight Update/Refresh. IEEE J. Solid State Circuits Yi Zhan, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	A 28-nm Computing-in-Memory-Based Super-Resolution Accelerator Incorporating Macro-Level Pipeline and Texture/Algebraic Sparsity. IEEE Trans. Circuits Syst. I Regul. Pap. Hao Wu, Yong Chen, Yiyang Yuan, Jinshan Yue, Xiangqu Fu, Qirui Ren, Qing Luo, Pui-In Mak, Xinghua Wang, Feng Zhang
2024	J	`jnl`	A 5.6-dB Noise Figure, 63-86-GHz Receiver Using a Wideband Noise-Cancelling Low Noise Amplifier With Phase and Amplitude Compensation. IEEE Trans. Circuits Syst. I Regul. Pap. Changxuan Han, Zhixian Deng, Yiyang Shu, Jun Yin, Pui-In Mak, Xun Luo
2024	J	`jnl`	A 512-nW 0.003-mm² Forward-Forward Closed Box Trainer for an Analog Voice Activity Detector in 28-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs Junde Li, Guoqiang Xin, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2024	—	`conf`	A 5T-SRAM Based Computing-in-Memory Macro Featuring Partial Sum Boosting and Analog Non-Uniform Quantization. MWSCAS Guoqiang Xin, Fei Tan, Junde Li, Junren Chen, Wei-Han Yu, Ka-Fai Un, Rui Paulo Martins, Pui-In Mak
2024	—	`conf`	A 6.0-to-6.9GHz 99fsrms-Jitter Type-II Sampling PLL with Automatic Frequency and Phase Calibration Method Achieving 0.62μs Locking Time in 28nm CMOS. CICC Jian Yang, Tailong Xu, Xi Meng, Zhenghao Li, Jun Yin, Pui-In Mak, Rui Paulo Martins, Quan Pan
2024	—	`conf`	A 6.5-to-6.9-GHz SSPLL with Configurable Differential Dual-Edge SSPD Achieving 44-fs RMS Jitter, -260.7-dB FOMJitter, and -76.5-dBc Reference Spur. VLSI Technology and Circuits Tianle Chen, Hongyu Ren, Zunsong Yang, Yunbo Huang, Xianghe Meng, Weiwei Yan, Weidong Zhang, Xuqiang Zheng, Xuan Guo, Tetsuya Iizuka, Pui-In Mak, Yong Chen, Bo Li
2024	—	`conf`	A 63ns Flipping Time, 93.6% Voltage Flipping Efficiency Auto-Calibrated Ultrasonic Energy Harvesting Interface from -25 to 85°C. CICC Guangshu Zhao, Chao Xie, Chenxi Wang, Yang Jiang, Milin Zhang, Pui-In Mak, Rui Paulo Martins, Man-Kay Law
2024	J	`jnl`	A 93.4% Peak Efficiency C IEEE J. Solid State Circuits Feiyu Li, Qishen Fang, Jiangchao Wu, Yang Jiang, Pui-In Mak, Rui Paulo Martins, Man-Kay Law
2024	—	`conf`	A 96.7%-Efficient 2.5A Scalable DC-DC Converter Module with Complementary Dual-Mode Reconfigurable Hybrid Topology Achieving Always Inductor Current Reduction, Continuously Adjustable VCR Range, and Interleaving COUT Augmentation. CICC Huihua Li, Qiaobo Ma, Yang Jiang, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	A BW-Extended Fourth-Order Gain-Boosted N-Path Filter Employing a Switched gₘ-C Network. IEEE J. Solid State Circuits Gengzhen Qi, Haonan Guo, Yunchu Li, Pui-In Mak
2024	J	`jnl`	A Compact Sub-nW/kHz Relaxation Oscillator Using a Negative-Offset Comparator With Chopping and Piecewise Charge-Acceleration in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Yueduo Liu, Zihao Zhu, Rongxin Bao, Jiahui Lin, Jun Yin, Qiang Li, Pui-In Mak, Shiheng Yang
2024	J	`jnl`	A Complementary Drain-Grounded VCO-PA Improving Transmit Efficiency Over a Wide EIRP Range. IEEE Trans. Circuits Syst. II Express Briefs Zhizhan Yang, Jun Yin, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	A Constant-Power and Optimal-Transfer-Efficiency Wireless Inductive Power Transfer Converter for Battery Charger. IEEE Trans. Ind. Electron. Io-Wa Iam, Chio-Kuan Choi, Chi-Seng Lam, Pui-In Mak, Rui Paulo Martins
2024	J	`jnl`	A Cross-Coupled Hybrid Switched-Capacitor Buck Converter With Extended Conversion Range and Enhanced DCR Loss Reduction. IEEE J. Solid State Circuits Qiaobo Ma, Huihua Li, Xiongjie Zhang, Anyang Zhao, Yang Jiang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	A Fast Startup 38.4-MHz Crystal Oscillator Achieving 99-nJ Startup Energy With Adaptive Chirping. IEEE Access Abdolraouf Rahmani, Harikrishnan Ramiah, Ka-Meng Lei, Chee-Cheow Lim, Nai Shyan Lai, Pui-In Mak, Rui Paulo Martins
2024	—	`conf`	A Fully Integrated 48-V GaN Driver Using Parallel-Multistep-Series Reconfigurable Switched-Capacitor Bank Achieving 7.7nC/mm VLSI Technology and Circuits Xuchu Mu, Yang Jiang, Rui Paulo Martins, Pui-In Mak
2024	—	`conf`	A Miniaturized MRI Scanner Featuring a HighVoltage SOI ASIC for Non-Invasive Object Reconstruction and Flow Analysis. BioCAS Shuhao Fan, Qi Zhou, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2024	—	`conf`	A Multi-Phase Multi-Path Hybrid Buck Converter for 9-48V to 0.8-1.2V Conversion with Improved DCR-Loss Reduction and Alleviated CFLY Current Gathering Achieving 88.3% Peak Efficiency and 176A/cm CICC Qiaobo Ma, Huihua Li, Jiahao Shi, Yang Jiang, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	A ULP Long-Range Active-RF Tag With Automatically Calibrated Antenna-TRX Interface. IEEE J. Solid State Circuits Zhizhan Yang, Jun Yin, Wei-Han Yu, Haochen Zhang, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	An FPGA-Based Transformer Accelerator With Parallel Unstructured Sparsity Handling for Question-Answering Applications. IEEE Trans. Circuits Syst. II Express Briefs Rujian Cao, Zhongyu Zhao, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	An Outphase-Interleaved Switched-Capacitor Hybrid Buck Converter With Relieved Capacitor Inrush Current and C IEEE J. Solid State Circuits Xiongjie Zhang, Qiaobo Ma, Yang Jiang, Anyang Zhao, Man-Kay Law, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	Analysis and Design of a 21.2-to-25.5-GHz Triple-Coil Transformer-Coupled QVCO. IEEE Trans. Circuits Syst. I Regul. Pap. Ya Zhao, Chao Fan, Jun Yin, Pui-In Mak, Li Geng
2024	J	`jnl`	CLUT-CIM: A Capacitance Lookup Table-Based Analog Compute-in-Memory Macro With Signed-Channel Training and Weight Updating for Nonuniform Quantization. IEEE Trans. Circuits Syst. I Regul. Pap. Yuzhao Fu, Jixuan Li, Wei-Han Yu, Ka-Fai Un, Chi-Hang Chan, Yan Zhu, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	Design and Analysis of a Blocker-Tolerant Gain-Boosted N-Path Receiver Using a Bottom-Plate Switched-Capacitor Technique. IEEE Open J. Circuits Syst. Yi Mao, Gengzhen Qi, Pui-In Mak
2024	J	`jnl`	Extended Power Dynamic Range and Enhanced Power Conversion Efficiency of a Switched-Capacitor DC-DC Converter: A Tutorial. IEEE Trans. Circuits Syst. II Express Briefs Tian Siang Ho, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen, Pui-In Mak, Rui Paulo Martins
2024	J	`jnl`	FLEX-CIM: A Flexible Kernel Size 1-GHz 181.6-TOPS/W 25.63-TOPS/mm IEEE J. Solid State Circuits Yuzhao Fu, Wei-Han Yu, Ka-Fai Un, Chi-Hang Chan, Yan Zhu, Minglei Zhang, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	Fully Symmetrical Obfuscated Interconnection and Weak-PUF-Assisted Challenge Obfuscation Strong PUFs Against Machine-Learning Modeling Attacks. IEEE Trans. Inf. Forensics Secur. Chongyao Xu, Litao Zhang, Pui-In Mak, Rui Paulo Martins, Man-Kay Law
2024	—	`conf`	Invited Paper: A Multi-Phase Multi-Ratio Resonant Switched-Capacitor DC-DC Converter with Improved Power Density. ICTA Jiyuan Liu, Qiaobo Ma, Yang Jiang, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	Miniature Magnetic Resonance Imaging System for in situ Monitoring of Bacterial Growth and Biofilm Formation. IEEE Trans. Biomed. Circuits Syst. Qi Zhou, Shuhao Fan, Ka-Meng Lei, Donhee Ham, Rui Paulo Martins, Pui-In Mak
2024	J	`jnl`	One-Cycle-Startup Relaxation Oscillator Using Ratiometric Threshold-Referenced and Self-Synchronized Power Gating Techniques. IEEE Trans. Circuits Syst. II Express Briefs Guangshu Zhao, Zhiming Xiao, Pui-In Mak, Rui Paulo Martins, Man-Kay Law
2024	—	`conf`	Quality Factor Optimization and Thermal Noise Analysis of Silicon MEMS Resonators. IEEE SENSORS Zheng Fan, Zhu Li, Renguang Tang, Guanhua Wu, Shanqing Yang, Liang Cheng Tu, Yuan Wang, Pui-In Mak
2023	J	`jnl`	A 0.0043-mm IEEE Trans. Very Large Scale Integr. Syst. Yuchen Wei, Shiheng Yang, Yueduo Liu, Rongxin Bao, Zihao Zhu, Jiahui Lin, Zehao Zhang, Yong Chen, Jun Yin, Pui-In Mak, Qiang Li
2023	—	`conf`	A 0.05-to-3.1A 585mA/mm VLSI Technology and Circuits Xiongjie Zhang, Qiaobo Ma, Anyang Zhao, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	A 0.4-V 0.0294-mm IEEE J. Solid State Circuits Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2023	J	`jnl`	A 0.4-V 8400-μm IEEE Trans. Circuits Syst. II Express Briefs Chengyu Che, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2023	—	`conf`	A 0.5-to-1.5GHz BW-Extended Gain-Boosted N-Path Filter Using a Switched $\mathbf{g}_{\mathbf{m}}-\mathbf{C}$ Network Achieving 50MHz BW and 18.2dBm OB-IIP3. A-SSCC Gengzhen Qi, Pui-In Mak
2023	J	`jnl`	A 10.5 W, 93% Efficient Dual-Path Hybrid (DPH)-Based DC-DC Converter Incorporating a Continuous-Current-Input Switched-Capacitor Stage and Enhanced I IEEE Trans. Circuits Syst. I Regul. Pap. Qiaobo Ma, Xiongjie Zhang, Anyang Zhao, Huihua Li, Yang Jiang, Man-Kay Law, Makoto Takamiya, Rui Paulo Martins, Pui-In Mak
2023	J	`jnl`	A 10.8-to-37.4 Gb/s Reference-Less FD-Less Single-Loop Quarter-Rate Bang-Bang Clock and Data Recovery Employing Deliberate-Current- Mismatch Wide-Frequency-Acquisition Technique. IEEE Trans. Circuits Syst. I Regul. Pap. Lin Wang, Yong Chen, Chaowei Yang, Xiaoteng Zhao, Pui-In Mak, Franco Maloberti, Rui Paulo Martins
2023	—	`conf`	A 1024-Channel 268 nW/pixel 36x36 μm VLSI Technology and Circuits Moon Hyung Jang, Wei-Han Yu, Changuk Lee, Maddy Hays, Pingyu Wang, Nick Vitale, Pulkit Tandon, Pumiao Yan, Pui-In Mak, Youngcheol Chae, E. J. Chichilnisky, Boris Murmann, Dante G. Muratore
2023	—	`conf`	A 12/13.56MHz Crystal Oscillator with Binary-Search-Assisted Two-Step Injection Achieving 5.0nJ Startup Energy and 45.8μs Startup Time. ISSCC Haihua Li, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2023	—	`conf`	A 13.5-to-28.8GHz 72.3%-Locking Range Multi-Phase Injection-Locked Frequency Tripler with Improved Output Power and Wideband Subharmonic-Spur Rejection in 28nm CMOS. CICC Chao Fan, Ya Zhao, Yanlong Zhang, Jun Yin, Pui-In Mak, Guohe Zhang, Li Geng
2023	—	`conf`	A 22.4-to-26.8GHz Dual-Path-Synchronized Quad-Core Oscillator Achieving -138dBc/Hz PN and 193.3dBc/Hz FoM at 10MHz Offset from 25.8GHz. ISSCC Xiangxun Zhan, Jun Yin, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	A 27-dBm, 0.92-GHz CMOS Power Amplifier With Mode Switching and a High-Q Compact Inductor (HQCI) Achieving a 30% Back-Off PAE. IEEE Trans. Circuits Syst. II Express Briefs Arvind Singh Rawat, Jagadheswaran Rajendran, Selvakumar Mariappan, Narendra Kumar, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	A 28-nm 368-fJ/Cycle, 0.43%/V Supply-Sensitivity, FLL-Based RC Oscillator Featuring Positive-TC-Only Resistors and ΔΣM-Based Trimming. IEEE Trans. Circuits Syst. II Express Briefs Yunbo Huang, Yong Chen, Kaiyuan Yang, Paolo Crovetti, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	A 3.57-mW 2.88-GHz Multi-Phase Injection-Locked Ring-VCO With a 200-kHz 1/f³ Phase Noise Corner. IEEE Trans. Circuits Syst. II Express Briefs Chao Fan, Ya Zhao, Yanlong Zhang, Jun Yin, Li Geng, Pui-In Mak
2023	J	`jnl`	A 3.6-GHz Type-II Sampling PLL With a Differential Parallel-Series Double-Edge S-PD Scoring 43.1-fs IEEE Trans. Very Large Scale Integr. Syst. Yunbo Huang, Yong Chen, Bo Zhao, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	A 3.78-GHz Type-I Sampling PLL With a Fully Passive K IEEE Trans. Circuits Syst. I Regul. Pap. Yunbo Huang, Yong Chen, Bo Zhao, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	A 47-nW Voice Activity Detector (VAD) Featuring a Short-Time CNN Feature Extractor and an RNN-Based Classifier With a Non-Volatile CAP-ROM. IEEE J. Solid State Circuits Jinhai Lin, Ka-Fai Un, Wei-Han Yu, Rui Paulo Martins, Pui-In Mak
2023	—	`conf`	A 47nW Mixed-Signal Voice Activity Detector (VAD) Featuring a Non-Volatile Capacitor-ROM, a Short-Time CNN Feature Extractor and an RNN Classifier. ISSCC Jinhai Lin, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	A 6-to-38Gb/s capture-range bang-bang clock and data recovery circuit with deliberate-current-mismatch frequency detection and interpolation-based multiphase clock generation. Int. J. Circuit Theory Appl. Lin Wang, Yong Chen, Chaowei Yang, Xionghui Zhou, Mei Han, Paolo Stefano Crovetti, Pui-In Mak, Rui Paulo Martins
2023	C	`conf`	A 9.97-GHz 190.6-dBc/Hz FOM CMOS VCO Featuring Nested Common-Mode Resonator and Intrinsic Differential 2 ISCAS Yunbo Huang, Yong Chen, Chaowei Yang, Pui-In Mak, Rui Paulo Martins
2023	—	`conf`	A Cross-Coupled Hybrid SC Converter with Extended VCR Range and Intrinsic Loss Balance Achieving 90% Average Efficiency with 1.5% Variation Over Full Li-ion Battery Input Range and 0.95A/mm A-SSCC Qiaobo Ma, Huihua Li, Xiongjie Zhang, Anyang Zhao, Yang Jiang, Man-Kay Law, Rui Paulo Martins, Pui-In Mak
2023	J	`jnl`	A Flexible Rooftop Photovoltaic-Inductive Wireless Power Transfer System for Low-Voltage DC Grid. IEEE Access Io-Wa Iam, Zhaoyi Ding, Zhicong Huang, Chi-Seng Lam, Rui Paulo Martins, Pui-In Mak
2023	J	`jnl`	A Fully Integrated CMOS Tri-Band Ambient RF Energy Harvesting System for IoT Devices. IEEE Trans. Circuits Syst. I Regul. Pap. Jack Kee Yong, Wen Xun Lian, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Gabriel Chong, Nai Shyan Lai, Yong Chen, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	A Fully-Integrated CMOS Dual-Band RF Energy Harvesting Front-End Employing Adaptive Frequency Selection. IEEE Access Wen Xun Lian, Harikrishnan Ramiah, Gabriel Chong, Kishore Kumar Pakkirisami Churchill, Nai Shyan Lai, Saad Mekhilef, Yong Chen, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	A High-PCE Range-Extension CMOS Rectifier Employing Advanced Topology Amalgamation Technique for Ambient RF Energy Harvesting. IEEE Trans. Circuits Syst. II Express Briefs Alexander Choo Chia Chun, Yi Chen Lee, Harikrishnan Ramiah, Yong Chen, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	A High-Performance Dual-Topology CMOS Rectifier With 19.5-dB Power Dynamic Range for RF-Based Hybrid Energy Harvesting. IEEE Trans. Very Large Scale Integr. Syst. Alexander Choo Chia Chun, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen, Saad Mekhilef, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	A Miniaturized 3-D-MRI Scanner Featuring an HV-SOI ASIC and Achieving a 10 × 8 × 8 mm IEEE J. Solid State Circuits Shuhao Fan, Qi Zhou, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	A Reconfigurable CMOS Stack Rectifier With 22.8-dB Dynamic Range Achieving 47.91% Peak PCE for IoT/WSN Application. IEEE Trans. Very Large Scale Integr. Syst. Kishore Kumar Pakkirisami Churchill, Harikrishnan Ramiah, Alexander Choo Chia Chun, Gabriel Chong, Yong Chen, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	A Security-Enhanced, Charge-Pump-Free, ISO14443-A-/ISO10373-6-Compliant RFID Tag With 16.2-μW Embedded RRAM and Reconfigurable Strong PUF. IEEE Trans. Very Large Scale Integr. Syst. Qirui Ren, Qiang Huo, Zhisheng Chen, Qi Gao, Yiming Wang, Yiming Yang, Hao Wu, Xiangqu Fu, Xiaoxin Xu, Qing Luo, Jianfeng Gao, Chengying Chen, Xiaojin Zhao, Dengyun Lei, Xinghua Wang, Feng Zhang, Yong Chen, Pui-In Mak
2023	J	`jnl`	A Subthreshold Operation Series-Parallel Charge Pump Incorporating Dynamic Source-Fed Oscillator for Wide-Input-Voltage Energy Harvesting Application. IEEE Access Jack Kee Yong, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Gabriel Chong, Saad Mekhilef, Nai Shyan Lai, Yong Chen, Pui-In Mak, Rui Paulo Martins
2023	—	`conf`	A ULP Long-Range Active-RF Tag with Automatic Antenna-Interface Calibration Achieving 20.5% TX Efficiency at -22dBm EIRP, and -60.4dBm Sensitivity at 17.8nW RX Power. ISSCC Zhizhan Yang, Jun Yin, Wei-Han Yu, Haochen Zhang, Pui-In Mak, Rui Paulo Martins
2023	—	`conf`	An 83.3-to-104.7GHz Harmonic-Extraction VCO Incorporating Multi-Resonance, Multi-Core, and Multi-Mode (3M) Techniques Achieving -124dBc/Hz Absolute PN and 190.7dBc/Hz $\text{FoM}_{\mathrm{T}}$. ISSCC Hao Guo, Yong Chen, Yunbo Huang, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	An FPGA-Based Transformer Accelerator Using Output Block Stationary Dataflow for Object Recognition Applications. IEEE Trans. Circuits Syst. II Express Briefs Zhongyu Zhao, Rujian Cao, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	An Ultra-Low-Voltage Single-Crystal Oscillator-Timer (XO-Timer) Delivering 16-MHz and 32.258-kHz Clocks for Sub-0.5-V Energy-Harvesting BLE Radios in 28-nm CMOS. IEEE Open J. Circuits Syst. Liwen Lin, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	Analysis and Design of a 15.2-to-18.2-GHz Inverse-Class-F VCO With a Balanced Dual-Core Topology Suppressing the Flicker Noise Upconversion. IEEE Trans. Circuits Syst. I Regul. Pap. Xi Meng, Haoran Li, Peng Chen, Jun Yin, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	Design Trends and Perspectives of Digital Low Dropout Voltage Regulators for Low Voltage Mobile Applications: A Review. IEEE Access Li Fang Lai, Harikrishnan Ramiah, Tan Yee Chyan, Nai Shyan Lai, Chee-Cheow Lim, Yong Chen, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	Design and Implementation of Hybrid DC-DC Converter: A Review. IEEE Access Teck Seong Chang, Harikrishnan Ramiah, Yang Jiang, Chee-Cheow Lim, Nai Shyan Lai, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	Floating-Domain Integrated GaN Driver Techniques for DC-DC Converters: A Review. IEEE Trans. Circuits Syst. I Regul. Pap. Xuchu Mu, Guangshu Zhao, Anyang Zhao, Yang Jiang, Man-Kay Law, Makoto Takamiya, Pui-In Mak, Rui Paulo Martins
2023	—	`conf`	Fully Integrated Reconfigurable Solar Energy Harvester for $100\mu\mathrm{A}$ Burst Output Current Delivery with 78.6% Peak Energy Extraction Efficiency and Minimum Startup Incident Light Power of 0.27mW/cm A-SSCC Jiangchao Wu, Guangshu Zhao, Litao Zhang, Yu Jia, Yang Jiang, Pui-In Mak, Rui Paulo Martins, Man Kay Law
2023	J	`jnl`	High-Performance Multiband Ambient RF Energy Harvesting Front-End System for Sustainable IoT Applications - A Review. IEEE Access Yi Chen Lee, Harikrishnan Ramiah, Alexander Choo Chia Chun, Kishore Kumar Pakkirisami Churchill, Nai Shyan Lai, Chee-Cheow Lim, Yong Chen, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	Modeling-Attack-Resistant Strong PUF Exploiting Stagewise Obfuscated Interconnections With Improved Reliability. IEEE Internet Things J. Chongyao Xu, Litao Zhang, Man-Kay Law, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	On the DC-Settling Process of the Pierce Crystal Oscillator in Start-Up. IEEE Trans. Circuits Syst. II Express Briefs Zehao Zhang, Shiheng Yang, Yueduo Liu, Zihao Zhu, Jiahui Lin, Rongxin Bao, Tailong Xu, Zhizhan Yang, Mingkang Zhang, Jiaxin Liu, Xiong Zhou, Jun Yin, Pui-In Mak, Qiang Li
2023	—	`conf`	Simple-Logic Comparator-Offset Mitigation Technique for Resistor-Based Temperature Sensor in DFLL. ICTA Dan Shi, Ka-Meng Lei, Rui Paulo Martins, Pui-In Mak
2023	J	`jnl`	Transfer-Path-Based Hardware-Reuse Strong PUF Achieving Modeling Attack Resilience With200 Million Training CRPs. IEEE Trans. Inf. Forensics Secur. Chongyao Xu, Jieyun Zhang, Man-Kay Law, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins
2023	J	`jnl`	Universal Stability Criterion for Type-I Sampling Phase-Locked Loops. IEEE Trans. Circuits Syst. II Express Briefs Yunbo Huang, Yong Chen, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	A -20-dBm Sensitivity RF Energy-Harvesting Rectifier Front End Using a Transformer IMN. IEEE Trans. Very Large Scale Integr. Syst. Wen Xun Lian, Harikrishnan Ramiah, Gabriel Chong, Kishore Kumar Pakkirisami Churchill, Nai Shyan Lai, Yong Chen, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	A 0.0285-mm IEEE J. Solid State Circuits Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	A 0.1-V V IEEE Trans. Circuits Syst. II Express Briefs Jack Kee Yong, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Gabriel Chong, Saad Mekhilef, Yong Chen, Pui-In Mak, Rui Paulo Martins
2022	—	`conf`	A 0.5 to 2GHz Blocker-Tolerant Receiver Achieving 29dBm OOB-IIP3 and 3.2 to 6dB NF Using Bottom-Plate Switched-Capacitor Technique. APCCAS Yi Mao, Yuyang Du, Yongjun He, Gengzhen Qi, Pui-In Mak
2022	J	`jnl`	A 1.7-3.6 GHz 20 MHz-Bandwidth Channel-Selection N-Path Passive-LNA Using a Switched-Capacitor-Transformer Network Achieving 23.5 dBm OB-IIP₃ and 3.4-4.8 dB NF. IEEE J. Solid State Circuits Haijun Shao, Gengzhen Qi, Pui-In Mak, Rui Paulo Martins
2022	—	`conf`	A 10.8-to-37.4Gb/s Single-Loop Quarter-Rate BBCDR Without External Reference and Separate FD Featuring a Wide-Frequency-Acquisition Scheme. ICECS 2022 Lin Wang, Yong Chen, Chaowei Yang, Xiaoteng Zhao, Pui-In Mak, Franco Maloberti, Rui Paulo Martins
2022	J	`jnl`	A 108-nW 0.8-mm IEEE J. Solid State Circuits Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2022	—	`conf`	A 108nW 0.8mm ISSCC Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	A 266-μW Bluetooth Low-Energy (BLE) Receiver Featuring an N-Path Passive Balun-LNA and a Pipeline Down-Mixing BB-Extraction Scheme Achieving 77-dB SFDR and -3-dBm OOB-B IEEE J. Solid State Circuits Haijun Shao, Pui-In Mak, Gengzhen Qi, Rui Paulo Martins
2022	—	`conf`	A 266µW Bluetooth Low-Energy (BLE) Receiver Featuring an N-Path Passive Balun-LNA and a Pipeline Down-Mixing BB-Extraction Scheme Achieving 77dB SFDR and -3dBm OOB-B-1dB. ISSCC Haijun Shao, Pui-In Mak, Gengzhen Qi, Rui Paulo Martins
2022	—	`conf`	A 28-Gb/s 13.8-mW Half-Rate Bang-Bang Clock and Data Recovery Circuit Using Return-to-Zero-Based Symmetrical Bang-Bang Phase Detector. NorCAS Xinyi Ge, Yong Chen, Lin Wang, Nan Qi, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	A 3.3-GHz Integer N-Type-II Sub-Sampling PLL Using a BFSK-Suppressed Push-Pull SS-PD and a Fast-Locking FLL Achieving -82.2-dBc REF Spur and -255-dB FOM. IEEE Trans. Very Large Scale Integr. Syst. Zunsong Yang, Yong Chen, Jia Yuan, Pui-In Mak, Rui Paulo Martins
2022	—	`conf`	A 32dBm OOB-IIP3 BW-Extended 5G-NR Receiver with 4 APCCAS Zhixiang Liu, Shiyou Wei, Gengzhen Qi, Pui-In Mak
2022	J	`jnl`	A 4T/Cell Amplifier-Chain-Based XOR PUF With Strong Machine Learning Attack Resilience. IEEE Trans. Circuits Syst. I Regul. Pap. Jieyun Zhang, Chongyao Xu, Man-Kay Law, Yang Jiang, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	A 529-μW Fractional-N All-Digital PLL Using TDC Gain Auto-Calibration and an Inverse-Class-F DCO in 65-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Peng Chen, Xi Meng, Jun Yin, Pui-In Mak, Rui Paulo Martins, Robert Bogdan Staszewski
2022	J	`jnl`	A 6-to-7.5-GHz 54-fs IEEE Trans. Circuits Syst. I Regul. Pap. Tailong Xu, Shenke Zhong, Jun Yin, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	A Fully-Integrated Ambient RF Energy Harvesting System with 423-μW Output Power. Sensors Kishore Kumar Pakkirisami Churchill, Harikrishnan Ramiah, Gabriel Chong, Yong Chen, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	A Low-Power Multiband Blocker-Tolerant Receiver With a Steep Filtering Slope Using an N-Path LNA With Feedforward OB Blocker Cancellation and Filtering-by-Aliasing Baseband Amplifiers. IEEE Trans. Circuits Syst. I Regul. Pap. Haijun Shao, Gengzhen Qi, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	A Millimeter-Wave CMOS VCO Featuring a Mode-Ambiguity-Aware Multi-Resonant-RLCM Tank. IEEE Trans. Circuits Syst. I Regul. Pap. Hao Guo, Yong Chen, Chaowei Yang, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	A Reconfigurable CMOS Rectifier With 14-dB Power Dynamic Range Achieving >36-dB/mm IEEE Trans. Very Large Scale Integr. Syst. Alexander Choo Chia Chun, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen, Saad Mekhilef, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	A Sub-0.25-pJ/bit 47.6-to-58.8-Gb/s Reference-Less FD-Less Single-Loop PAM-4 Bang-Bang CDR With a Deliberate-Current-Mismatch Frequency Acquisition Technique in 28-nm CMOS. IEEE J. Solid State Circuits Xiaoteng Zhao, Yong Chen, Lin Wang, Pui-In Mak, Franco Maloberti, Rui Paulo Martins
2022	—	`conf`	A Switched-Capacitor Hybrid Quadratic Buck Converter for 48V-Input Wide-Range Conversion. ICECS 2022 Ruijie Zhao, Xiongjie Zhang, Xuchu Mu, Huihua Li, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	Accurate Performance Evaluation of Jitter-Power FOM for Multiplying Delay-Locked Loop. IEEE Trans. Circuits Syst. I Regul. Pap. Yueduo Liu, Rongxin Bao, Zihao Zhu, Shiheng Yang, Xiong Zhou, Jun Yin, Pui-In Mak, Qiang Li
2022	—	`conf`	Adaptive Line-Transient Enhancement Techniques for Dual-Path Hybrid Converter Achieving Ultra-Low Output Overshoot/Undershoot. APCCAS Huihua Li, Qiaobo Ma, Xuchu Mu, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	Arithmetic Progression Switched-Capacitor DC-DC Converter Topology With Soft VCR Transitions and Quasi-Symmetric Two-Phase Charge Delivery. IEEE J. Solid State Circuits Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2022	—	`conf`	Design Challenges and Considerations of Non-isolated Gate Driver for GaN-based Converters. MWSCAS Xuchu Mu, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2022	—	`conf`	Design and Implementation of a Low Power Switched-Capacitor-Based Analog Feature Extractor for Voice Keyword Spotting. APCCAS Feifei Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	Evaluation and Perspective of Analog Low-Dropout Voltage Regulators: A Review. IEEE Access Tan Yee Chyan, Harikrishnan Ramiah, Sharifah Wan Muhamad Hatta, Nai Shyan Lai, Chee-Cheow Lim, Yong Chen, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	Fully-Integrated Timers for Ultra-Low-Power Internet-of-Things Nodes - Fundamentals and Design Techniques. IEEE Access Mikki How-Wen Loo, Harikrishnan Ramiah, Ka-Meng Lei, Chee-Cheow Lim, Nai Shyan Lai, Pui-In Mak, Rui Paulo Martins
2022	—	`conf`	High Linearity BJT-Based Time-Domain CMOS Temperature Sensor. APCCAS Yu Lei, Qishen Fang, Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	High-Performance Harmonic-Rich Single-Core VCO With Multi-LC Tank: A Tutorial. IEEE Trans. Circuits Syst. II Express Briefs Yong Chen, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	Low Voltage Switched-Capacitive-Based Reconfigurable Charge Pumps for Energy Harvesting Systems: An Overview. IEEE Access Tian Siang Ho, Harikrishnan Ramiah, Kishore Kumar Pakkirisami Churchill, Yong Chen, Chee-Cheow Lim, Nai Shyan Lai, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	Miniaturization of a Nuclear Magnetic Resonance System: Architecture and Design Considerations of Transceiver Integrated Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. Shuhao Fan, Qi Zhou, Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	Miniaturized Energy Harvesting Systems Using Switched-Capacitor DC-DC Converters. IEEE Trans. Circuits Syst. II Express Briefs Man-Kay Law, Yang Jiang, Pui-In Mak, Rui Paulo Martins
2022	J	`jnl`	Mismatch Analysis of DTCs With an Improved BIST-TDC in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Peng Chen, Jun Yin, Feifei Zhang, Pui-In Mak, Rui Paulo Martins, Robert Bogdan Staszewski
2022	—	`conf`	Modelling and Analysis of ΔΣ-Modulation-Based Output Spectrum Spur Reduction in Dual-Path Hybrid DC-DC Converters. PRIME Xiongjie Zhang, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2021	J	`jnl`	A 0.003-mm IEEE Trans. Circuits Syst. I Regul. Pap. Zunsong Yang, Yong Chen, Pui-In Mak, Rui Paulo Martins
2021	J	`jnl`	A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery (BBCDR) Circuit in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins
2021	J	`jnl`	A 0.35-V 5, 200-μm IEEE J. Solid State Circuits Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2021	—	`conf`	A 0.45-V 3.3-µW Resistor-Based Temperature Sensor Achieving 10mK Resolution in 65-nm CMOS. ICTA Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2021	J	`jnl`	A 1.7-to-2.7GHz 35-38% PAE Multiband CMOS Power Amplifier Employing a Digitally-Assisted Analog Pre-Distorter (DAAPD) Reconfigurable Linearization Technique. IEEE Trans. Circuits Syst. II Express Briefs Selvakumar Mariappan, Jagadheswaran Rajendran, Yong Chen, Pui-In Mak, Rui Paulo Martins
2021	J	`jnl`	A 12V-to-1V switched-capacitor-assisted hybrid converter with dual-path charge conduction and zero-voltage switching. IEICE Electron. Express Xiongjie Zhang, Qiaobo Ma, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2021	—	`conf`	A 15.2-to-18.2GHz Balanced Dual-Core Inverse-Class-F VCO with Q-Enhanced 2 A-SSCC Xi Meng, Junqi Guo, Haoran Li, Jun Yin, Pui-In Mak, Rui Paulo Martins
2021	J	`jnl`	A 3.36-GHz Locking-Tuned Type-I Sampling PLL With -78.6-dBc Reference Spur Merging Single-Path Reference-Feedthrough-Suppression and Narrow-Pulse-Shielding Techniques. IEEE Trans. Circuits Syst. II Express Briefs Yunbo Huang, Yong Chen, Hailong Jiao, Pui-In Mak, Rui Paulo Martins
2021	C	`conf`	A 3.52-GHz Harmonic-Rich-Shaping VCO with Noise Suppression and Circulation, Achieving -151-dBc/Hz Phase Noise at 10-MHz Offset. ISCAS Yunbo Huang, Yong Chen, Pui-In Mak, Rui Paulo Martins
2021	—	`conf`	A 4-bit Mixed-Signal MAC Array with Swing Enhancement and Local Kernel Memory. MWSCAS Wei-Han Yu, Massimo Giordano, Rohan Doshi, Minglei Zhang, Pui-In Mak, Rui Paulo Martins, Boris Murmann
2021	—	`conf`	A 5.0-to-6.36GHz Wideband-Harmonic-Shaping VCO Achieving 196.9dBc/Hz Peak FoM and 90-to-180kHz 1/f ISSCC Hao Guo, Yong Chen, Pui-In Mak, Rui Paulo Martins
2021	—	`conf`	A 50.4 GOPs/W FPGA-Based MobileNetV2 Accelerator using the Double-Layer MAC and DSP Efficiency Enhancement. A-SSCC Jixuan Li, Jiabao Chen, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2021	J	`jnl`	A 600-μm² Ring-VCO-Based Hybrid PLL Using a 30-μW Charge-Sharing Integrator in 28-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs Shiheng Yang, Jun Yin, Tailong Xu, Taimo Yi, Pui-In Mak, Qiang Li, Rui Paulo Martins
2021	J	`jnl`	A Fully Integrated 10-V Pulse Driver Using Multiband Pulse-Frequency Modulation in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. Jiangchao Wu, Hou-Man Leong, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2021	J	`jnl`	A High-Efficiency Dual-Antenna RF Energy Harvesting System Using Full-Energy Extraction With Improved Input Power Response. IEEE Open J. Circuits Syst. Zhaobo Zhang, Chenchang Zhan, Man-Kay Law, Yang Jiang, Pui-In Mak, Rui Paulo Martins
2021	—	`conf`	A Periodically Time-Varying Inductor Applied to The Class-D VCO for Phase Noise Improvement. ESSCIRC Jun Yin, Pui-In Mak, Rui Paulo Martins
2021	J	`jnl`	A Wide-PCE-Dynamic-Range CMOS Cross-Coupled Differential-Drive Rectifier for Ambient RF Energy Harvesting. IEEE Trans. Circuits Syst. II Express Briefs Gabriel Chong, Harikrishnan Ramiah, Jun Yin, Jagadheswaran Rajendran, Pui-In Mak, Rui Paulo Martins
2021	J	`jnl`	A multi-path switched-capacitor-inductor hybrid DC-DC converter with reduced inductor loss and extended voltage conversion range. IEICE Electron. Express Qiaobo Ma, Xiongjie Zhang, Yang Jiang, Katsuhiro Hata, Makoto Takamiya, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2021	J	`jnl`	An 800 MHz-to-3.3 GHz 20-MHz Channel Bandwidth WPD CMOS Power Amplifier For Multiband Uplink Radio Transceivers. IEEE Trans. Circuits Syst. II Express Briefs Selvakumar Mariappan, Jagadheswaran Rajendran, Harikrishnan Ramiah, Pui-In Mak, Jun Yin, Rui Paulo Martins
2021	—	`conf`	An Arithmetic Progression Switched-Capacitor DC-DC Converter with Soft VCR Transitions Achieving 93.7% Peak Efficiency and 400 mA Output Current. A-SSCC Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2021	J	`jnl`	An FPGA-Based Energy-Efficient Reconfigurable Convolutional Neural Network Accelerator for Object Recognition Applications. IEEE Trans. Circuits Syst. II Express Briefs Jixuan Li, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2021	J	`jnl`	Bird's-eye view of analog and mixed-signal chips for the 21st century. Int. J. Circuit Theory Appl. Rui Paulo Martins, Pui-In Mak, Chi-Hang Chan, Jun Yin, Yan Zhu, Yong Chen, Yan Lu, Man-Kay Law, Sai-Weng Sin
2021	—	`conf`	Modeling Attack Resistant Strong PUF Exploiting Obfuscated Interconnections With <0.83% Bit-Error Rate. A-SSCC Chongyao Xu, Jieyun Zhang, Man-Kay Law, Yang Jiang, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins
2021	J	`jnl`	Startup Time and Energy-Reduction Techniques for Crystal Oscillators in the IoT Era. IEEE Trans. Circuits Syst. II Express Briefs Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2021	J	`jnl`	Wideband Variable-Gain Amplifiers Based on a Pseudo-Current-Steering Gain-Tuning Technique. IEEE Access Lingshan Kong, Yong Chen, Haohong Yu, Chirn Chye Boon, Pui-In Mak, Rui Paulo Martins
2020	—	`conf`	10.1 A 1.4-to-2.7GHz FDD SAW-Less Transmitter for 5G-NR Using a BW-Extended N-Path Filter-Modulator, an Isolated-BB Input and a Wideband TIA-Based PA Driver Achieving <-157.5dBc/Hz OB Noise. ISSCC Gengzhen Qi, Haijun Shao, Pui-In Mak, Jun Yin, Rui Paulo Martins
2020	—	`conf`	17.9 A 9mW 54.9-to-63.5GHz Current-Reuse LO Generator with a 186.7dBc/Hz FoM by Unifying a 20GHz 3 ISSCC Chao Fan, Jun Yin, Chee-Cheow Lim, Pui-In Mak, Rui Paulo Martins
2020	—	`conf`	A 0.024-mm MWSCAS Yong Chen, Pui-In Mak, Chirn Chye Boon, Rui Paulo Martins
2020	—	`conf`	A 0.0285mm CICC Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins
2020	J	`jnl`	A 1-V 4-mW Differential-Folded Mixer With Common-Gate Transconductor Using Multiple Feedback Achieving 18.4-dB Conversion Gain, +12.5-dBm IIP3, and 8.5-dB NF. IEEE Trans. Very Large Scale Integr. Syst. Nandini Vitee, Harikrishnan Ramiah, Pui-In Mak, Jun Yin, Rui Paulo Martins
2020	J	`jnl`	A 10.6-mW 26.4-GHz Dual-Loop Type-II Phase-Locked Loop Using Dynamic Frequency Detector and Phase Detector. IEEE Access Zunsong Yang, Yong Chen, Shiheng Yang, Pui-In Mak, Rui Paulo Martins
2020	J	`jnl`	A 3.15-mW +16.0-dBm IIP3 22-dB CG Inductively Source Degenerated Balun-LNA Mixer With Integrated Transformer-Based Gate Inductor and IM2 Injection Technique. IEEE Trans. Very Large Scale Integr. Syst. Nandini Vitee, Harikrishnan Ramiah, Pui-In Mak, Jun Yin, Rui Paulo Martins
2020	J	`jnl`	A 3.3-mW 25.2-to-29.4-GHz Current-Reuse VCO Using a Single-Turn Multi-Tap Inductor and Differential-Only Switched-Capacitor Arrays With a 187.6-dBc/Hz FOM. IEEE Trans. Circuits Syst. Yunbo Huang, Yong Chen, Hao Guo, Pui-In Mak, Rui Paulo Martins
2020	C	`conf`	A 6.4pJ/Bit Strong Physical Unclonable Function Based on Multiple-Stage Amplifier Chain. ISCAS Jieyun Zhang, Xiaojin Zhao, Man-Kay Law, Chongyao Xu, Jiahao Liu, Pui-In Mak, Rui Paulo Martins
2020	J	`jnl`	A Multiband FDD SAW-Less Transmitter for 5G-NR Featuring a BW-Extended N-Path Filter-Modulator, a Switched-BB Input, and a Wideband TIA-Based PA Driver. IEEE J. Solid State Circuits Gengzhen Qi, Haijun Shao, Pui-In Mak, Jun Yin, Rui Paulo Martins
2020	J	`jnl`	A Single-Pin Antenna Interface RF Front End Using a Single-MOS DCO-PA and a Push-Pull LNA. IEEE J. Solid State Circuits Kai Xu, Jun Yin, Pui-In Mak, Robert Bogdan Staszewski, Rui Paulo Martins
2020	C	`conf`	A Unity-Power-Factor Inductive Power Transfer Converter with Inherent CC-to-CV Transition Ability for Automated Guided Vehicle Charging. IECON Io-Wa Iam, Iok-U Hoi, Zhicong Huang, Chi-Seng Lam, Pui-In Mak, Rui Paulo Martins
2020	C	`conf`	An N × N Multiplier-Based Multi-Bit Strong PUF using Path Delay Extraction. ISCAS Chongyao Xu, Jieyun Zhang, Man-Kay Law, Xiaojin Zhao, Pui-In Mak, Rui Paulo Martins
2020	J	`jnl`	Cost-Effective Compensation Design for Output Customization and Efficiency Optimization in Series/Series-Parallel Inductive Power Transfer Converter. IEEE Trans. Ind. Electron. Zhicong Huang, ZhiJian Fang, Chi-Seng Lam, Pui-In Mak, Rui Paulo Martins
2020	J	`jnl`	Design Considerations of the Interpolative Digital Transmitter for Quantization Noise and Replicas Rejection. IEEE Trans. Circuits Syst. II Express Briefs Ka-Fai Un, Feifei Zhang, Pui-In Mak, Rui Paulo Martins, Anding Zhu, Robert Bogdan Staszewski
2020	J	`jnl`	Design of a 4.2-to-5.1 GHz Ultralow-Power Complementary Class-B/C Hybrid-Mode VCO in 65-nm CMOS Fully Supported by EDA Tools. IEEE Trans. Circuits Syst. Ricardo Martins, Nuno Lourenço, Nuno Horta, Shenke Zhong, Jun Yin, Pui-In Mak, Rui Paulo Martins
2020	C	`conf`	Low Complexity Illumination-Invariant Motion Vector Detection Based on Logarithmic Edge Detection and Edge Difference. ISCAS Chuanqi Wei, Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2020	J	`jnl`	Piezoelectric Energy-Harvesting Interface Using Split-Phase Flipping-Capacitor Rectifier With Capacitor Reuse for Input Power Adaptation. IEEE J. Solid State Circuits Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Xiaoyang Zeng, Rui Paulo Martins
2019	J	`jnl`	A 0.0018-mm IEEE Trans. Circuits Syst. I Regul. Pap. Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins
2019	—	`conf`	A 0.003-mm A-SSCC Zunsong Yang, Yong Chen, Pui-In Mak, Rui Paulo Martins
2019	J	`jnl`	A 0.0056-mm IEEE J. Solid State Circuits Shiheng Yang, Jun Yin, Pui-In Mak, Rui Paulo Martins
2019	J	`jnl`	A 0.0071-mm IEEE Trans. Circuits Syst. I Regul. Pap. Yong Chen, Pui-In Mak, Zunsong Yang, Chirn Chye Boon, Rui Paulo Martins
2019	J	`jnl`	A 0.044-mm IEEE Trans. Circuits Syst. II Express Briefs Haohong Yu, Yong Chen, Chirn Chye Boon, Chenyang Li, Pui-In Mak, Rui Paulo Martins
2019	—	`conf`	A 0.08mm2 25.5-to-29.9GHz Multi-Resonant-RLCM-Tank VCO Using a Single-Turn Multi-Tap Inductor and CM-Only Capacitors Achieving 191.6dBc/Hz FoM and 130kHz 1/f3 PN Corner. ISSCC Hao Guo, Yong Chen, Pui-In Mak, Rui Paulo Martins
2019	J	`jnl`	A 0.12-mm IEEE Trans. Circuits Syst. I Regul. Pap. Ka-Fai Un, Gengzhen Qi, Jun Yin, Shiheng Yang, Shupeng Yu, Chio-In Ieong, Pui-In Mak, Rui Paulo Martins
2019	—	`conf`	A 0.14-to-0.29-pJ/bit 14-GBaud/s Trimodal (NRZ/PAM-4/PAM-8) Half-Rate Bang-Bang Clock and Data Recovery Circuit (BBCDR) in 28-nm CMOS. APCCAS Xiaoteng Zhao, Yong Chen, Pui-In Mak, Rui Paulo Martins
2019	J	`jnl`	A 0.2-V Energy-Harvesting BLE Transmitter With a Micropower Manager Achieving 25% System Efficiency at 0-dBm Output and 5.2-nW Sleep Power in 28-nm CMOS. IEEE J. Solid State Circuits Shiheng Yang, Jun Yin, Haidong Yi, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2019	J	`jnl`	A 0.5-V 0.4-to-1.6-GHz 8-Phase Bootstrap Ring-VCO Using Inherent Non-Overlapping Clocks Achieving a 162.2-dBc/Hz FoM. IEEE Trans. Circuits Syst. II Express Briefs Tongquan Jiang, Jun Yin, Pui-In Mak, Rui Paulo Martins
2019	J	`jnl`	A 13-bit 8-kS/s Δ-Σ Readout IC Using ZCB Integrators With an Embedded Resistive Sensor Achieving 1.05-pJ/Conversion Step and a 65-dB PSRR. IEEE Trans. Very Large Scale Integr. Syst. Bing Li, Ji-Ping Na, Wei Wang, Jia Liu, Qian Yang, Pui-In Mak
2019	—	`conf`	A 25.4-to-29.5GHz 10.2mW Isolated Sub-Sampling PLL Achieving -252.9dB Jitter-Power FoM and -63dBc Reference Spur. ISSCC Zunsong Yang, Yong Chen, Shiheng Yang, Pui-In Mak, Rui Paulo Martins
2019	J	`jnl`	A 40-Gb/s PAM-4 Transmitter Using a 0.16-pJ/bit SST-CML-Hybrid (SCH) Output Driver and a Hybrid-Path 3-Tap FFE Scheme in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. Chao Fan, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2019	J	`jnl`	A 5.1-to-7.3 mW, 2.4-to-5 GHz Class-C Mode-Switching Single-Ended-Complementary VCO Achieving >190 dBc/Hz FoM. IEEE Trans. Circuits Syst. II Express Briefs Chee-Cheow Lim, Harikrishnan Ramiah, Jun Yin, Narendra Kumar, Pui-In Mak, Rui Paulo Martins
2019	J	`jnl`	A Comparative Study of 8-Phase Feedforward-Coupling Ring VCOs. IEEE Trans. Circuits Syst. II Express Briefs Iat-Fai Sun, Jun Yin, Pui-In Mak, Rui Paulo Martins
2019	—	`conf`	A Piezoelectric Energy-Harvesting Interface Using Split-Phase Flipping-Capacitor Rectifier and Capacitor Reuse Multiple-VCR SC DC-DC Achieving 9.3× Energy-Extraction Improvement. ISSCC Zhiyuan Chen, Yang Jiang, Man-Kay Law, Pui-In Mak, Xiaoyang Zeng, Rui Paulo Martins
2019	J	`jnl`	A coin-battery-powered LDO-Free 2.4-GHz Bluetooth Low Energy/ZigBee receiver consuming 2 mA. Integr. Zechariah Balan, Harikrishnan Ramiah, Jagadheswaran Rajendran, Nandini Vitee, Pravinah Nair Shasidharan, Jun Yin, Pui-In Mak, Rui Paulo Martins
2019	J	`jnl`	Algebraic Series-Parallel-Based Switched-Capacitor DC-DC Boost Converter With Wide Input Voltage Range and Enhanced Power Density. IEEE J. Solid State Circuits Yang Jiang, Man-Kay Law, Zhiyuan Chen, Pui-In Mak, Rui Paulo Martins
2019	J	`jnl`	Analysis and Verification of Jitter in Bang-Bang Clock and Data Recovery Circuit With a Second-Order Loop Filter. IEEE Trans. Very Large Scale Integr. Syst. Xinyi Ge, Yong Chen, Xiaoteng Zhao, Pui-In Mak, Rui Paulo Martins
2019	J	`jnl`	CMOS Cross-Coupled Differential-Drive Rectifier in Subthreshold Operation for Ambient RF Energy Harvesting - Model and Analysis. IEEE Trans. Circuits Syst. II Express Briefs Gabriel Chong, Harikrishnan Ramiah, Jun Yin, Jagadheswaran Rajendran, Wei Ru Wong, Pui-In Mak, Rui Paulo Martins
2019	J	`jnl`	Fully Integrated High Voltage Pulse Driver Using Switched-Capacitor Voltage Multiplier and Synchronous Charge Compensation in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs Jiangchao Wu, Ka-Chon Lei, Hou-Man Leong, Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2019	J	`jnl`	Many-Objective Sizing Optimization of a Class-C/D VCO for Ultralow-Power IoT and Ultralow-Phase-Noise Cellular Applications. IEEE Trans. Very Large Scale Integr. Syst. Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins
2019	—	`conf`	Using EDA Tools to Push the Performance Boundaries of an Ultralow-Power IoT-VCO at 65nm. SMACD Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins
2019	—	`conf`	Wideband Variable-Gain Amplifiers Based on a Pseudo-Current-Steering Gain-Tuning Technique. APCCAS Lingshan Kong, Yong Chen, Haohong Yu, Quan Pan, Chirn Chye Boon, Pui-In Mak, Rui Paulo Martins
2018	—	`conf`	A 0.0056mm ISSCC Shiheng Yang, Jun Yin, Pui-In Mak, Rui Paulo Martins
2018	J	`jnl`	A 0.032-mm IEEE Trans. Circuits Syst. II Express Briefs Haidong Yi, Jun Yin, Pui-In Mak, Rui Paulo Martins
2018	J	`jnl`	A 0.18-V 382-µW Bluetooth Low-Energy Receiver Front-End With 1.33-nW Sleep Power for Energy-Harvesting Applications in 28-nm CMOS. IEEE J. Solid State Circuits Haidong Yi, Wei-Han Yu, Pui-In Mak, Jun Yin, Rui Paulo Martins
2018	—	`conf`	A 0.22-to-2.4V-input fine-grained fully integrated rational buck-boost SC DC-DC converter using algorithmic voltage-feed-in (AVFI) topology achieving 84.1% peak efficiency at 13.2mW/mm ISSCC Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2018	—	`conf`	A 0.2V energy-harvesting BLE transmitter with a micropower manager achieving 25% system efficiency at 0dBm output and 5.2nW sleep power in 28nm CMOS. ISSCC Jun Yin, Shiheng Yang, Haidong Yi, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2018	C	`conf`	A 0.4 V 6.4 μW 3.3 MHz CMOS Bootstrapped Relaxation Oscillator with ±0.71% Frequency Deviation over -30 to 100 °C for Wearable and Sensing Applications. ISCAS Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2018	J	`jnl`	A 0.7-2.5 GHz, 61% EIRP System Efficiency, Four-Element MIMO TX System Exploiting Integrated Power-Relaxed Power Amplifiers and an Analog Spatial De-Interleaver. IEEE Trans. Circuits Syst. I Regul. Pap. Wei-Han Yu, Ka-Fai Un, Pui-In Mak, Rui Paulo Martins
2018	—	`conf`	A 2.4-GHz Single-Pin Antenna Interface RF Front-End with a Function-Reuse Single-MOS VCO-PA and a Push-Pull LNA. A-SSCC Kai Xu, Jun Yin, Pui-In Mak, Robert Bogdan Staszewski, Rui Paulo Martins
2018	J	`jnl`	A 36-Gb/s 1.3-mW/Gb/s Duobinary-Signal Transmitter Exploiting Power-Efficient Cross-Quadrature Clocking Multiplexers With Maximized Timing Margin. IEEE Trans. Circuits Syst. I Regul. Pap. Yong Chen, Pui-In Mak, Chirn Chye Boon, Rui Paulo Martins
2018	J	`jnl`	A Coin-Battery-Powered LDO-Free 2.4-GHz Bluetooth Low-Energy Transmitter With 34.7% Peak System Efficiency. IEEE Trans. Circuits Syst. II Express Briefs Xingqiang Peng, Jun Yin, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2018	J	`jnl`	A Hardware-Efficient Feedback Polynomial Topology for DPD Linearization of Power Amplifiers: Theory and FPGA Validation. IEEE Trans. Circuits Syst. I Regul. Pap. Chak-Fong Cheang, Pui-In Mak, Rui Paulo Martins
2018	J	`jnl`	A Regulation-Free Sub-0.5-V 16-/24-MHz Crystal Oscillator With 14.2-nJ Startup Energy and 31.8-µW Steady-State Power. IEEE J. Solid State Circuits Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2018	J	`jnl`	A SAW-Less Tunable RF Front End for FDD and IBFD Combining an Electrical-Balance Duplexer and a Switched-LC N-Path LNA. IEEE J. Solid State Circuits Gengzhen Qi, Barend van Liempd, Pui-In Mak, Rui Paulo Martins, Jan Craninckx
2018	J	`jnl`	A Wideband Inductorless dB-Linear Automatic Gain Control Amplifier Using a Single-Branch Negative Exponential Generator for Wireline Applications. IEEE Trans. Circuits Syst. I Regul. Pap. Lingshan Kong, Yong Chen, Chirn Chye Boon, Pui-In Mak, Rui Paulo Martins
2018	—	`conf`	A regulation-free sub-0.5V 16/24MHz crystal oscillator for energy-harvesting BLE radios with 14.2nJ startup energy and 31.8pW steady-state power. ISSCC Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2018	J	`jnl`	Algorithmic Voltage-Feed-In Topology for Fully Integrated Fine-Grained Rational Buck-Boost Switched-Capacitor DC-DC Converters. IEEE J. Solid State Circuits Yang Jiang, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2018	J	`jnl`	An Inverse-Class-F CMOS Oscillator With Intrinsic-High-Q First Harmonic and Second Harmonic Resonances. IEEE J. Solid State Circuits Chee-Cheow Lim, Harikrishnan Ramiah, Jun Yin, Pui-In Mak, Rui Paulo Martins
2018	—	`conf`	An inverse-class-F CMOS VCO with intrinsic-high-Q 1 ISSCC Chee-Cheow Lim, Jun Yin, Pui-In Mak, Harikrishnan Ramiah, Rui Paulo Martins
2018	—	`conf`	Design and Optimization of a Class-C/D VCO for Ultra-Low-Power IoT and Cellular Applications. SMACD Ricardo Martins, Nuno Lourenço, Nuno Horta, Jun Yin, Pui-In Mak, Rui Paulo Martins
2018	J	`jnl`	Guest Editorial Wireless Sensing Circuits and Systems for Healthcare and Biomedical Applications. IEEE J. Emerg. Sel. Topics Circuits Syst. Changzhi Li, Pui-In Mak, Roberto Gómez-García, Ying Chen
2018	J	`jnl`	Introduction to the January Special Issue on the 2017 IEEE International Solid-State Circuits Conference. IEEE J. Solid State Circuits Keith A. Bowman, Muhammad M. Khellah, Takashi Kono, Joseph Shor, Pui-In Mak
2018	J	`jnl`	Low-Phase-Noise Wideband Mode-Switching Quad-Core-Coupled mm-wave VCO Using a Single-Center-Tapped Switched Inductor. IEEE J. Solid State Circuits Yatao Peng, Jun Yin, Pui-In Mak, Rui Paulo Martins
2018	J	`jnl`	Overview of Recent Development on Wireless Sensing Circuits and Systems for Healthcare and Biomedical Applications. IEEE J. Emerg. Sel. Topics Circuits Syst. Changzhi Li, Ka-Fai Un, Pui-In Mak, Ying Chen, José Maria Muñoz-Ferreras, Zhi Yang, Roberto Gómez-García
2017	—	`conf`	22.2 A 1.7mm ISSCC Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Wing-Hung Ki, Rui Paulo Martins
2017	—	`conf`	24.4 A 0.18V 382µW bluetooth low-energy (BLE) receiver with 1.33nW sleep power for energy-harvesting applications in 28nm CMOS. ISSCC Wei-Han Yu, Haidong Yi, Pui-In Mak, Jun Yin, Rui Paulo Martins
2017	J	`jnl`	A 0.038-mm IEEE J. Solid State Circuits Gengzhen Qi, Pui-In Mak, Rui Paulo Martins
2017	J	`jnl`	A 0.45 V 147-375 nW ECG Compression Processor With Wavelet Shrinkage and Adaptive Temporal Decimation Architectures. IEEE Trans. Very Large Scale Integr. Syst. Chio-In Ieong, Mingzhong Li, Man-Kay Law, Pui-In Mak, Mang I Vai, Rui Paulo Martins
2017	C	`conf`	A 0.4V 4.8μW 16MHz CMOS crystal oscillator achieving 74-fold startup-time reduction using momentary detuning. ISCAS Ka-Meng Lei, Pui-In Mak, Rui Paulo Martins
2017	J	`jnl`	A 2.4-GHz ZigBee Transmitter Using a Function-Reuse Class-F DCO-PA and an ADPLL Achieving 22.6% (14.5%) System Efficiency at 6-dBm (0-dBm) P IEEE J. Solid State Circuits Xingqiang Peng, Jun Yin, Pui-In Mak, Wei-Han Yu, Rui Paulo Martins
2017	J	`jnl`	A 73.9%-Efficiency CMOS Rectifier Using a Lower DC Feeding (LDCF) Self-Body-Biasing Technique for Far-Field RF Energy-Harvesting Systems. IEEE Trans. Circuits Syst. I Regul. Pap. Amin Khalili Moghaddam, Joon Huang Chuah, Harikrishnan Ramiah, Jalil Ahmadian, Pui-In Mak, Rui Paulo Martins
2017	J	`jnl`	A Handheld High-Sensitivity Micro-NMR CMOS Platform With B-Field Stabilization for Multi-Type Biological/Chemical Assays. IEEE J. Solid State Circuits Ka-Meng Lei, Hadi Heidari, Pui-In Mak, Man-Kay Law, Franco Maloberti, Rui Paulo Martins
2017	J	`jnl`	A High-Voltage-Enabled Class-D Polar PA Using Interactive AM-AM Modulation, Dynamic Matching, and Power-Gating for Average PAE Enhancement. IEEE Trans. Circuits Syst. I Regul. Pap. Wei-Han Yu, Xingqiang Peng, Pui-In Mak, Rui Paulo Martins
2017	J	`jnl`	A Single-Chip Solar Energy Harvesting IC Using Integrated Photodiodes for Biomedical Implant Applications. IEEE Trans. Biomed. Circuits Syst. Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2017	J	`jnl`	An Integrated Circuit for Simultaneous Extracellular Electrophysiology Recording and Optogenetic Neural Manipulation. IEEE Trans. Biomed. Eng. Chang-Hao Chen, Elizabeth A. McCullagh, Sio-Hang Pun, Peng Un Mak, Mang I Vai, Pui-In Mak, Achim Klug, Tim C. Lei
2017	J	`jnl`	Fully Integrated Inductor-Less Flipping-Capacitor Rectifier for Piezoelectric Energy Harvesting. IEEE J. Solid State Circuits Zhiyuan Chen, Man-Kay Law, Pui-In Mak, Wing-Hung Ki, Rui Paulo Martins
2017	C	`conf`	Piecewise BJT process spread compensation exploiting base recombination current. ISCAS Dapeng Sun, Man-Kay Law, Bo Wang, Pui-In Mak, Rui Paulo Martins
2017	—	`conf`	Session 21 overview: Smart SoCs for innovative applications. ISSCC Antoine Dupret, Pui-In Mak, Eugenio Cantatore
2016	—	`conf`	2.7 A 0.003mm2 1.7-to-3.5GHz dual-mode time-interleaved ring-VCO achieving 90-to-150kHz 1/f3 phase-noise corner. ISSCC Jun Yin, Pui-In Mak, Franco Maloberti, Rui Paulo Martins
2016	—	`conf`	26.9 A 0.038mm2 SAW-less multiband transceiver using an N-Path SC gain loop. ISSCC Gengzhen Qi, Pui-In Mak, Rui Paulo Martins
2016	—	`conf`	28.1 A handheld 50pM-sensitivity micro-NMR CMOS platform with B-field stabilization for multi-type biological/chemical assays. ISSCC Ka-Meng Lei, Hadi Heidari, Pui-In Mak, Man-Kay Law, Franco Maloberti, Rui Paulo Martins
2016	J	`jnl`	A 2-µW 45-nV/√Hz Readout Front End With Multiple-Chopping Active-High-Pass Ripple Reduction Loop and Pseudofeedback DC Servo Loop. IEEE Trans. Circuits Syst. II Express Briefs Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2016	J	`jnl`	A Time-Interleaved Ring-VCO with Reduced 1/f IEEE J. Solid State Circuits Jun Yin, Pui-In Mak, Franco Maloberti, Rui Paulo Martins
2016	C	`conf`	A high-Q spiral inductor with dual-layer patterned floating shield in a class-B VCO achieving a 190.5-dBc/Hz FoM. ISCAS Chee-Cheow Lim, Harikrishnan Ramiah, Jun Yin, Pui-In Mak, Rui Paulo Martins
2016	J	`jnl`	A µNMR CMOS Transceiver Using a Butterfly-Coil Input for Integration With a Digital Microfluidic Device Inside a Portable Magnet. IEEE J. Solid State Circuits Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2016	J	`jnl`	ProtPOS: a python package for the prediction of protein preferred orientation on a surface. Bioinform. Jimmy C. F. Ngai, Pui-In Mak, Shirley W. I. Siu
2016	—	`conf`	Sub-threshold VLSI logic family exploiting unbalanced pull-up/down network, logical effort and inverse-narrow-width techniques. ASP-DAC Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang I Vai, Sio-Hang Pun, Rui Paulo Martins
2016	—	`conf`	Sub-µW QRS detection processor using quadratic spline wavelet transform and maxima modulus pair recognition for power-efficient wireless arrhythmia monitoring. ASP-DAC Chio-In Ieong, Pui-In Mak, Mang I Vai, Rui Paulo Martins
2016	—	`conf`	Time-domain I/Q-LOFT compensator using a simple envelope detector for a sub-GHz IEEE 802.11af WLAN transmitter. ASP-DAC Chak-Fong Cheang, Ka-Fai Un, Pui-In Mak, Rui Paulo Martins
2016	J	`jnl`	Wide Input Range Supply Voltage Tolerant Capacitive Sensor Readout Using On-Chip Solar Cell. J. Circuits Syst. Comput. Suyan Fan, Man-Kay Law, Mingzhong Li, Zhiyuan Chen, Chio-In Ieong, Pui-In Mak, Rui Paulo Martins
2015	—	`conf`	2.4 A 0.028mm ISSCC Zhicheng Lin, Pui-In Mak, Rui Paulo Martins
2015	J	`jnl`	A 0.0045-mm IEEE Trans. Circuits Syst. II Express Briefs Zushu Yan, Wei Wang, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2015	J	`jnl`	A 0.02 mm IEEE J. Solid State Circuits Yaohua Zhao, Pui-In Mak, Rui Paulo Martins, Franco Maloberti
2015	J	`jnl`	A 3.6-mW 6-GHz current-reuse VCO-buffer with improved load drivability in 65-nm CMOS. Int. J. Circuit Theory Appl. Md. Tawfiq Amin, Pui-In Mak, Rui Paulo Martins
2015	J	`jnl`	A Combinatorial Impairment-Compensation Digital Predistorter for a Sub-GHz IEEE 802.11af-WLAN CMOS Transmitter Covering a 10x-Wide RF Bandwidth. IEEE Trans. Circuits Syst. I Regul. Pap. Chak-Fong Cheang, Ka-Fai Un, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2015	J	`jnl`	A Highly-Scalable Analog Equalizer Using a Tunable and Current-Reusable for 10-Gb/s I/O Links. IEEE Trans. Very Large Scale Integr. Syst. Yong Chen, Pui-In Mak, Yan Wang
2015	—	`conf`	A μNMR CMOS transceiver using a butterfly-coil input for integration with a digital microfluidic device inside a portable magnet. A-SSCC Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2015	—	`conf`	Beta/theta ratio neurofeedback training effects on the spectral topography of EEG. EMBC Limin Yang, Wenya Nan, Xiaoting Qu, Feng Wan, Pui-In Mak, Peng Un Mak, Mang I Vai, Yong Hu, Agostinho C. Rosa
2015	J	`jnl`	Corrections to "A 0.02 mm IEEE J. Solid State Circuits P. V. Ananda Mohan, Yaohua Zhao, Pui-In Mak, Rui Paulo Martins, Franco Maloberti
2015	J	`jnl`	Energy Optimized Subthreshold VLSI Logic Family With Unbalanced Pull-Up/Down Network and Inverse Narrow-Width Techniques. IEEE Trans. Very Large Scale Integr. Syst. Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang I Vai, Sio-Hang Pun, Rui Paulo Martins
2015	J	`jnl`	Improving the Linearity and Power Efficiency of Active Switched-Capacitor Filters in a Compact Die Area. IEEE Trans. Very Large Scale Integr. Syst. Yaohua Zhao, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2015	J	`jnl`	Nested-Current-Mirror Rail-to-Rail-Output Single-Stage Amplifier With Enhancements of DC Gain, GBW and Slew Rate. IEEE J. Solid State Circuits Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins, Franco Maloberti
2015	B	`conf`	Predicting favorable protein docking poses on a solid surface by particle swarm optimization. CEC Jimmy C. F. Ngai, Pui-In Mak, Shirley W. I. Siu
2014	—	`conf`	17.2 A 0.0013mm ISSCC Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins, Franco Maloberti
2014	—	`conf`	3.9 An RF-to-BB current-reuse wideband receiver with parallel N-path active/passive mixers and a single-MOS pole-zero LPF. ISSCC Fujian Lin, Pui-In Mak, Rui Paulo Martins
2014	—	`conf`	9.4 A 0.5V 1.15mW 0.2mm ISSCC Zhicheng Lin, Pui-In Mak, Rui Paulo Martins
2014	—	`conf`	A 0.3-V, 37.5-nW 1.5∼6.5-pF-input-range supply voltage tolerant capacitive sensor readout. ISIC Suyan Fan, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2014	—	`conf`	A 104μW EMI-resisting bandgap voltage reference achieving -20dB PSRR, and 5% DC shift under a 4dBm EMI level. APCCAS Shiheng Yang, Pui-In Mak, Rui Paulo Martins
2014	J	`jnl`	A 2.4 GHz ZigBee Receiver Exploiting an RF-to-BB-Current-Reuse Blixer + Hybrid Filter Topology in 65 nm CMOS. IEEE J. Solid State Circuits Zhicheng Lin, Pui-In Mak, Rui Paulo Martins
2014	J	`jnl`	A Sub-GHz Multi-ISM-Band ZigBee Receiver Using Function-Reuse and Gain-Boosted N-Path Techniques for IoT Applications. IEEE J. Solid State Circuits Zhicheng Lin, Pui-In Mak, Rui Paulo Martins
2014	J	`jnl`	An RF-to-BB-Current-Reuse Wideband Receiver With Parallel N-Path Active/Passive Mixers and a Single-MOS Pole-Zero LPF. IEEE J. Solid State Circuits Fujian Lin, Pui-In Mak, Rui Paulo Martins
2014	J	`jnl`	Analysis and Modeling of a Gain-Boosted N-Path Switched-Capacitor Bandpass Filter. IEEE Trans. Circuits Syst. I Regul. Pap. Zhicheng Lin, Pui-In Mak, Rui Paulo Martins
2014	—	`conf`	Design considerations of a low-noise receiver front-end and its spiral coil for portable NMR screening. APCCAS Diyang Zhao, Ka-Meng Lei, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2014	J	`jnl`	Enhancing the performances of recycling folded cascode OpAmp in nanoscale CMOS through voltage supply doubling and design for reliability. Int. J. Circuit Theory Appl. Pui-In Mak, Miao Liu, Yaohua Zhao, Rui Paulo Martins
2014	C	`conf`	Micropower two-stage amplifier employing recycling current-buffer Miller compensation. ISCAS Wei Wang, Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2014	B	`conf`	Muscle and electrode motion artifacts reduction in ECG using adaptive Fourier decomposition. SMC Ze Wang, Chiman Wong, Janir Nuno da Cruz, Feng Wan, Pui-In Mak, Peng Un Mak, Mang I Vai
2013	J	`jnl`	15-nW Biopotential LPFs in 0.35-µm CMOS Using Subthreshold-Source-Follower Biquads With and Without Gain Compensation. IEEE Trans. Biomed. Circuits Syst. Tan-Tan Zhang, Pui-In Mak, Mang I Vai, Peng Un Mak, Man-Kay Law, Sio-Hang Pun, Feng Wan, Rui Paulo Martins
2013	J	`jnl`	A 0.016-mm IEEE J. Solid State Circuits Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2013	C	`conf`	A 0.5V 10GHz 8-phase LC-VCO Combining current-reuse and back-gate-coupling techniques consuming 2mW. ISCAS Md. Tawfiq Amin, Pui-In Mak, Rui Paulo Martins
2013	—	`conf`	A 1.7mW 0.22mm ISSCC Zhicheng Lin, Pui-In Mak, Rui Paulo Martins
2013	C	`conf`	A 1.83 μW, 0.78 μVrms input referred noise neural recording front end. ISCAS Jiangchao Wu, Man-Kay Law, Pui-In Mak, Rui Paulo Martins
2013	J	`jnl`	A 53-to-75-mW, 59.3-dB HRR, TV-Band White-Space Transmitter Using a Low-Frequency Reference LO in 65-nm CMOS. IEEE J. Solid State Circuits Ka-Fai Un, Pui-In Mak, Rui Paulo Martins
2013	J	`jnl`	A Fifth-Order 20-MHz Transistorized-LC-Ladder LPF With 58.2-dB SFDR, 68-µW/Pole/MHz Efficiency, and 0.13-mm IEEE Trans. Circuits Syst. II Express Briefs Yong Chen, Pui-In Mak, Li Zhang, He Qian, Yan Wang
2013	J	`jnl`	A Nonrecursive Digital Calibration Technique for Joint Elimination of Transmitter and Receiver I/Q Imbalances With Minimized Add-On Hardware. IEEE Trans. Circuits Syst. II Express Briefs Wei-Han Yu, Chak-Fong Cheang, Pui-In Mak, Weng-Fai Cheng, Ka-Fai Un, U-Wai Lok, Rui Paulo Martins
2013	J	`jnl`	A Single-Branch Third-Order Pole-Zero Low-Pass Filter With 0.014-mm IEEE Trans. Circuits Syst. II Express Briefs Yong Chen, Pui-In Mak, Stefano D'Amico, Li Zhang, He Qian, Yan Wang
2013	—	`conf`	Canonical Correlation Analysis Neural Network for Steady-State Visual Evoked Potentials Based Brain-Computer Interfaces. ISNN (2) Ka Fai Lao, Chiman Wong, Feng Wan, Pui-In Mak, Peng Un Mak, Mang I Vai
2013	J	`jnl`	Correction to "A 0.016 mm IEEE J. Solid State Circuits Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2013	—	`conf`	Sub-threshold standard cell library design for ultra-low power biomedical applications. EMBC Mingzhong Li, Chio-In Ieong, Man-Kay Law, Pui-In Mak, Mang I Vai, Rui Paulo Martins
2012	—	`conf`	A 0.016mm ISSCC Zushu Yan, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2012	C	`conf`	A 0.02-to-6GHz SDR balun-LNA using a triple-stage inverter-based amplifier. ISCAS Miguel A. Martins, Pui-In Mak, Rui Paulo Martins
2012	—	`conf`	A 0.8 µW 8-bit 1.5∼20-pF-input-range capacitance-to-digital converter for lab-on-chip digital microfluidics systems. BioCAS Yanjie Xiao, Tan-Tan Zhang, Pui-In Mak, Man-Kay Law, Rui Paulo Martins
2012	J	`jnl`	A 0.83-µW QRS Detection Processor Using Quadratic Spline Wavelet Transform for Wireless ECG Acquisition in 0.35-µm CMOS. IEEE Trans. Biomed. Circuits Syst. Chio-In Ieong, Pui-In Mak, Chi-Pang Lam, Cheng Dong, Mang I Vai, Peng Un Mak, Sio-Hang Pun, Feng Wan, Rui Paulo Martins
2012	—	`conf`	A dynamic-range-improved 2.4GHz WLAN class-E PA combining PWPM and cascode modulation. APCCAS Yinsidi Jiao, Wei-Han Yu, Pui-In Mak, Rui Paulo Martins
2012	—	`conf`	Flashing color on the performance of SSVEP-based brain-computer interfaces. EMBC Teng Cao, Feng Wan, Peng Un Mak, Pui-In Mak, Mang I Vai, Yong Hu
2012	—	`conf`	Implementation of SSVEP based BCI with Emotiv EPOC. VECIMS Yue Liu, Xiao Jiang, Teng Cao, Feng Wan, Peng Un Mak, Pui-In Mak, Mang I Vai
2012	—	`conf`	Neurofeedback for the treatment of schizophrenia: Case study. VECIMS Wenya Nan, Lanshin Chang, João P. Rodrigues, Feng Wan, Peng Un Mak, Pui-In Mak, Mang I Vai, Agostinho C. Rosa
2012	—	`conf`	Object Recognition Test in Peripheral Vision: A Study on the Influence of Object Color, Pattern and Shape. Brain Informatics Chin Ian Lou, Daria Migotina, João P. Rodrigues, João D. Semedo, Feng Wan, Peng Un Mak, Pui-In Mak, Mang I Vai, Fernando Melicio, J. Gomes Pereira, Agostinho C. Rosa
2012	J	`jnl`	Trial pruning based on genetic algorithm for single-trial EEG classification. Comput. Electr. Eng. Boyu Wang, Chiman Wong, Feng Wan, Peng Un Mak, Pui-In Mak, Mang I Vai
2011	J	`jnl`	A 0.46-mm IEEE J. Solid State Circuits Pui-In Mak, Rui Paulo Martins
2011	—	`conf`	A 0.46mm ISSCC Pui-In Mak, Rui Paulo Martins
2011	B	`conf`	A Solution to harmonic frequency problem: Frequency and phase coding-based brain-computer interface. IJCNN Chiman Wong, Boyu Wang, Feng Wan, Peng Un Mak, Pui-In Mak, Mang I Vai
2011	C	`conf`	A high-voltage-enabled recycling folded cascode OpAmp for nanoscale CMOS technologies. ISCAS Miao Liu, Pui-In Mak, Zushu Yan, Rui Paulo Martins
2011	—	`conf`	A highly-linear ultra-wideband balun-LNA for cognitive radios. EUROCON Weng-Fai Cheng, Ka-Fai Un, Pui-In Mak, Rui Paulo Martins
2011	C	`conf`	A single-to-differential LNA topology with robust output gain-phase balancing against balun imbalance. ISCAS Miguel A. Martins, Pui-In Mak, Rui Paulo Martins
2011	—	`conf`	An ultra-low-power filtering technique for biomedical applications. EMBC Tan-Tan Zhang, Pui-In Mak, Mang I Vai, Peng Un Mak, Feng Wan, Rui Paulo Martins
2011	B	`conf`	Entropy penalized learning for Gaussian mixture models. IJCNN Boyu Wang, Feng Wan, Peng Un Mak, Pui-In Mak, Mang I Vai
2011	—	`conf`	Robust Learning of Mixture Models and Its Application on Trial Pruning for EEG Signal Analysis. PAKDD Workshops Boyu Wang, Feng Wan, Peng Un Mak, Pui-In Mak, Mang I Vai
2010	J	`jnl`	Analysis and Design of Open-Loop Multiphase Local-Oscillator Generator for Wireless Applications. IEEE Trans. Circuits Syst. I Regul. Pap. Ka-Fai Un, Pui-In Mak, Rui Paulo Martins
2010	C	`conf`	SC biquad filter with hybrid utilization of OpAmp and comparator-based circuit. ISCAS Miguel A. Martins, Ka-Fai Un, Pui-In Mak, Rui Paulo Martins
2010	C	`conf`	Source-follower-based bi-quad cell for continuous-time zero-pole type filters. ISCAS Yong Chen, Pui-In Mak, Yumei Zhou
2009	C	`conf`	A 90nm CMOS Bio-potential Signal Readout Front-end with Improved Powerline Interference Rejection. ISCAS Chon-Teng Ma, Pui-In Mak, Mang I Vai, Peng Un Mak, Sio-Hang Pun, Feng Wan, Rui Paulo Martins
2009	C	`conf`	An Open-loop Octave-phase Local-oscillator Generator with High-precision Correlated Phases for VHF/UHF Mobile-TV Tuners. ISCAS Ka-Fai Un, Pui-In Mak, Rui Paulo Martins
2009	J	`jnl`	Design of an ESD-Protected Ultra-Wideband LNA in Nanoscale CMOS for Full-Band Mobile TV Tuners. IEEE Trans. Circuits Syst. I Regul. Pap. Pui-In Mak, Rui Paulo Martins
2008	—	`conf`	A DC-offset-compensated, CT/DT hybrid filter with process-insensitive cutoff and low in-band group-delay variation for WLAN receivers. APCCAS Ka-Fai Un, Pui-In Mak, Rui Paulo da Silva Martins
2008	C	`conf`	An open-source-input, ultra-wideband LNA with mixed-voltage ESD protection for full-band (170-to-1700 MHz) mobile TV tuners. ISCAS Pui-In Mak, Ka-Hou Ao Ieong, Rui Paulo Martins
2008	J	`jnl`	On the Design of a Programmable-Gain Amplifier With Built-In Compact DC-Offset Cancellers for Very Low-Voltage WLAN Systems. IEEE Trans. Circuits Syst. I Regul. Pap. Pui-In Mak, Seng-Pan U., Rui Paulo Martins
2007	C	`conf`	A Highly-Linear Successive-Approximation Front-End Digitizer with Built-in Sample-and-Hold Function for Pipeline/Two-Step ADC. ISCAS Weng-leng Mok, Pui-In Mak, Seng-Pan U., Rui Paulo Martins
2007	J	`jnl`	Experimental 1-V flexible-IF CMOS analoguebaseband chain for IEEE 802.11a/b/g WLAN receivers. IET Circuits Devices Syst. Pui-In Mak, Seng-Pan U, Rui Paulo Martins
2006	C	`conf`	Design and test strategy underlying a low-voltage analog-baseband IC for 802.11a/b/g WLAN SiP receivers. ISCAS Pui-In Mak, Seng-Pan U., Rui Paulo Martins
2005	—	`conf`	A 1-V transient-free and DC-offset-canceled PGA with a 17.1-MHz constant bandwidth over 52-dB control range in 0.35-μm CMOS. CICC Pui-In Mak, Seng-Pan U, Rui Paulo Martins
2005	—	`conf`	A frequency up-conversion and two-step channel selection embedded CMOS D/A interface. ISCAS (1) Ka-Hou Ao Ieong, Chong-Yin Fok, Pui-In Mak, Seng-Pan U., Rui Paulo Martins
2005	J	`jnl`	Two-step channel selection-a novel technique for reconfigurable multistandard transceiver front-ends. IEEE Trans. Circuits Syst. I Regul. Pap. Pui-In Mak, Seng-Pan U, Rui Paulo Martins
2004	—	`conf`	A 3D PWM control, H-bridge tri-level inverter for power quality compensation in three-phase four-wired systems. ISCAS (5) Pui-In Mak, Man-Chung Wong, Seng-Pan U.
2004	—	`conf`	A low-IF/zero-IF reconfigurable receiver with two-step channel selection technique for multistandard applications. ISCAS (4) Pui-In Mak, Seng-Pan U., Rui Paulo Martins
2004	—	`conf`	An I/Q-multiplexed and OTA-shared CMOS pipelined ADC with an A-DQS S/H front-end for two-step-channel-select low-IF receiver. ISCAS (1) Pui-In Mak, Kin-Kwan Ma, Weng-leng Mok, Chi-sam Sou, Kit-man Ho, Cheng-Man Ng, Seng-Pan U., Rui Paulo Martins
2003	—	`conf`	A front-to-back-end modeling of I/Q mismatch effects in a complex-IF receiver for image-rejection enhancement. ICECS Pui-In Mak, Seng-Pan U, Rui Paulo Martins
2003	—	`conf`	Frequency-downconversion and IF channel selection A-DQS sample-and-hold pair for two-step-channel-select low-IF receiver. ICECS Pui-In Mak, Chi-sam Sou, Seng-Pan U, Rui Paulo Martins