Prithviraj Banerjee

285 papers A* 27A 46B 13C 10Misc 21Journal 79Unranked 84

Year	Rank	Type	Title / Venue / Authors
2025	A*	`conf`	HOT3D: Hand and Object Tracking in 3D from Egocentric Multi-View Videos. CVPR Prithviraj Banerjee, Sindi Shkodrani, Pierre Moulon, Shreyas Hampali, Shangchen Han, Fan Zhang, Linguang Zhang, Jade Fountain, Edward Miller, Selen Basol, Richard A. Newcombe, Robert Wang, Jakob Julian Engel, Tomas Hodan
2024	J	`jnl`	HOT3D: Hand and Object Tracking in 3D from Egocentric Multi-View Videos. CoRR Prithviraj Banerjee, Sindi Shkodrani, Pierre Moulon, Shreyas Hampali, Shangchen Han, Fan Zhang, Linguang Zhang, Jade Fountain, Edward Miller, Selen Basol, Richard A. Newcombe, Robert Wang, Jakob Julian Engel, Tomas Hodan
2024	J	`jnl`	Introducing HOT3D: An Egocentric Dataset for 3D Hand and Object Tracking. CoRR Prithviraj Banerjee, Sindi Shkodrani, Pierre Moulon, Shreyas Hampali, Fan Zhang, Jade Fountain, Edward Miller, Selen Basol, Richard A. Newcombe, Robert Wang, Jakob Julian Engel, Tomas Hodan
2022	—	`conf`	Identity Preserving Loss for Learned Image Compression. CVPR Workshops Jiuhong Xiao, Lavisha Aggarwal, Prithviraj Banerjee, Manoj Aggarwal, Gérard G. Medioni
2022	J	`jnl`	Identity Preserving Loss for Learned Image Compression. CoRR Jiuhong Xiao, Lavisha Aggarwal, Prithviraj Banerjee, Manoj Aggarwal, Gérard G. Medioni
2014	—	`conf`	Multi-state Discriminative Video Segment Selection for Complex Event Classification. ACCV (5) Prithviraj Banerjee, Ram Nevatia
2014	—	`conf`	Pose Filter Based Hidden-CRF Models for Activity Detection. ECCV (2) Prithviraj Banerjee, Ramakant Nevatia
2012	J	`jnl`	On a Technique for Transparently Empowering Classical Compiler Optimizations on Multithreaded Code. ACM Trans. Program. Lang. Syst. Pramod G. Joisha, Robert S. Schreiber, Prithviraj Banerjee, Hans-Juergen Boehm, Dhruva R. Chakrabarti
2012	B	`conf`	Pose based activity recognition using Multiple Kernel learning. ICPR Prithviraj Banerjee, Ramakant Nevatia
2012	J	`jnl`	Towards a net-zero data center. ACM J. Emerg. Technol. Comput. Syst. Prithviraj Banerjee, Chandrakant D. Patel, Cullen E. Bash, Amip Shah, Martin F. Arlitt
2011	A*	`conf`	A technique for the effective and automatic reuse of classical compiler optimizations on multithreaded code. POPL Pramod G. Joisha, Robert S. Schreiber, Prithviraj Banerjee, Hans-Juergen Boehm, Dhruva R. Chakrabarti
2011	B	`conf`	Learning neighborhood cooccurrence statistics of sparse features for human activity recognition. AVSS Prithviraj Banerjee, Ram Nevatia
2011	A	`conf`	The runtime abort graph and its application to software transactional memory optimization. CGO Dhruva R. Chakrabarti, Prithviraj Banerjee, Hans-Juergen Boehm, Pramod G. Joisha, Robert S. Schreiber
2010	—	`conf`	Accurate person tracking through changing poses for multi-view action recognition. ICVGIP Pradeep Natarajan, Prithviraj Banerjee, Ram Nevatia
2010	B	`conf`	Dynamics Based Trajectory Segmentation for UAV videos. AVSS Prithviraj Banerjee, Ram Nevatia
2009	C	`conf`	An Automated Algorithm to Generate Stream Programs. ISCAS Lei Gao, Gaurav Mittal, David Zaretsky, Dan Schonfeld, Prithviraj Banerjee
2009	—	`conf`	Complete-k-distinguishability for retiming and resynthesis equivalence checking without restricting synthesis. ASP-DAC Nikolaos D. Liveris, Hai Zhou, Prithviraj Banerjee
2009	C	`conf`	Streaming Implementation of the ZLIB Decoder Algorithm on an FPGA. ISCAS David Zaretsky, Gaurav Mittal, Prithviraj Banerjee
2009	A	`conf`	Streaming implementation of a sequential decompression algorithm on an FPGA. FPGA Gaurav Mittal, David Zaretsky, Prithviraj Banerjee
2008	—	`conf`	A dynamic-programming algorithm for reducing the energy consumption of pipelined System-Level streaming applications. ASP-DAC Nikolaos D. Liveris, Hai Zhou, Prithviraj Banerjee
2008	Misc	`conf`	State space abstraction for parameterized self-stabilizing embedded systems. EMSOFT Nikolaos D. Liveris, Hai Zhou, Robert P. Dick, Prithviraj Banerjee
2007	J	`jnl`	A translator system for the MATLAB language. Softw. Pract. Exp. Pramod G. Joisha, Prithviraj Banerjee
2007	J	`jnl`	An Overview of a Compiler for Mapping Software Binaries to Hardware. IEEE Trans. Very Large Scale Integr. Syst. Gaurav Mittal, David Zaretsky, Xiaoyong Tang, Prithviraj Banerjee
2007	J	`jnl`	Low-Power Optimization by Smart Bit-Width Allocation in a SystemC-Based ASIC Design Environment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou
2007	—	`conf`	Retiming for Synchronous Data Flow Graphs. ASP-DAC Nikolaos D. Liveris, Chuan Lin, J. Wang, Hai Zhou, Prithviraj Banerjee
2006	J	`jnl`	An algebraic array shape inference system for MATLAB. ACM Trans. Program. Lang. Syst. Pramod G. Joisha, Prithviraj Banerjee
2006	A	`conf`	Smart bit-width allocation for low power optimization in a systemc based ASIC design environment. DATE Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou
2005	—	`conf`	An Efficient System-Level to RTL Verification Framework for Computation-Intensive Applications. Asian Test Symposium Nikolaos D. Liveris, Hai Zhou, Prithviraj Banerjee
2005	Misc	`conf`	Behavioral Synthesis of Data-Dominated Circuits for Minimal Energy Implementation. VLSI Design Xiaoyong Tang, Tianyi Jiang, Alex K. Jones, Prithviraj Banerjee
2005	J	`jnl`	High-Level Synthesis for Low Power Hardware Implementation of Unscheduled Data-Dominated Circuits. J. Low Power Electron. Xiaoyong Tang, Tianyi Jiang, Alex K. Jones, Prithviraj Banerjee
2005	A*	`conf`	Leakage power optimization with dual-V DAC Xiaoyong Tang, Hai Zhou, Prithviraj Banerjee
2004	A*	`conf`	An algorithm for converting floating-point computations to fixed-point in MATLAB based FPGA design. DAC Sanghamitra Roy, Prithviraj Banerjee
2004	A	`conf`	An algorithm for trading off quantization error with hardware resources for MATLAB based FPGA design. FPGA Sanghamitra Roy, Debjit Sinha, Prithviraj Banerjee
2004	A*	`conf`	Automatic translation of software binaries onto FPGAs. DAC Gaurav Mittal, David Zaretsky, Xiaoyong Tang, Prithviraj Banerjee
2004	—	`conf`	Evaluation of scheduling and allocation algorithms while mapping assembly code onto FPGAs. ACM Great Lakes Symposium on VLSI David Zaretsky, Gaurav Mittal, Xiaoyong Tang, Prithviraj Banerjee
2004	—	`conf`	Handling Data Streams while Compiling C Programs onto Hardware. ISVLSI Rajarshi Mukherjee, Alex K. Jones, Prithviraj Banerjee
2004	A	`conf`	High level area, delay and power estimation for FPGAs. FPGA Tianyi Jiang, Xiaoyong Tang, Prithviraj Banerjee
2004	—	`conf`	Macro-models for high level area and power estimation on FPGAs. ACM Great Lakes Symposium on VLSI Tianyi Jiang, Xiaoyong Tang, Prithviraj Banerjee
2004	J	`jnl`	Overview of a compiler for synthesizing MATLAB programs onto FPGAs. IEEE Trans. Very Large Scale Integr. Syst. Prithviraj Banerjee, Malay Haldar, Anshuman Nayak, Victor Kim, Vikram Saxena, Steven Parkes, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, David Zaretsky, Robert Anderson, Juan Ramon Uribe
2004	Misc	`conf`	Overview of the FREEDOM Compiler for Mapping DSP Software to FPGAs. FCCM David Zaretsky, Gaurav Mittal, Xiaoyong Tang, Prithviraj Banerjee
2004	A	`conf`	Power Aware Interface Synthesis for Bus-Based SoC Design. DATE Nikolaos D. Liveris, Prithviraj Banerjee
2003	J	`jnl`	An Algorithm-Based Error Detection Scheme for the Multigrid Method. IEEE Trans. Computers Amitabh Mishra, Prithviraj Banerjee
2003	Misc	`conf`	An Automated and Power-Aware Framework for Utilization of IP Cores in Hardware Generated from C Descriptions Targeting FPGAs. FCCM Alex K. Jones, Prithviraj Banerjee
2003	A	`conf`	An automated and power-aware framework for utilization of IP cores in hardware generated from C descriptions targeting FPGAs. FPGA Alex K. Jones, Prithviraj Banerjee
2003	Misc	`conf`	Automatic Conversion of Floating Point MATLAB Programs into Fixed Point FPGA Based Hardware Design. FCCM Prithviraj Banerjee, Debabrata Bagchi, Malay Haldar, Anshuman Nayak, Victor Kim, R. Uribe
2003	A	`conf`	Making area-performance tradeoffs at the high level using the AccelFPGA compiler for FPGAs. FPGA Prithviraj Banerjee, Vikram Saxena, Juan Ramon Uribe, Malay Haldar, Anshuman Nayak, Victor Kim, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi, Robert Anderson
2003	J	`jnl`	Reducing False Sharing and Improving Spatial Locality in a Unified Compilation Framework. IEEE Trans. Parallel Distributed Syst. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
2003	A*	`conf`	Static array storage optimization in MATLAB. PLDI Pramod G. Joisha, Prithviraj Banerjee
2003	B	`conf`	The MAGICA Type Inference Engine for MATLAB. CC Pramod G. Joisha, Prithviraj Banerjee
2002	—	`conf`	A Behavioral Synthesis Tool for Exploiting Fine Grain Parallelism in FPGAs. IWDC Prithviraj Banerjee, Malay Haldar, Anshuman Nayak, Victor Kim, Debabrata Bagchi, Satrajit Pal, Nikhil Tripathi
2002	A	`conf`	Accurate Area and Delay Estimators for FPGAs. DATE Anshuman Nayak, Malay Haldar, Alok N. Choudhary, Prithviraj Banerjee
2002	J	`jnl`	Automatic Parallelization of Compiled Event Driven VHDL Simulation. IEEE Trans. Computers Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee
2002	Misc	`conf`	PACT HDL: a C compiler targeting ASICs and FPGAs with power and performance optimizations. CASES Alex K. Jones, Debabrata Bagchi, Satrajit Pal, Xiaoyong Tang, Alok N. Choudhary, Prithviraj Banerjee
2001	J	`jnl`	A Layout-Conscious Iteration Space Transformation Technique. IEEE Trans. Computers Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary, Prithviraj Banerjee
2001	J	`jnl`	A Parallel Implementation of a Fast Multipole-Based 3-D Capacitance Extraction Program on Distributed Memory Multicomputers. J. Parallel Distributed Comput. Yanhong Yuan, Prithviraj Banerjee
2001	A	`conf`	A System for Synthesizing Optimized FPGA Hardware from MATLAB. ICCAD Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee
2001	J	`jnl`	An algorithm for synthesis of large time-constrained heterogeneous adaptive systems. ACM Trans. Design Autom. Electr. Syst. U. Nagaraj Shenoy, Alok N. Choudhary, Prithviraj Banerjee
2001	—	`conf`	Automated synthesis of pipelined designs on FPGAs for signal and image processing applications described in MATLAB. ASP-DAC Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee
2001	—	`conf`	Compiler Optimization of Dynamic Data Distributions for Distributed-Memory Multicomputers. Compiler Optimizations for Scalable Parallel Systems Languages Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee
2001	—	`conf`	Computing Array Shapes in MATLAB. LCPC Pramod G. Joisha, U. Nagaraj Shenoy, Prithviraj Banerjee
2001	—	`conf`	Correctly detecting intrinsic type errors in typeless languages such as MATLAB. APL Pramod G. Joisha, Prithviraj Banerjee
2001	Misc	`conf`	Efficient Synthesis of Array Intensive Computations onto FPGA Based Accelerators. VLSI Design U. Nagaraj Shenoy, Prithviraj Banerjee, Alok N. Choudhary, Mahmut T. Kandemir
2001	Misc	`conf`	Fpga Hardware Synthesis From Matlab. VLSI Design Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee, U. Nagaraj Shenoy
2001	A	`conf`	Global optimization techniques for automatic parallelization of hybrid applications. ICS Dhruva R. Chakrabarti, Prithviraj Banerjee
2001	J	`jnl`	Handling context-sensitive syntactic issues in the design of a front-end for a MATLAB compiler. ACM SIGAPL APL Quote Quad Pramod G. Joisha, Abhay Kanhere, Prithviraj Banerjee, U. Nagaraj Shenoy, Alok N. Choudhary
2001	A	`conf`	Precision and error analysis of MATLAB applications during automated hardware synthesis for FPGAs. DATE Anshuman Nayak, Malay Haldar, Alok N. Choudhary, Prithviraj Banerjee
2001	J	`jnl`	Static Single Assignment Form for Message-Passing Programs. Int. J. Parallel Program. Dhruva R. Chakrabarti, Prithviraj Banerjee
2001	J	`jnl`	Static and Dynamic Locality Optimizations Using Integer Linear Programming. IEEE Trans. Parallel Distributed Syst. Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Eduard Ayguadé
2001	J	`jnl`	The Efficient Computation of Ownership Sets in HPF. IEEE Trans. Parallel Distributed Syst. Pramod G. Joisha, Prithviraj Banerjee
2000	A	`conf`	A C compiler for a processor with a reconfigurable functional unit. FPGA Zhi Alex Ye, U. Nagaraj Shenoy, Prithviraj Banerjee
2000	Misc	`conf`	A MATLAB Compiler for Distributed, Heterogeneous, Reconfigurable Computing Systems. FCCM Prithviraj Banerjee, U. Nagaraj Shenoy, Alok N. Choudhary, Scott Hauck, C. Bachmann, Malay Haldar, Pramod G. Joisha, Alex K. Jones, Abhay Kanhere, Anshuman Nayak, S. Periyacheri, M. Walkden, David Zaretsky
2000	A	`conf`	A Parallel Implementation of a Fast Multipole Based 3-D Capacitance Extraction Program on Distributed Memory Multicomputer. IPDPS Yanhong Yuan, Prithviraj Banerjee
2000	A	`conf`	A System-Level Synthesis Algorithm with Guaranteed Solution Quality. DATE U. Nagaraj Shenoy, Prithviraj Banerjee, Alok N. Choudhary
2000	A*	`conf`	CHIMAERA: a high-performance architecture with a tightly-coupled reconfigurable functional unit. ISCA Zhi Alex Ye, Andreas Moshovos, Scott Hauck, Prithviraj Banerjee
2000	C	`conf`	Comparative Study of Parallel Algorithms for 3-D Capacitance Extraction on Distributed Memory Multiprocessors. ICCD Yanhong Yuan, Prithviraj Banerjee
2000	J	`jnl`	Compiler and Run-Time Support for Exploiting Regularity within Irregular Applications. IEEE Trans. Parallel Distributed Syst. Antonio Lain, Dhruva R. Chakrabarti, Prithviraj Banerjee
2000	—	`conf`	Exploiting Ownership Sets in HPF. LCPC Pramod G. Joisha, Prithviraj Banerjee
2000	B	`conf`	Fine-Grained Parallel VLSI Synthesis for Commercial CAD on a Network of Workstations. ICPP Victor Kim, Prithviraj Banerjee, Kaushik De
2000	B	`conf`	Match Virtual Machine: An Adaptive Runtime System to Execute MATLAB in Parallel. ICPP Malay Haldar, Anshuman Nayak, Abhay Kanhere, Pramod G. Joisha, U. Nagaraj Shenoy, Alok N. Choudhary, Prithviraj Banerjee
2000	J	`jnl`	Minimizing Data and Synchronization Costs in One-Way Communication. IEEE Trans. Parallel Distributed Syst. Mahmut T. Kandemir, Alok N. Choudhary, Prithviraj Banerjee, J. Ramanujam, U. Nagaraj Shenoy
2000	—	`conf`	Parallel algorithms for FPGA placement. ACM Great Lakes Symposium on VLSI Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee
2000	—	`ed.`	Proceedings of the 10th ACM Great Lakes Symposium on VLSI 2000, Chicago, Illinois, USA, March 2-4, 2000 ACM Great Lakes Symposium on VLSI Majid Sarrafzadeh, Prithviraj Banerjee, Kaushik Roy
2000	Misc	`conf`	Scheduling algorithms for automated synthesis of pipelined designs on FPGAs for applications described in MATLAB. CASES Malay Haldar, Anshuman Nayak, Alok N. Choudhary, Prithviraj Banerjee
1999	B	`conf`	A Framework for Interprocedural Locality Optimization Using Both Loop and Data Layout Transformations. ICPP Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
1999	—	`conf`	A Graph Based Framework to Detect Optimal Memory Layouts for Improving Data Locality. IPPS/SPDP Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
1999	J	`jnl`	A Linear Algebra Framework for Automatic Determination of Optimal Data Layouts. IEEE Trans. Parallel Distributed Syst. Mahmut T. Kandemir, Alok N. Choudhary, U. Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam
1999	J	`jnl`	A Matrix-Based Approach to Global Locality Optimization. J. Parallel Distributed Comput. Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
1999	—	`conf`	A Novel Compilation Framework for Supporting Semi-Regular Distributions in Hybrid Applications. IPPS/SPDP Dhruva R. Chakrabarti, Prithviraj Banerjee
1999	Misc	`conf`	A Parallel 3-D Capacitance Extraction Program. HiPC Yanhong Yuan, Prithviraj Banerjee
1999	J	`jnl`	A Parallel Circuit-Partitioned Algorithm for Timing-Driven Standard Cell Placement. J. Parallel Distributed Comput. John A. Chandy, Prithviraj Banerjee
1999	J	`jnl`	A global communication optimization technique based on data-flow analysis and linear algebra. ACM Trans. Program. Lang. Syst. Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, U. Nagaraj Shenoy
1999	—	`conf`	Accurate Data and Context Management in Message-Passing Programs. LCPC Dhruva R. Chakrabarti, Prithviraj Banerjee
1999	—	`conf`	An Algorithm Based Error Detection Scheme for the Multigrid Algorithm. FTCS Amitabh Mishra, Prithviraj Banerjee
1999	A*	`conf`	An Approxmimate Algorithm for Delay-Constraint Technology Mapping. DAC Sumit Roy, Krishna P. Belkhale, Prithviraj Banerjee
1999	—	`conf`	An Incremental Floorplanner. Great Lakes Symposium on VLSI Jim E. Crenshaw, Majid Sarrafzadeh, Prithviraj Banerjee, Pradeep Prabhakaran
1999	A	`conf`	An integer linear programming approach for optimizing cache locality. International Conference on Supercomputing Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, Eduard Ayguadé
1999	Misc	`ed.`	High Performance Computing - HiPC'99, 6th International Conference, Calcutta, India, December 17-20, 1999, Proceedings HiPC Prithviraj Banerjee, Viktor K. Prasanna, Bhabani P. Sinha
1999	—	`conf`	ICE: Incremental 3-Dimensional Capacitance and Resistance Extraction for an Iterative Design Environment. Great Lakes Symposium on VLSI Yanhong Yuan, Prithviraj Banerjee
1999	—	`conf`	Improving Locality Using a Graph-Based Technique for Detecting Memory Layouts of Arrays. PP Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
1999	—	`conf`	Incremental capacitance extraction and its application to iterative timing-driven detailed routing. ISPD Yanhong Yuan, Prithviraj Banerjee
1999	—	`conf`	On Reducing False Sharing while Improving Locality on Shared Memory Multiprocessors. IEEE PACT Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
1999	—	`conf`	PARADIGM (version 2.0): A New HPF Compilation System. IPPS/SPDP Pramod G. Joisha, Prithviraj Banerjee
1999	J	`jnl`	Parallel Algorithms for Force Directed Scheduling of Flattened and Hierarchical Signal Flow Graphs. IEEE Trans. Computers Pradeep Prabhakaran, Prithviraj Banerjee
1999	—	`conf`	Parallel construction algorithms for BDDs. ISCAS (1) Jer-Sheng Chen, Prithviraj Banerjee
1999	J	`jnl`	Placement with Incomplete Data. VLSI Design Maogang Wang, Prithviraj Banerjee, Majid Sarrafzadeh
1999	Misc	`conf`	Simultaneous Scheduling, Binding and Floorplanning for Interconnect Power Optimization. VLSI Design Pradeep Prabhakaran, Prithviraj Banerjee, Jim E. Crenshaw, Majid Sarrafzadeh
1998	—	`conf`	A Generalized Framework for Global Communication Optimization. IPPS/SPDP Mahmut T. Kandemir, Prithviraj Banerjee, Alok N. Choudhary, J. Ramanujam, U. Nagaraj Shenoy
1998	A	`conf`	A Hyperplane Based Approach for Optimizing Spatial Locality in Loop Nests. International Conference on Supercomputing Mahmut T. Kandemir, Alok N. Choudhary, U. Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam
1998	—	`conf`	A Loop Transformation Algorithm Based on Explicit Data Layout Representation for Optimizing Locality. LCPC Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary, Prithviraj Banerjee
1998	—	`conf`	A Matrix-Based Approach to the Global Locality Optimization Problem. IEEE PACT Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
1998	J	`jnl`	A Parallel Algorithm for State Assignment of Finite State Machines. IEEE Trans. Computers Gagan Hasteer, Prithviraj Banerjee
1998	B	`conf`	A Parallel Algorithm for Timing-driven Global Routing for Standard Cells. ICPP Zhaoyun Xing, Prithviraj Banerjee
1998	C	`conf`	A low-power logic optimization methodology based on a fast power-driven mapping. ICCD Sumit Roy, Harm Arts, Prithviraj Banerjee
1998	—	`conf`	A parallel algorithm for zero skew clock tree routing. ISPD Zhaoyun Xing, Prithviraj Banerjee
1998	A	`conf`	An Efficient Uniform Run-time Scheme for Mixed Regular-irregular Applications. International Conference on Supercomputing Dhruva R. Chakrabarti, U. Nagaraj Shenoy, Alok N. Choudhary, Prithviraj Banerjee
1998	A*	`conf`	An Implicit Algorithm for Finding Steady States and its Application to FSM Verification. DAC Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee
1998	J	`jnl`	Efficient equivalence checking of multi-phase designs using phase abstraction and retiming. ACM Trans. Design Autom. Electr. Syst. Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee
1998	A	`conf`	Efficient equivalence checking of multi-phase designs using retiming. ICCAD Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee
1998	—	`conf`	Enhancing Spatial Locality via Data Layout Optimizations. Euro-Par Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, U. Nagaraj Shenoy, Prithviraj Banerjee
1998	—	`conf`	Evaluation of Compiler and Runtime Library Approaches for Supporting Parallel Regular Applications. IPPS/SPDP Dhruva R. Chakrabarti, Prithviraj Banerjee, Antonio Lain
1998	A*	`conf`	Improving Locality Using Loop and Data Transformations in an Integrated Framework. MICRO Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanujam, Prithviraj Banerjee
1998	B	`conf`	Minimizing Data and Synchronization Costs in One-Way Communication. ICPP Mahmut T. Kandemir, U. Nagaraj Shenoy, Prithviraj Banerjee, J. Ramanujam, Alok N. Choudhary
1998	A*	`conf`	Parallel Algorithms for Power Estimation. DAC Victor Kim, Prithviraj Banerjee
1998	A	`conf`	Parallel Compiled Event Driven VHDL Simulation. International Conference on Supercomputing Venkatram Krishnaswamy, Prithviraj Banerjee
1998	Misc	`conf`	Partitioning sequential circuits for low power. VLSI Design Sumit Roy, Prithviraj Banerjee, Majid Sarrafzadeh
1998	A*	`conf`	Potential-NRG: Placement with Incomplete Data. DAC Maogang Wang, Prithviraj Banerjee, Majid Sarrafzadeh
1998	A	`conf`	PowerDrive: a fast, canonical POWER estimator for DRIVing synthEsis. ICCAD Sumit Roy, Harm Arts, Prithviraj Banerjee
1998	A	`conf`	PowerShake: A Low Power Driven Clustering and Factoring Methodology for Boolean Expressions. DATE Sumit Roy, Harm Arts, Prithviraj Banerjee
1998	Misc	`conf`	Simultaneous Scheduling, Binding and Floorplanning in High-level Synthesis. VLSI Design Pradeep Prabhakaran, Prithviraj Banerjee
1998	Misc	`conf`	WADE: a Web-based automated parallel CAD environment. HiPC Dhruva R. Chakrabarti, Pramod G. Joisha, John A. Chandy, Krishnaswamy Krishnaswamy, Venkatram Krishnaswamy, Prithviraj Banerjee
1997	—	`conf`	A Comparison of Parallel Approaches for Algebraic Factorization in Logic Synthesis. IPPS Sumit Roy, Prithviraj Banerjee
1997	J	`jnl`	A Framework for Exploiting Task and Data Parallelism on Distributed Memory Multicomputers. IEEE Trans. Parallel Distributed Syst. Shankar Ramaswamy, Sachin S. Sapatnekar, Prithviraj Banerjee
1997	C	`conf`	A Parallel Circuit-Partitioned Algorithm for Timing Driven Cell Placement. ICCD John A. Chandy, Prithviraj Banerjee
1997	—	`conf`	A procedure for software synthesis from VHDL models. ASP-DAC Venkatram Krishnaswamy, Rajesh Gupta, Prithviraj Banerjee
1997	A*	`conf`	An Efficient Assertion Checker for Combinational Properties. DAC Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee
1997	J	`jnl`	An evaluation of parallel simulated annealing strategies with application to standard cell placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. John A. Chandy, Sungho Kim, Balkrishna Ramkumar, Steven Parkes, Prithviraj Banerjee
1997	—	`conf`	Asynchronous Parallel Algorithms for Test Set Partitioned Fault Simulation. Workshop on Parallel and Distributed Simulation Dilip Krishnaswamy, Prithviraj Banerjee, Elizabeth M. Rudnick, Janak H. Patel
1997	B	`conf`	Exploiting task and data parallelism in parallel Hough and Radon transforms. ICPP Dilip Krishnaswamy, Prithviraj Banerjee
1997	J	`jnl`	Implications of VHDL timing models on simulation and software synthesis. J. Syst. Archit. Venkatram Krishnaswamy, Rajesh Gupta, Prithviraj Banerjee
1997	B	`conf`	Load Balancing and Workload Minimization Of Overlapping Parallel Tasks. ICPP Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee
1997	Misc	`conf`	Parallel Genetic Algorithms for Simulation-Based Sequential Circuit Test Generation. VLSI Design Dilip Krishnaswamy, Michael S. Hsiao, Vikram Saxena, Elizabeth M. Rudnick, Janak H. Patel, Prithviraj Banerjee
1997	—	`conf`	Parallel Global Routing Algorithms for Standard Cells. IPPS Zhaoyun Xing, John A. Chandy, Prithviraj Banerjee
1997	A	`conf`	Performance Evaluation of Message-Driven Parallel VLSI CAD Applications on General Purpose Multiprocessors. International Conference on Supercomputing John G. Holm, John A. Chandy, Steven Parkes, Sumit Roy, Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee
1997	—	`conf`	Performance Evaluation of a C++ Library Based Multithreaded System. HICSS (1) John G. Holm, Steven Parkes, Prithviraj Banerjee
1997	J	`jnl`	ProperTEST: a portable parallel test generator for sequential circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Balkrishna Ramkumar, Prithviraj Banerjee
1997	Misc	`conf`	SPITFIRE: scalable parallel algorithms for test set partitioned fault simulation. VTS Dilip Krishnaswamy, Elizabeth M. Rudnick, Janak H. Patel, Prithviraj Banerjee
1997	Misc	`conf`	Simulated Annealing Based Parallel State Assignment of Finite State Machines. VLSI Design Gagan Hasteer, Prithviraj Banerjee
1997	J	`jnl`	Simulated Annealing Based Parallel State Assignment of Finite State Machines. J. Parallel Distributed Comput. Gagan Hasteer, Prithviraj Banerjee
1996	J	`jnl`	A New Error Analysis Based Method for Tolerance Computation for Algorithm-Based Checks. IEEE Trans. Computers Amber Roy-Chowdhury, Prithviraj Banerjee
1996	—	`conf`	A Parallel Algorithm for State Assignment of Finite State Machines. ICPP, Vol. 2 Gagan Hasteer, Prithviraj Banerjee
1996	—	`conf`	A Parallel Algorithm for the Technology Mapping of LUT-Based FPGAs. Euro-Par, Vol. I Vamsi Boppana, Prashant Saxena, Prithviraj Banerjee, W. Kent Fuchs, C. L. Liu
1996	—	`conf`	Actor Based Parallel VHDL Simulation Using Time Warp. Workshop on Parallel and Distributed Simulation Venkatram Krishnaswamy, Prithviraj Banerjee
1996	J	`jnl`	Algorithm-Based Error Detection Schemes for Iterative Solution of Partial Differential Equations. IEEE Trans. Computers Amber Roy-Chowdhury, Nikolaos Bellas, Prithviraj Banerjee
1996	J	`jnl`	Algorithm-Based Fault Location and Recovery for Matrix Computations on Multiprocessor Systems. IEEE Trans. Computers Amber Roy-Chowdhury, Prithviraj Banerjee
1996	A	`conf`	Compiler Support for Hybrid Irregular Accesses on Multicomputers. International Conference on Supercomputing Antonio Lain, Prithviraj Banerjee
1996	—	`conf`	Compiler Support for Privatization on Distributed-Memory Machines. ICPP, Vol. 3 Daniel J. Palermo, Ernesto Su, Eugene W. Hodges IV, Prithviraj Banerjee
1996	—	`conf`	Compiler-Assisted Generation of Error-Detecting Parallel Programs. FTCS Amber Roy-Chowdhury, Prithviraj Banerjee
1996	—	`conf`	Compiling MATLAB Programs to ScaLAPACK: Exploiting Task and Data Parallelism. IPPS Shankar Ramaswamy, Eugene W. Hodges IV, Prithviraj Banerjee
1996	—	`conf`	Distributed Object Oriented Data Structures and Algorithms for VLSI CAD. IRREGULAR John A. Chandy, Steven Parkes, Prithviraj Banerjee
1996	J	`jnl`	Dynamic Data Partitioning for Distributed-Memory Multicomputers. J. Parallel Distributed Comput. Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee
1996	J	`jnl`	Efficient Techniques for the Analysis of Algorithm-Based Fault Tolerance (ABFT) Schemes. IEEE Trans. Computers V. S. S. Nair, Jacob A. Abraham, Prithviraj Banerjee
1996	—	`conf`	Integrating task and data parallelism in an irregular application: a case study. SPDP Ky McPherson, Prithviraj Banerjee
1996	—	`conf`	Interprocedural Array Redistribution Data-Flow Analysis. LCPC Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee
1996	J	`jnl`	Optimizations for Efficient Array Redistribution on Distributed Memory Multicomputers. J. Parallel Distributed Comput. Shankar Ramaswamy, Barbara Simons, Prithviraj Banerjee
1996	C	`conf`	Parallel Algorithms for Force Directed Scheduling of Flattened and Hierarchical Signal Flow Graphs. ICCD Pradeep Prabhakaran, Prithviraj Banerjee
1996	J	`jnl`	Parallel Algorithms for VLSI Layout Verification. J. Parallel Distributed Comput. Ky MacPherson, Prithviraj Banerjee
1996	Misc	`conf`	Parallel simulated annealing strategies for VLSI cell placement. VLSI Design John A. Chandy, Prithviraj Banerjee
1995	C	`conf`	A parallel algorithm for fault simulation based on PROOFS . ICCD Steven Parkes, Prithviraj Banerjee, Janak H. Patel
1995	A	`conf`	Advanced Compilation Techniques in the PARADIGM Compiler for Distributed-memory Multicomputers. International Conference on Supercomputing Ernesto Su, Antonio Lain, Shankar Ramaswamy, Daniel J. Palermo, Eugene W. Hodges IV, Prithviraj Banerjee
1995	—	`conf`	Automatic Selection of Dynamic Data Partitioning Schemes for Distributed-Memory Multicomputers. LCPC Daniel J. Palermo, Prithviraj Banerjee
1995	—	`conf`	Exploiting spatial regularity in irregular iterative applications. IPPS Antonio Lain, Prithviraj Banerjee
1995	—	`conf`	Parallel algorithms for logic synthesis using the MIS approach. IPPS Kaushik De, John A. Chandy, Sumit Roy, Steven Parkes, Prithviraj Banerjee
1995	—	`ed.`	Proceedings of the 1995 International Conference on Parallel Processing, Urbana-Champain, Illinois, USA, August 14-18, 1995. Volume I: Architecture. ICPP (1) Prithviraj Banerjee
1995	J	`jnl`	Sequential circuit testability enhancement using a nonscan approach. IEEE Trans. Very Large Scale Integr. Syst. Elizabeth M. Rudnick, Vivek Chickermane, Prithviraj Banerjee, Janak H. Patel
1995	J	`jnl`	Simultaneous Allocation and Scheduling Using Convex Programming Techniques. Parallel Process. Lett. Shankar Ramaswamy, Prithviraj Banerjee
1995	—	`conf`	Software Schemes of Reconfiguration and Recovery in Distributed Memory Multicomputers Using the Actor Model. FTCS Michael Peercy, Prithviraj Banerjee
1995	J	`jnl`	The Paradigm Compiler for Distributed-Memory Multicomputers. Computer Prithviraj Banerjee, John A. Chandy, Manish Gupta, Eugene W. Hodges IV, John G. Holm, Antonio Lain, Daniel J. Palermo, Shankar Ramaswamy, Ernesto Su
1994	—	`conf`	A Convex Programming Approach for Exploiting Data and Functional Parallelism on Distributed Memory Multicomputers. ICPP (2) Shankar Ramaswamy, Sachin S. Sapatnekar, Prithviraj Banerjee
1994	A	`conf`	A library-based approach to portable, parallel, object-oriented programming: interface, implementation, and application. SC Steven Parkes, John A. Chandy, Prithviraj Banerjee
1994	J	`jnl`	A portable parallel algorithm for logic synthesis using transduction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Kaushik De, Balkrishna Ramkumar, Prithviraj Banerjee
1994	—	`conf`	Algorithm-Based Fault Location and Recovery for Matrix Computations. FTCS Amber Roy-Chowdhury, Prithviraj Banerjee
1994	—	`conf`	Communication Optimizations Used in the PARADIGM Compiler for Distributed Memory Multicomputers. ICPP (2) Daniel J. Palermo, Ernesto Su, John A. Chandy, Prithviraj Banerjee
1994	J	`jnl`	Design and Evaluation of Hardware Strategies for Reconfiguring Hypercubes and Meshes Under Faults. IEEE Trans. Computers Prithviraj Banerjee, Michael Peercy
1994	—	`conf`	Parallel Logic Synthesis Using Partitioning. ICPP (3) Kaushik De, Prithviraj Banerjee
1994	—	`book`	Parallel algorithms for VLSI computer-aided design. Prithviraj Banerjee
1994	—	`conf`	Processor Tagged Descriptors: A Data Structure for Compiling for Distributed-Memory Multicomputers. IFIP PACT Ernesto Su, Daniel J. Palermo, Prithviraj Banerjee
1994	J	`jnl`	ProperCAD: A portable object-oriented parallel environment for VLSI CAD. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Balkrishna Ramkumar, Prithviraj Banerjee
1994	A*	`conf`	ProperHITEC: A Portable, Parallel, Object-Oriented Approach to Sequential Test Generation. DAC Steven Parkes, Prithviraj Banerjee, Janak H. Patel
1994	—	`conf`	ProperPLACE: A Portable Parallel Algorithm for Standard Cell Placement. IPPS Sungho Kim, Prithviraj Banerjee, Balkrishna Ramkumar, Steven Parkes, John A. Chandy
1994	J	`jnl`	RSYN: a system for automated synthesis of reliable multilevel circuits. IEEE Trans. Very Large Scale Integr. Syst. Kaushik De, Chitra Natarajan, Devi Nair, Prithviraj Banerjee
1994	A	`conf`	Techniques to overlap computation and communication in irregular iterative applications. International Conference on Supercomputing Antonio Lain, Prithviraj Banerjee
1993	—	`conf`	A Fault-Tolerant Parallel Algorithm for Iterative Solution of the Laplace Equation. ICPP (3) Amber Roy-Chowdhury, Prithviraj Banerjee
1993	—	`conf`	A Portable Parallel Algorithm for VLSI Circuit Extraction. IPPS Balkrishna Ramkumar, Prithviraj Banerjee
1993	Misc	`conf`	A Shared Memory Parallel Algorithm for Logic Synthesis. VLSI Design Chieng-Fai Lim, Prithviraj Banerjee, Kaushik De, Saburo Muroga
1993	—	`ch.`	A Survey of Parallel Algorithms for VLSI cell Placement. Algorithmic Aspects of VLSI Layout Prithviraj Banerjee
1993	—	`conf`	Automating Parallelization of Regular Computations for Distributed-Memory. ICPP (2) Ernesto Su, Daniel J. Palermo, Prithviraj Banerjee
1993	J	`jnl`	Design and Evaluation of Gracefully Degradable Disk Arrays. J. Parallel Distributed Comput. A. L. Narasimha Reddy, John A. Chandy, Prithviraj Banerjee
1993	J	`jnl`	Fault tolerant VLSI systems. Proc. IEEE Michael Peercy, Prithviraj Banerjee
1993	A*	`conf`	Non-Scan Design-for-Testability Techniques for Sequential Circuits. DAC Vivek Chickermane, Elizabeth M. Rudnick, Prithviraj Banerjee, Janak H. Patel
1993	A	`conf`	PARADIGM: A Compiler for Automatic Data Distribution on Multicomputers. International Conference on Supercomputing Manish Gupta, Prithviraj Banerjee
1993	J	`jnl`	PREST: a system for logic partitioning and resynthesis for testability. IEEE Trans. Very Large Scale Integr. Syst. Kaushik De, Prithviraj Banerjee
1993	—	`conf`	Processor Allocation and Scheduling of Macro Dataflow Graphs on Distributed Memory Multicomputers by the PARADIGM Compiler. ICPP (2) Shankar Ramaswamy, Prithviraj Banerjee
1993	—	`conf`	Reliability Evalutaion of Disk Array Architectures. ICPP (1) John A. Chandy, Prithviraj Banerjee
1993	J	`jnl`	Task scheduling for exploiting parallelism and hierarchy in VLSI CAD algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Krishna P. Belkhale, Randall J. Brouwer, Prithviraj Banerjee
1993	—	`conf`	Tolerance Determination for Algorithm-Based Checks Using Simplified Error Analysis Techniques. FTCS Amber Roy-Chowdhury, Prithviraj Banerjee
1992	A	`conf`	A methodology for high-level synthesis of communication on multicomputers. ICS Manish Gupta, Prithviraj Banerjee
1992	A*	`conf`	APT: An Area-Performance-Testability Driven Placement Algorithm. DAC Sungho Kim, Prithviraj Banerjee, Vivek Chickermane, Janak H. Patel
1992	—	`conf`	Compile-Time Estimation of Communication Costs on Multicomputers. IPPS Manish Gupta, Prithviraj Banerjee
1992	J	`jnl`	Demonstration of Automatic Data Partitioning Techniques for Parallelizing Compilers on Multicomputers. IEEE Trans. Parallel Distributed Syst. Manish Gupta, Prithviraj Banerjee
1992	—	`conf`	Design and Analysis of Software Reconfiguration Strategies for Hypercube Multicomputers under Multiple Faults. FTCS Michael Peercy, Prithviraj Banerjee
1992	—	`conf`	Low Cost Concurrent Error Detection in a VLIW Architecture Using Replicated Instructions. ICPP (1) John G. Holm, Prithviraj Banerjee
1992	J	`jnl`	Parallel Algorithms for Geometric Connected Component Labeling on a Hypercube Multiprocessor. IEEE Trans. Computers Krishna P. Belkhale, Prithviraj Banerjee
1992	J	`jnl`	Performance Measurement and Trace Driven Simulation of Parallel CAD and Numeric Applications on a Hypercube Multicomputer. IEEE Trans. Parallel Distributed Syst. Jiun-Ming Hsu, Prithviraj Banerjee
1992	A	`conf`	Portable parallel test generation for sequential circuits. ICCAD Balkrishna Ramkumar, Prithviraj Banerjee
1992	C	`conf`	ProperCAd: A Portable Object-Oriented Parallel Environment for VLSI CAD. ICCD Balkrishna Ramkumar, Prithviraj Banerjee
1992	A	`conf`	ProperSYN: a portable parallel algorithm for logic synthesis. ICCAD Kaushik De, Balkrishna Ramkumar, Prithviraj Banerjee
1992	J	`jnl`	Reconfiguration Strategies for VLSI Processor Arrays and Trees Using a Modified Diogenes Approach. IEEE Trans. Computers Krishna P. Belkhale, Prithviraj Banerjee
1991	A	`conf`	A Layout Driven Design for Testability Technique for MOS VLSI Circuits. ITC Sungho Kim, Prithviraj Banerjee, Srinivas Patil
1991	—	`conf`	A Scheduling Algorithm for Parallelizable Dependent Tasks. IPPS Krishna P. Belkhale, Prithviraj Banerjee
1991	—	`conf`	CRAFT: Compiler-Assisted Algorithm-Based Fault Tolerance in Distributed Memory Multiprocessors. ICPP (1) Vijay Balasubramanian, Prithviraj Banerjee
1991	—	`conf`	Compiler Support for Parallel I/O Operations. ICPP (2) A. L. Narasimha Reddy, Prithviraj Banerjee, D. K. Chen
1991	J	`jnl`	Empirical and theoretical studies of the simulated evolution method applied to standard cell placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ralph-Michael Kling, Prithviraj Banerjee
1991	—	`conf`	Functional abstraction of logic gates for switch-level simulation. EURO-DAC David T. Blaauw, Daniel G. Saab, Prithviraj Banerjee, Jacob A. Abraham
1991	—	`conf`	Gracefully Degradable Disk Arrays. FTCS A. L. Narasimha Reddy, Prithviraj Banerjee
1991	A	`conf`	Logic Partitioning and Resynthesis for Testability. ITC Kaushik De, Prithviraj Banerjee
1991	A*	`conf`	Parallel Test Generation for Sequential Circuits on General-Purpose Multiprocessors. DAC Srinivas Patil, Prithviraj Banerjee, Janak H. Patel
1991	J	`jnl`	Parallel algorithms for VLSI circuit extraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Krishna P. Belkhale, Prithviraj Banerjee
1991	—	`conf`	Performance Evaluation of Hardware Support for Message Passing in Distributed Memory Multicomputers. ICPP (1) Jiun-Ming Hsu, Prithviraj Banerjee
1991	J	`jnl`	Performance trade-offs in a parallel test generation/fault simulation environment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Patil, Prithviraj Banerjee
1990	A	`conf`	A Parallel Algorithm for Hierarchical Circuit Extraction. ICCAD Krishna P. Belkhale, Prithviraj Banerjee
1990	A*	`conf`	A Study of I/O Behavior of Perfect Benchmarks on a Multiprocessor. ISCA A. L. Narasimha Reddy, Prithviraj Banerjee
1990	A	`conf`	A message passing coprocessor for distributed memory multicomputers. SC Jiun-Ming Hsu, Prithviraj Banerjee
1990	J	`jnl`	A parallel branch and bound algorithm for test generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Srinivas Patil, Prithviraj Banerjee
1990	J	`jnl`	Algorithm-Based Fault Tolerance on a Hypercube Multiprocessor. IEEE Trans. Computers Prithviraj Banerjee, Joseph T. Rahmeh, Craig B. Stunkel, V. S. S. Nair, Kaushik Roy, Vijay Balasubramanian, Jacob A. Abraham
1990	J	`jnl`	Algorithms-Based Fault Detection for Signal Processing Applications. IEEE Trans. Computers A. L. Narasimha Reddy, Prithviraj Banerjee
1990	—	`conf`	An Approximate Algorithm for the Partitionable Independent Task Scheduling Problem. ICPP (1) Krishna P. Belkhale, Prithviraj Banerjee
1990	C	`conf`	Automatic classification of node types in switch-level descriptions. ICCD David T. Blaauw, Prithviraj Banerjee, Jacob A. Abraham
1990	J	`jnl`	Compiler-Assisted Synthesis of Algorithm-Based Checking in Multiprocessors. IEEE Trans. Computers Vijay Balasubramanian, Prithviraj Banerjee
1990	J	`jnl`	Design, Analysis, and Simulation of I/O Architectures for Hypercube. IEEE Trans. Parallel Distributed Syst. A. L. Narasimha Reddy, Prithviraj Banerjee
1990	—	`conf`	Distributed algorithms for shortest-path, deadlock-free routing and broadcasting in arbitrarily faulty hypercubes. FTCS Michael Peercy, Prithviraj Banerjee
1990	—	`conf`	Geometric Connected Component Labeling on Distributed Memory Multicomputers. ICPP (3) Krishna P. Belkhale, Prithviraj Banerjee
1990	—	`conf`	Hardware Support for Message Routing in a Distributed Memory Multicomputer. ICPP (1) Jiun-Ming Hsu, Prithviraj Banerjee
1990	A*	`conf`	Optimization by Simulated Evolution with Applications to Standard Cell Placement. DAC Ralph-Michael Kling, Prithviraj Banerjee
1990	A*	`conf`	PHIGURE: A Parallel Hierarchical Global Router. DAC Randall J. Brouwer, Prithviraj Banerjee
1990	J	`jnl`	Parallel Simulated Annealing Algorithms for Cell Placement on Hypercube Multiprocessors. IEEE Trans. Parallel Distributed Syst. Prithviraj Banerjee, Mark Howard Jones, Jeff S. Sargent
1990	A*	`conf`	Performance Measurement and Trace Driven Simulation of Parallel CAD and Numeric Applications on a Hypercube Multicomputer. ISCA Jiun-Ming Hsu, Prithviraj Banerjee
1990	A	`conf`	SNEL: A Switch-Level Simulator Using Multiple Levels of Functional Abstraction. ICCAD David T. Blaauw, Robert B. Mueller-Thuns, Daniel G. Saab, Prithviraj Banerjee, Jacob A. Abraham
1990	—	`conf`	Strategies for reconfiguring hypercubes under faults. FTCS Prithviraj Banerjee
1990	J	`jnl`	Tradeoffs in the Design of Efficient Algorithm-Based Error Detection Schemes for Hypercube Multiprocessors. IEEE Trans. Software Eng. Vijay Balasubramanian, Prithviraj Banerjee
1989	A*	`conf`	A Parallel Branch and Bound Algorithm for Test Generation. DAC Srinivas Patil, Prithviraj Banerjee
1989	A*	`conf`	A Parallel Row-based Algorithm for Standard Cell Placement with Integrated Error Control. DAC Jeff S. Sargent, Prithviraj Banerjee
1989	J	`jnl`	A study parallel disk organizations. SIGARCH Comput. Archit. News A. L. Narasimha Reddy, Prithviraj Banerjee
1989	—	`conf`	Algorithm-Based Fault Tolerance for Adaptive Least Squares Lattice Filtering on a Hypercube Multiprocessor. ICPP (3) Robert B. Mueller-Thuns, David McFarland, Prithviraj Banerjee
1989	A	`conf`	Algorithm-based Error Detection for Signal Processing Applications on a Hypercube Multiprocessor. RTSS Vijay Balasubramanian, Prithviraj Banerjee
1989	J	`jnl`	An Evaluation of Multiple-Disk I/O Systems. IEEE Trans. Computers A. L. Narasimha Reddy, Prithviraj Banerjee
1989	A	`conf`	An accurate timing model for fault simulation in MOS circuits. ICCAD Sungho Kim, Prithviraj Banerjee
1989	J	`jnl`	ESp: Placement by simulated evolution. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Ralph-Michael Kling, Prithviraj Banerjee
1989	A	`conf`	Efficient circuit partitioning algorithms for parallel logic simulation. SC Srinivas Patil, Prithviraj Banerjee, Constantine D. Polychronopoulos
1989	A	`conf`	Fault Partitioning Issues in an Integrated Parallel Test Generation/Fault Simulation Environment. ITC Srinivas Patil, Prithviraj Banerjee
1989	A	`conf`	I/O issues for hypercubes. ICS A. L. Narasimha Reddy, Prithviraj Banerjee
1989	A	`conf`	PACE2: an improved parallel VLSI extractor with parameter extraction. ICCAD Krishna P. Belkhale, Prithviraj Banerjee
1989	—	`conf`	Performance Evaluation of Multiple-Disk I/O Systems. ICPP (1) A. L. Narasimha Reddy, Prithviraj Banerjee
1989	J	`jnl`	The Design, Analysis and Simulation of a Fault-Tolerant Interconnection Network Supporting the Fetch-and-Add Primitive. IEEE Trans. Computers Prithviraj Banerjee, Abhijeet Dugar
1988	—	`conf`	A novel approach to system-level fault tolerance in hypercube multiprocessors. C³P Prithviraj Banerjee, Craig B. Stunkel
1988	C	`conf`	A parallel simulated annealing algorithm for channel routing on a hypercube multiprocessor. ICCD Randall J. Brouwer, Prithviraj Banerjee
1988	—	`conf`	An evaluation of system-level fault tolerance on the Intel hypercube multiprocessor. FTCS Prithviraj Banerjee, Joseph T. Rahmeh, Craig B. Stunkel, V. S. S. Nair, Kaushik Roy, Jacob A. Abraham
1988	—	`conf`	I/O Embedding in Hypercubes. ICPP (1) A. L. Narasimha Reddy, Prithviraj Banerjee
1988	J	`jnl`	On the Construction of Communication Networks Satisfying Bounded Fan-In of Service Ports. IEEE Trans. Computers Douglas B. West, Prithviraj Banerjee
1988	A	`conf`	PACE: a parallel VLSI extractor on the Intel hypercube multiprocessor. ICCAD Krishna P. Belkhale, Prithviraj Banerjee
1988	J	`jnl`	The Cubical Ring Connected Cycles: A Fault-Tolerant Parallel Computation Network. IEEE Trans. Computers Prithviraj Banerjee
1987	A*	`conf`	A Fault Secure Dictionary Machine. ICDE A. L. Narasimha Reddy, Prithviraj Banerjee
1987	J	`jnl`	A Fault Tolerant Massively Parallel Processing Architecture. J. Parallel Distributed Comput. Vijay Balasubramanian, Prithviraj Banerjee
1987	A	`conf`	A Fixed Size Array Processor for Computing the Fast Fourier Transform. RTSS Vijay Balasubramanian, Prithviraj Banerjee
1987	A*	`conf`	ESP: A New Standard Cell Placement Package Using Simulated Evolution. DAC Ralph-Michael Kling, Prithviraj Banerjee
1987	J	`jnl`	Fault Tolerance Techniques for Systolic Arrays. Computer Jacob A. Abraham, Prithviraj Banerjee, Chien-Yi Chen, W. Kent Fuchs, Sy-Yen Kuo, A. L. Narasimha Reddy
1987	A*	`conf`	Performance of a Parallel Algorithm for Standard Cell Placement on the Intel Hypercube. DAC Mark Jones, Prithviraj Banerjee
1986	B	`conf`	A Fault-Tolerant Interconnection Network Supporting the Fetch-And-Add Primitive. ICPP Prithviraj Banerjee, Abhijeet Dugar
1986	A	`conf`	A Probabilistic Model of Algorithm-Based Fault Tolerance in Array Processors for Real-Time Systems. RTSS Prithviraj Banerjee, Jacob A. Abraham
1986	J	`jnl`	Bounds on Algorithm-Based Fault Tolerance in Multiple Processor Systems. IEEE Trans. Computers Prithviraj Banerjee, Jacob A. Abraham
1986	B	`conf`	RECBAR : A Reconfigurable Massively Parallel Processing Architecture. ICPP Vijay Balasubramanian, Prithviraj Banerjee
1985	J	`jnl`	A Multivalued Algebra For Modeling Physical Failures in MOS VLSI Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Prithviraj Banerjee, Jacob A. Abraham
1985	—	`—`	A Theory for Algorithm-Based Fault Tolerance in Array Processor Systems Prithviraj Banerjee
1984	J	`jnl`	Characterization and Testing of Physical Failures in MOS Logic Circuits. IEEE Des. Test Prithviraj Banerjee, Jacob A. Abraham
1984	A*	`conf`	Fault-Secure Algorithms for Multiple-Processor Systems. ISCA Prithviraj Banerjee, Jacob A. Abraham
1983	A	`conf`	Generating Tests for Physical Failures in MOS Logic Circuits. ITC Prithviraj Banerjee, Jacob A. Abraham