Praveen Raghavan

132 papers A* 3A 10B 1C 14Misc 8Journal 30Unranked 62

Year	Rank	Type	Title / Venue / Authors
2019	J	`jnl`	A Novel Nondestructive Bit-Line Discharging Scheme for Deep Submicrometer STT-RAMs. IEEE Trans. Emerg. Top. Comput. Behzad Zeinali, Jens Kargaard Madsen, Praveen Raghavan, Farshad Moradi
2018	J	`jnl`	Exploratory design of on-chip power delivery for 14, 10, and 7 nm and beyond FinFET ICs. Integr. Kan Xu, Ravi Patel, Praveen Raghavan, Eby G. Friedman
2017	J	`jnl`	A Smaller, Faster, and More Energy-Efficient Complementary STT-MRAM Cell Uses Three Transistors and a Ground Grid: More Is Actually Less. IEEE Trans. Very Large Scale Integr. Syst. Raf Appeltans, Praveen Raghavan, Gouri Sankar Kar, Arnaud Furnémont, Liesbet Van der Perre, Wim Dehaene
2017	—	`conf`	Dedicated technology threshold voltage tuning for 6T SRAM beyond N7. ICICDT Mohit Kumar Gupta, Pieter Weckx, Stefan Cosemans, Pieter Schuddinck, Rogier Baert, Doyoung Jang, Yasser Sherazi, Praveen Raghavan, Alessio Spessot, Anda Mocuta, Wim Dehaene
2017	—	`conf`	Device circuit and technology co-optimisation for FinFET based 6T SRAM cells beyond N7. ESSDERC Mohit Kumar Gupta, Pieter Weckx, Stefan Cosemans, Pieter Schuddinck, Rogier Baert, Dmitry Yakimets, Doyoung Jang, Yasser Sherazi, Praveen Raghavan, Alessio Spessot, Anda Mocuta, Wim Dehaene
2017	A	`conf`	IR-drop aware Design & technology co-optimization for N5 node with different device and cell height options. ICCAD Luca Mattii, Dragomir Milojevic, Peter Debacker, Yasser Sherazi, Mladen Berekovic, Praveen Raghavan
2017	J	`jnl`	Integral Impact of BTI, PVT Variation, and Workload on SRAM Sense Amplifier. IEEE Trans. Very Large Scale Integr. Syst. Innocent Agbo, Mottaqiallah Taouil, Daniel Kraak, Said Hamdioui, Halil Kukner, Pieter Weckx, Praveen Raghavan, Francky Catthoor
2017	J	`jnl`	Low-leakage sub-threshold 9 T-SRAM cell in 14-nm FinFET technology. Int. J. Circuit Theory Appl. Behzad Zeinali, Jens Kargaard Madsen, Praveen Raghavan, Farshad Moradi
2017	J	`jnl`	MILP-Based Optimization of 2-D Block Masks for Timing-Aware Dummy Segment Removal in Self-Aligned Multiple Patterning Layouts. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. Peter Debacker, Kwangsoo Han, Andrew B. Kahng, Hyein Lee, Praveen Raghavan, Lutong Wang
2017	—	`conf`	Material selection and device design guidelines for two-dimensional materials based TFETs. ESSDERC Tarun Agarwal, Bart Soree, Iuliana P. Radu, Praveen Raghavan, Gianluca Fiori, Marc M. Heyns, Wim Dehaene
2017	C	`conf`	Patterning Aware Design Optimization of Selective Etching in N5 and Beyond. ICCD Yibo Lin, Peter Debacker, Darko Trivkovic, Ryoung-Han Kim, Praveen Raghavan, David Z. Pan
2017	C	`conf`	Ultra-Fast SOT-MRAM Cell with STT Current for Deterministic Switching. ICCD Behzad Zeinali, Jens Kargaard Madsen, Praveen Raghavan, Farshad Moradi
2017	A*	`conf`	Vertical M1 Routing-Aware Detailed Placement for Congestion and Wirelength Reduction in Sub-10nm Nodes. DAC Peter Debacker, Kwangsoo Han, Andrew B. Kahng, Hyein Lee, Praveen Raghavan, Lutong Wang
2017	A	`conf`	Wave pipelining for majority-based beyond-CMOS technologies. DATE Odysseas Zografos, A. De Meester, Eleonora Testa, Mathias Soeken, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Luca Gaetano Amarù, Praveen Raghavan, Francky Catthoor, Rudy Lauwereins
2016	—	`conf`	5nm: Has the time for a device change come? ISQED Praveen Raghavan, Marie Garcia Bardon, Peter Debacker, P. Schuddinck, Doyoung Jang, Rogier Baert, Diederik Verkest, Aaron Voon-Yew Thean
2016	—	`conf`	Capturing True Workload Dependency of BTI-induced Degradation in CPU Components. ACM Great Lakes Symposium on VLSI Dimitrios Stamoulis, Simone Corbetta, Dimitrios Rodopoulos, Pieter Weckx, Peter Debacker, Brett H. Meyer, Ben Kaczer, Praveen Raghavan, Dimitrios Soudris, Francky Catthoor, Zeljko Zilic
2016	C	`conf`	Comparative BTI analysis for various sense amplifier designs. DDECS Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Praveen Raghavan, Francky Catthoor
2016	—	`conf`	Device/system performance modeling of stacked lateral NWFET logic. ISQED Victor Huang, Chenyun Pan, Dmitry Yakimets, Praveen Raghavan, Azad Naeemi
2016	—	`conf`	Effect of material parameters on two-dimensional materials based TFETs: An energy-delay perspective. ESSCIRC Tarun Agarwal, Iuliana P. Radu, Praveen Raghavan, Gianluca Fiori, Aaron Thean, Marc M. Heyns, Wim Dehaene
2016	—	`conf`	Exploratory Power Noise Models of Standard Cell 14, 10, and 7 nm FinFET ICs. ACM Great Lakes Symposium on VLSI Ravi Patel, Kan Xu, Eby G. Friedman, Praveen Raghavan
2016	A	`conf`	How much cost reduction justifies the adoption of monolithic 3D ICs at 7nm node? ICCAD Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Sung Kyu Lim
2016	—	`conf`	Inversion optimization in Majority-Inverter Graphs. NANOARCH Eleonora Testa, Mathias Soeken, Odysseas Zografos, Luca Gaetano Amarù, Praveen Raghavan, Rudy Lauwereins, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
2016	—	`ch.`	Memories for NTC. Near Threshold Computing Tobias Gemmeke, Mohamed M. Sabry, Jan Stuijt, Pieter Schuddinck, Praveen Raghavan, Francky Catthoor
2016	J	`jnl`	Non-volatile spin wave majority gate at the nanoscale. CoRR Odysseas Zografos, Sourav Dutta, Mauricio Manfrini, Adrien Vaysset, Bart Sorée, Azad Naeemi, Praveen Raghavan, Rudy Lauwereins, Iuliana P. Radu
2016	A	`conf`	Physical Design Solutions to Tackle FEOL/BEOL Degradation in Gate-level Monolithic 3D ICs. ISLPED Bon Woong Ku, Peter Debacker, Dragomir Milojevic, Praveen Raghavan, Diederik Verkest, Aaron Thean, Sung Kyu Lim
2016	C	`conf`	Power noise in 14, 10, and 7 nm FinFET CMOS technologies. ISCAS Ravi Patel, Eby G. Friedman, Praveen Raghavan
2016	—	`ed.`	Proceedings of the Workshop on Early Reliability Modeling for Aging and Variability in Silicon Systems, ERMAVSS 2016, co-located with IEEE/ACM Design, Automation and Test in Europe Conference (DATE 2016), Dresden, Germany, March 18, 2016. ERMAVSS@DATE Adrian Evans, Stefano Di Carlo, Praveen Raghavan, Dimitris Gizopoulos
2016	—	`conf`	Quantification of Sense Amplifier Offset Voltage Degradation due to Zero-and Run-Time Variability. ISVLSI Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Praveen Raghavan, Francky Catthoor, Wim Dehaene
2015	J	`jnl`	A Scalable MIMO Detector Processor With Near-ASIC Energy Efficiency. IEEE Trans. Very Large Scale Integr. Syst. Robert Fasthuber, Praveen Raghavan, Liesbet Van der Perre, Francky Catthoor
2015	—	`conf`	Area and routing efficiency of SWD circuits compared to advanced CMOS. ICICDT Odysseas Zografos, Praveen Raghavan, Yasser Sherazi, Adrien Vaysset, Florin Ciubotaru, Bart Soree, Rudy Lauwereins, Iuliana P. Radu, Aaron Thean
2015	J	`jnl`	Array Interleaving - An Energy-Efficient Data Layout Transformation. ACM Trans. Design Autom. Electr. Syst. Namita Sharma, Preeti Ranjan Panda, Francky Catthoor, Praveen Raghavan, Tom Vander Aa
2015	—	`conf`	Characterization and simulation methodology for time-dependent variability in advanced technologies. CICC Pieter Weckx, Ben Kaczer, Praveen Raghavan, Jacopo Franco, Marko Simicic, Philippe J. Roussel, Dimitri Linten, Aaron Thean, Diederik Verkest, Francky Catthoor, Guido Groeseneken
2015	—	`conf`	Comparative analysis of RD and Atomistic trap-based BTI models on SRAM Sense Amplifier. DTIS Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Stefan Cosemans, Pieter Weckx, Praveen Raghavan, Francky Catthoor
2015	J	`jnl`	Comparison of NBTI aging on adder architectures and ring oscillators in the downscaling technology nodes. Microprocess. Microsystems Halil Kükner, Pieter Weckx, Sébastien Morrison, Jacopo Franco, Maria Toledano-Luque, Moonju Cho, Praveen Raghavan, Ben Kaczer, Doyoung Jang, Kenichi Miyaguchi, Marie Garcia Bardon, Francky Catthoor, Liesbet Van der Perre, Rudy Lauwereins, Guido Groeseneken
2015	—	`conf`	Dimensioning for power and performance under 10nm: The limits of FinFETs scaling. ICICDT Marie Garcia Bardon, P. Schuddinck, Praveen Raghavan, Doyoung Jang, Dmitry Yakimets, Abdelkarim Mercha, Diederik Verkest, Aaron Thean
2015	—	`conf`	Holisitic device exploration for 7nm node. CICC Praveen Raghavan, Marie Garcia Bardon, Doyoung Jang, P. Schuddinck, Dmitry Yakimets, Julien Ryckaert, Abdelkarim Mercha, Naoto Horiguchi, Nadine Collaert, Anda Mocuta, Dan Mocuta, Zsolt Tokei, Diederik Verkest, Aaron Thean, An Steegen
2015	—	`conf`	Impact of device and interconnect process variability on clock distribution. ICICDT Nathalie Fievet, Praveen Raghavan, Rogier Baert, Frédéric Robert, Abdelkarim Mercha, Diederik Verkest, Aaron Thean
2015	A	`conf`	Impact of interconnect multiple-patterning variability on SRAMs. DATE Ioannis Karageorgos, Michele Stucchi, Praveen Raghavan, Julien Ryckaert, Zsolt Tokei, Diederik Verkest, Rogier Baert, Sushil Sakhare, Wim Dehaene
2015	Misc	`conf`	Integral impact of BTI and voltage temperature variation on SRAM sense amplifier. VTS Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Halil Kukner, Pieter Weckx, Praveen Raghavan, Francky Catthoor
2015	—	`conf`	Lateral NWFET optimization for beyond 7nm nodes. ICICDT Dmitry Yakimets, Doyoung Jang, Praveen Raghavan, Geert Eneman, Hans Mertens, P. Schuddinck, Arindam Mallik, Marie Garcia Bardon, Nadine Collaert, Abdelkarim Mercha, Diederik Verkest, Aaron Thean, Kristin De Meyer
2015	—	`conf`	Modeling FinFET metal gate stack resistance for 14nm node and beyond. ICICDT Kenichi Miyaguchi, Bertrand Parvais, Lars-Åke Ragnarsson, Piet Wambacq, Praveen Raghavan, Abdelkarim Mercha, Anda Mocuta, Diederik Verkest, Aaron Thean
2015	—	`conf`	STT-MRAM cell design with partial source line planes: improving the trade-off between area and series resistance. NVMSA Raf Appeltans, Stefan Cosemans, Praveen Raghavan, Diederik Verkest, Liesbet Van der Perre, Wim Dehaene
2015	—	`conf`	Sub-Threshold SRAM Design in 14 Nm FinFET Technology with Improved Access Time and Leakage Power. ISVLSI Behzad Zeinali, Jens Kargaard Madsen, Praveen Raghavan, Farshad Moradi
2015	—	`conf`	Technology/circuit co-optimization and benchmarking for graphene interconnects at Sub-10nm technology node. ISQED Chenyun Pan, Praveen Raghavan, Francky Catthoor, Zsolt Tokei, Azad Naeemi
2015	—	`conf`	The defect-centric perspective of device and circuit reliability - From individual defects to circuits. ESSDERC Ben Kaczer, Jacopo Franco, Pieter Weckx, Philippe Roussel, Erik Bury, Moonju Cho, Robin Degraeve, Dimitri Linten, Guido Groeseneken, Halil Kukner, Praveen Raghavan, Francky Catthoor, Gerhard Rzepa, Wolfgang Gös, Tibor Grasser
2014	A	`conf`	Bias Temperature Instability analysis of FinFET based SRAM cells. DATE Seyab Khan, Innocent Agbo, Said Hamdioui, Halil Kukner, Ben Kaczer, Praveen Raghavan, Francky Catthoor
2014	—	`conf`	Circuit and process co-design with vertical gate-all-around nanowire FET technology to extend CMOS scaling for 5nm and beyond technologies. ESSDERC Trong Huynh Bao, Dmitry Yakimets, Julien Ryckaert, Ivan Ciofi, Rogier Baert, Anabela Veloso, Jürgen Bömmels, Nadine Collaert, Philippe Roussel, S. Demuynck, Praveen Raghavan, Abdelkarim Mercha, Zsolt Tokei, Diederik Verkest, Aaron Thean, Piet Wambacq
2014	—	`conf`	Degradation analysis of datapath logic subblocks under NBTI aging in FinFET technology. ISQED Halil Kukner, Moustafa A. Khatib, Sebastien Morrison, Pieter Weckx, Praveen Raghavan, Ben Kaczer, Francky Catthoor, Liesbet Van der Perre, Rudy Lauwereins, Guido Groeseneken
2014	—	`conf`	Design Technology co-optimization for N10. CICC Julien Ryckaert, Praveen Raghavan, Rogier Baert, Marie Garcia Bardon, Mircea Dusa, Arindam Mallik, Sushil Sakhare, Boris Vandewalle, Piet Wambacq, Bharani Chava, Kris Croes, Morin Dehan, Doyoung Jang, Philippe Leray, Tsung-Te Liu, Kenichi Miyaguchi, Bertrand Parvais, Pieter Schuddinck, Philippe Weemaes, Abdelkarim Mercha, Jürgen Bömmels, Naoto Horiguchi, Greg McIntyre, Aaron Thean, Zsolt Tökei, Shaunee Cheng, Diederik Verkest, An Steegen
2014	J	`jnl`	Fast and Accurate Architecture Exploration for High Performance and Low Energy VLIW Data-Path. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Ittetsu Taniguchi, Kohei Aoki, Hiroyuki Tomiyama, Praveen Raghavan, Francky Catthoor, Masahiro Fukui
2014	A	`conf`	Feasibility exploration of NVM based I-cache through MSHR enhancements. DATE Manu Komalan, José Ignacio Gómez Pérez, Christian Tenllado, Praveen Raghavan, Matthias Hartmann, Francky Catthoor
2014	Misc	`conf`	Hard versus Soft Software Defined Radio. VLSID Wim Meeus, Tom Vander Aa, Praveen Raghavan, Dirk Stroobandt
2014	C	`conf`	Majority Logic Synthesis for Spin Wave Technology. DSD Odysseas Zografos, Luca Gaetano Amarù, Pierre-Emmanuel Gaillardon, Praveen Raghavan, Giovanni De Micheli
2014	—	`conf`	Modelling and mitigation of time-zero variability in sub-16nm finfet-based STT-MRAM memories. ACM Great Lakes Symposium on VLSI Matthias Hartmann, Halil Kükner, Prashant Agrawal, Praveen Raghavan, Liesbet Van der Perre, Wim Dehaene
2014	C	`conf`	NBTI Aging on 32-Bit Adders in the Downscaling Planar FET Technology Nodes. DSD Halil Kukner, Pieter Weckx, Sebastien Morrison, Praveen Raghavan, Ben Kaczer, Francky Catthoor, Liesbet Van der Perre, Rudy Lauwereins, Guido Groeseneken
2014	A	`conf`	Resolving the memory bottleneck for single supply near-threshold computing. DATE Tobias Gemmeke, Mohamed M. Sabry, Jan Stuijt, Praveen Raghavan, Francky Catthoor, David Atienza
2014	J	`jnl`	System Level Comparison of 3D Integration Technologies for Future Mobile MPSoC Platform. IEEE Embed. Syst. Lett. Prashant Agrawal, Dragomir Milojevic, Praveen Raghavan, Francky Catthoor, Liesbet Van der Perre, Eric Beyne, Ravi Varadarajan
2014	—	`conf`	System-level assessment and area evaluation of Spin Wave logic circuits. NANOARCH Odysseas Zografos, Praveen Raghavan, Luca Gaetano Amarù, Bart Soree, Rudy Lauwereins, Iuliana P. Radu, Diederik Verkest, Aaron Thean
2013	—	`conf`	A C-programmable baseband processor with inner modem implementations for LTE Cat-4/5/7 and Gbps 80MHz 4×4 802.11ac (invited). GlobalSIP Min Li, Amir Amin, Raf Appeltans, Andy Folens, Ubaid Ahmad, Hans Cappelle, Peter Debacker, Lieven Hollevoet, André Bourdoux, Praveen Raghavan, Antoine Dejonghe, Liesbet Van der Perre
2013	—	`conf`	A processor based multi-standard low-power LDPC engine for multi-Gbps wireless communication. GlobalSIP Meng Li, Frederik Naessens, Min Li, Peter Debacker, Claude Desset, Praveen Raghavan, Antoine Dejonghe, Liesbet Van der Perre
2013	—	`conf`	An area and energy efficient half-row-paralleled layer LDPC decoder for the 802.11AD standard. SiPS Meng Li, Frederik Naessens, Peter Debacker, Praveen Raghavan, Claude Desset, Min Li, Antoine Dejonghe, Liesbet Van der Perre
2013	B	`conf`	Bias temperature instability analysis in SRAM decoder. ETS Seyab Khan, Said Hamdioui, Halil Kukner, Praveen Raghavan, Francky Catthoor
2013	—	`conf`	CMOS low-power transceivers for 60GHz multi Gbit/s communications. CICC Vojkan Vidojkovic, Viki Szortyka, Khaled Khalaf, Giovanni Mangraviti, Bertrand Parvais, Kristof Vaesen, Steven Brebels, Annachiara Spagnolo, Michael Libois, John R. Long, Kuba Raczkowski, Praveen Raghavan, André Bourdoux, Min Li, Charlotte Soens, Vito Giannini, Piet Wambacq
2013	—	`ch.`	Coarse-Grained Reconfigurable Array Architectures. Handbook of Signal Processing Systems Bjorn De Sutter, Praveen Raghavan, Andy Lambrechts
2013	Misc	`conf`	Data memory optimization in LTE downlink. ICASSP Namita Sharma, Tom Vander Aa, Prashant Agrawal, Praveen Raghavan, Preeti Ranjan Panda, Francky Catthoor
2013	J	`jnl`	Design Flow for Silicon Chip Implementing Novel Platform Architecture for Wireless Communication. Int. J. Embed. Real Time Commun. Syst. Prabhat Avasare, Jeroen Declerck, Miguel Glassee, Amir Amin, Erik Umans, Praveen Raghavan, Martin Palkovic
2013	J	`jnl`	Design Space Exploration of Distributed Loop Buffer Architectures with Incompatible Loop-Nest Organisations in Embedded Systems. J. Signal Process. Syst. Antonio Artés, Robert Fasthuber, José Luis Ayala, Praveen Raghavan, Francky Catthoor
2013	A*	`conf`	Early exploration for platform architecture instantiation with multi-mode application partitioning. DAC Prashant Agrawal, Praveen Raghavan, Matthias Hartmann, Namita Sharma, Liesbet Van der Perre, Francky Catthoor
2013	J	`jnl`	Enabling Efficient System Configurations for Dynamic Wireless Applications Using System Scenarios. Int. J. Wirel. Inf. Networks Nikolaos Zompakis, Antonis Papanikolaou, Praveen Raghavan, Dimitrios Soudris, Francky Catthoor
2013	C	`conf`	Energy impact in the design space exploration of loop buffer schemes in embedded systems. VLSI-SoC Antonio Artés, José Luis Ayala, Robert Fasthuber, Praveen Raghavan, Francky Catthoor
2013	J	`jnl`	Impact of duty factor, stress stimuli, gate and drive strength on gate delay degradation with an atomistic trap-based BTI model. Microprocess. Microsystems Halil Kükner, Pieter Weckx, Praveen Raghavan, Ben Kaczer, Francky Catthoor, Liesbet Van der Perre, Rudy Lauwereins, Guido Groeseneken
2013	—	`conf`	Impact of partial resistive defects and Bias Temperature Instability on SRAM decoder reliablity. IDT Seyab Khan, Mottaqiallah Taouil, Said Hamdioui, Halil Kukner, Praveen Raghavan, Francky Catthoor
2013	C	`conf`	Memristor-Based (ReRAM) Data Memory Architecture in ASIP Design. DSD Matthias Hartmann, Praveen Raghavan, Liesbet Van der Perre, Prashant Agrawal, Wim Dehaene
2012	—	`conf`	A flexible platform architecture for Gbps wireless communication. ISSoC Jeroen Declerck, Prabhat Avasare, Miguel Glassee, Amir Amin, Erik Umans, Andy Dewilde, Praveen Raghavan, Martin Palkovic
2012	—	`conf`	Algorithm-Architecture Co-Optimization of Area-Efficient SDR Baseband for Highly Diversified Digital TV Standards. VTC Spring Kiyotaka Kobayashi, Hidekuni Yomo, Min Li, Raf Appeltans, Hans Cappelle, Amir Amin, Aïssa Couvreur, Matthias Hartmann, André Bourdoux, Praveen Raghavan, Antoine Dejonghe, Liesbet Van der Perre
2012	C	`conf`	BTI impact on logical gates in nano-scale CMOS technology. DDECS Seyab Khan, Said Hamdioui, Halil Kukner, Praveen Raghavan, Francky Catthoor
2012	J	`jnl`	DART - a High Level Software-Defined Radio Platform Model for Developing the Run-Time Controller. J. Signal Process. Syst. Martin Palkovic, Jeroen Declerck, Prabhat Avasare, Miguel Glassee, Andy Dewilde, Praveen Raghavan, Antoine Dejonghe, Liesbet Van der Perre
2012	C	`conf`	Impact of Duty Factor, Stress Stimuli, and Gate Drive Strength on Gate Delay Degradation with an Atomistic Trap-Based BTI Model. DSD Halil Kukner, Pieter Weckx, Praveen Raghavan, Ben Kaczer, Francky Catthoor, Liesbet Van der Perre, Rudy Lauwereins, Guido Groeseneken
2012	—	`conf`	Incorporating parameter variations in BTI impact on nano-scale logical gates analysis. DFT Seyab Khan, Said Hamdioui, Halil Kukner, Praveen Raghavan, Francky Catthoor
2012	—	`conf`	Parallel paradigms and run-time management techniques for many-core architectures: the 2PARMA approach. INA-OCMC@HiPEAC Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Ettore Speziale, Diego Melpignano, J. M. Zins, David Siorpaes, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Alexandros Bartzas, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Heinrich Meyr, Junaid Ansari, Petri Mähönen, Bart Vanthournout
2012	C	`conf`	Partitioning and Assignment Exploration for Multiple Modes of IEEE 802.11n Modem on Heterogeneous MPSoC Platforms. DSD Prashant Agrawal, Kanishk Sugand, Martin Palkovic, Praveen Raghavan, Liesbet Van der Perre, Francky Catthoor
2011	—	`conf`	A multi-threaded coarse-grained array processor for wireless baseband. SASP Tom Vander Aa, Martin Palkovic, Matthias Hartmann, Praveen Raghavan, Antoine Dejonghe, Liesbet Van der Perre
2011	C	`conf`	An Energy Aware Design Space Exploration for VLIW AGU Model with Fine Grained Power Gating. DSD Ittetsu Taniguchi, Mitsuya Uchida, Hiroyuki Tomiyama, Masahiro Fukui, Praveen Raghavan, Francky Catthoor
2011	—	`conf`	Automated architecture exploration for low energy reconfigurable AGU. ISOCC Ittetsu Taniguchi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai
2011	Misc	`conf`	Dart - a high level software-defined radio platform model for developing the run-time controller. ICASSP Martin Palkovic, Jeroen Declerck, Praveen Raghavan, Antoine Dejonghe, Liesbet Van der Perre
2011	—	`conf`	Enabling efficient system configurations for dynamic wireless baseband engines using system scenarios. SiPS Nikolaos Zompakis, Antonis Papanikolaou, Praveen Raghavan, Dimitrios Soudris, Francky Catthoor
2011	J	`jnl`	Exploration of Soft-Output MIMO Detector Implementations on Massive Parallel Processors. J. Signal Process. Syst. Robert Fasthuber, Min Li, David Novo, Praveen Raghavan, Liesbet Van der Perre, Francky Catthoor
2011	—	`conf`	High level analysis of trade-offs across different partitioning schemes for wireless applications. SiPS Prashant Agrawal, Robert Fasthuber, Praveen Raghavan, Tom Vander Aa, Ubaid Ahmad, Liesbet Van der Perre, Francky Catthoor
2011	—	`conf`	Invited paper: Parallel programming and run-time resource management framework for many-core platforms: The 2PARMA approach. ReCoSoC Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Ettore Speziale, Diego Melpignano, J. M. Zins, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Iraklis Anagnostopoulos, Alexandros Bartzas, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Junaid Ansari, Petri Mähönen, Bart Vanthournout
2010	—	`conf`	2PARMA: Parallel Paradigms and Run-Time Management Techniques for Many-Core Architectures. ISVLSI Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Andrea Di Biagio, Ettore Speziale, Michele Tartara, David Siorpaes, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Alexandros Bartzas, Sotirios Xydis, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr, Junaid Ansari, Petri Mähönen, Bart Vanthournout
2010	—	`conf`	2PARMA: Parallel Paradigms and Run-time Management Techniques for Many-Core Architectures. ISVLSI (Selected papers) Cristina Silvano, William Fornaciari, Stefano Crespi-Reghizzi, Giovanni Agosta, Gianluca Palermo, Vittorio Zaccaria, Patrick Bellasi, Fabrizio Castro, Simone Corbetta, Andrea Di Biagio, Ettore Speziale, Michele Tartara, Diego Melpignano, J. M. Zins, David Siorpaes, Heiko Hübert, Benno Stabernack, Jens Brandenburg, Martin Palkovic, Praveen Raghavan, Chantal Ykman-Couvreur, Alexandros Bartzas, Sotirios Xydis, Dimitrios Soudris, Torsten Kempf, Gerd Ascheid, Rainer Leupers, Heinrich Meyr, Junaid Ansari, Petri Mähönen, Bart Vanthournout
2010	J	`jnl`	An Efficient Memory Organization for High-ILP Inner Modem Baseband SDR Processors. J. Signal Process. Syst. Bjorn De Sutter, Osman Allam, Praveen Raghavan, Roeland Vandebriel, Hans Cappelle, Tom Vander Aa, Bingfeng Mei
2010	—	`conf`	Architectures for cognitive radio testbeds and demonstrators - An overview. CrownCom Oscar Gustafsson, Kiarash Amiri, Dennis Andersson, Anton Blad, Christian Bonnet, Joseph R. Cavallaro, Jeroen Declerck, Antoine Dejonghe, Patrik Eliardsson, Miguel Glassee, Aawatif Hayar, Lieven Hollevoet, Christopher Hunter, Madhura Joshi, Florian Kaltenberger, Raymond Knopp, Khanh Le, Zoran Miljanic, Patrick Murphy, Frederik Naessens, Navid Nikaein, Dominique Nussbaum, Renaud Pacalet, Praveen Raghavan, Ashutosh Sabharwal, Onkar Sarode, Predrag Spasojevic, Yang Sun, Hugo M. Tullberg, Tom Vander Aa, Liesbet Van der Perre, Michelle Wetterwald, Michael Wu
2010	—	`ch.`	Coarse-Grained Reconfigurable Array Architectures. Handbook of Signal Processing Systems Bjorn De Sutter, Praveen Raghavan, Andy Lambrechts
2010	Misc	`conf`	Compilation techniques for CGRAs: exploring all parallelization approaches. CODES+ISSS Tom Vander Aa, Praveen Raghavan, Scott A. Mahlke, Bjorn De Sutter, Aviral Shrivastava, Frank Hannig
2010	A*	`conf`	Exploiting finite precision information to guide data-flow mapping. DAC David Novo, Min Li, Robert Fasthuber, Praveen Raghavan, Francky Catthoor
2010	J	`jnl`	Future Software-Defined Radio Platforms and Mapping Flows. IEEE Signal Process. Mag. Martin Palkovic, Praveen Raghavan, Min Li, Antoine Dejonghe, Liesbet Van der Perre, Francky Catthoor
2010	—	`conf`	SDR platform for 802.11n and 3-GPP LTE. ICSAMOS Jeroen Declerck, Praveen Raghavan, Frederik Naessens, Tom Vander Aa, Lieven Hollevoet, Antoine Dejonghe, Liesbet Van der Perre
2010	—	`conf`	Ultra low energy Domain Specific Instruction-set Processor for on-line surveillance. SASP David Novo, Angeliki Kritikakou, Praveen Raghavan, Liesbet Van der Perre, Jos Huisken, Francky Catthoor
2009	C	`conf`	Compilation Technique for Loop Overhead Minimization. DSD Nikolas Kroupis, Praveen Raghavan, Murali Jayapala, Francky Catthoor, Dimitrios Soudris
2009	J	`jnl`	Distributed Loop Controller for Multithreading in Unithreaded ILP Architectures. IEEE Trans. Computers Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest
2009	J	`jnl`	EMPIRE: Empirical power/area/timing models for register files. Microprocess. Microsystems Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest
2009	J	`jnl`	Interconnect Exploration for Energy Versus Performance Tradeoffs for Coarse Grained Reconfigurable Architectures. IEEE Trans. Very Large Scale Integr. Syst. Andy Lambrechts, Praveen Raghavan, Murali Jayapala, Bingfeng Mei, Francky Catthoor, Diederik Verkest
2009	J	`jnl`	Locality optimization in a compiler for wireless applications. Des. Autom. Embed. Syst. Javed Absar, Praveen Raghavan, Andy Lambrechts, Min Li, Murali Jayapala, Francky Catthoor
2009	—	`conf`	Novel energy-efficient scalable soft-output SSFE MIMO detector architectures. ICSAMOS Robert Fasthuber, Min Li, David Novo, Praveen Raghavan, Liesbet Van der Perre, Francky Catthoor
2009	—	`conf`	Parallelization exploration of wireless applications using MPA. PARCO Martin Palkovic, Praveen Raghavan, Thomas J. Ashby, Andy Folens, Hans Cappelle, Miguel Glassee, Liesbet Van der Perre, Francky Catthoor
2009	J	`jnl`	Playing the trade-off game: Architecture exploration using Coffeee. ACM Trans. Design Autom. Electr. Syst. Praveen Raghavan, Murali Jayapala, Andy Lambrechts, Javed Absar, Francky Catthoor
2009	—	`conf`	Power-aware evaluation flowfor digital decimation filter architectures for high-speed ADCS. SiPS David Novo, Robert Fasthuber, Praveen Raghavan, André Bourdoux, Min Li, Liesbet Van der Perre, Francky Catthoor
2009	J	`jnl`	Reconfigurable AGU: An Address Generation Unit Based on Address Calculation Pattern for Low Energy and High Performance Embedded Processors. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Ittetsu Taniguchi, Praveen Raghavan, Murali Jayapala, Francky Catthoor, Yoshinori Takeuchi, Masaharu Imai
2009	—	`conf`	Register file exploration for a multi-standard wireless forward error correction ASIP. SiPS Praveen Raghavan, Francky Catthoor
2009	Misc	`conf`	SARA: StreAm register allocation. CODES+ISSS Praveen Raghavan, Francky Catthoor
2009	—	`conf`	Systematic architecture exploration based on optimistic cycle estimation for low energy embedded processors. ASP-DAC Ittetsu Taniguchi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai
2008	—	`conf`	A unified instruction set programmable architecture for multi-standard advanced forward error correction. SiPS Frederik Naessens, Bruno Bougard, Siebert Bressinck, Lieven Hollevoet, Praveen Raghavan, Liesbet Van der Perre, Francky Catthoor
2008	—	`conf`	Coffee: COmpiler Framework for Energy-Aware Exploration. HiPEAC Praveen Raghavan, Andy Lambrechts, Javed Absar, Murali Jayapala, Francky Catthoor, Diederik Verkest
2008	J	`jnl`	Efficient Method to Generate an Energy Efficient Schedule Using Operation Shuffling. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. Yuki Kobayashi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Masaharu Imai
2008	Misc	`conf`	Energy-Aware Interconnect Optimization for a Coarse Grained Reconfigurable Processor. VLSI Design Andy Lambrechts, Praveen Raghavan, Murali Jayapala, Francky Catthoor, Diederik Verkest
2008	J	`jnl`	Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures. Integr. David Atienza, Praveen Raghavan, José Luis Ayala, Giovanni De Micheli, Francky Catthoor, Diederik Verkest, Marisa López-Vallejo
2008	—	`conf`	Operation shuffling over cycle boundaries for low energy L0 clustering. ASAP Yuki Kobayashi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Masaharu Imai
2007	—	`conf`	A Customized Cross-Bar for Data-Shuffling in Domain-Specific SIMD Processors. ARCS Praveen Raghavan, Satyakiran Munaga, Estela Rey Ramos, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest
2007	—	`conf`	Architectures and Circuits for Software-Defined Radios: Scaling and Scalability for Low Cost and Low Energy. ISSCC Liesbet Van der Perre, Bruno Bougard, Jan Craninckx, Wim Dehaene, Lieven Hollevoet, Murali Jayapala, Pol Marchal, Miguel Miranda, Praveen Raghavan, Thomas Schuster, Piet Wambacq, Francky Catthoor, Peter Vanbekbergen
2007	—	`conf`	Design of a Low Power Pre-synchronization ASIP for Multimode SDR Terminals. SAMOS Thomas Schuster, Bruno Bougard, Praveen Raghavan, Robert Priewasser, David Novo, Liesbet Van der Perre, Francky Catthoor
2007	J	`jnl`	Energy-aware compilation and hardware design for VLIW embedded systems. Int. J. Embed. Syst. José L. Ayala, Marisa López-Vallejo, David Atienza, Praveen Raghavan, Francky Catthoor, Diederik Verkest
2007	Misc	`conf`	Locality optimization in wireless applications. CODES+ISSS Javed Absar, Min Li, Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Arnout Vandecappelle, Francky Catthoor
2007	J	`jnl`	Methodology for operation shuffling and L0 cluster generation for low energy heterogeneous VLIW processors. ACM Trans. Design Autom. Electr. Syst. Yuki Kobayashi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Masaharu Imai
2007	C	`conf`	Reduction of Register File Delay Due to Process Variability in VLIW Embedded Processors. ISCAS Praveen Raghavan, José L. Ayala, David Atienza, Francky Catthoor, Giovanni De Micheli, Marisa López-Vallejo
2007	—	`conf`	Semi Custom Design: A Case Study on SIMD Shufflers. PATMOS Praveen Raghavan, Nandhavel Sethubalasubramanian, Satyakiran Munaga, Estela Rey Ramos, Murali Jayapala, Oliver Weiss, Francky Catthoor, Diederik Verkest
2007	A	`conf`	Very wide register: an asymmetric register file organization for low power embedded processors. DATE Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest, Henk Corporaal
2006	—	`conf`	Compiler-Driven Leakage Energy Reduction in Banked Register Files. PATMOS David Atienza, Praveen Raghavan, José L. Ayala, Giovanni De Micheli, Francky Catthoor, Diederik Verkest, Marisa López-Vallejo
2006	A	`conf`	Distributed loop controller architecture for multi-threading in uni-threaded VLIW processors. DATE Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest
2006	—	`conf`	Software Simultaneous Multi-Threading, a Technique to Exploit Task-Level Parallelism to Improve Instruction- and Data-Level Parallelism. PATMOS Daniele Paolo Scarpazza, Praveen Raghavan, David Novo, Francky Catthoor, Diederik Verkest
2005	—	`conf`	Operation Shuffling for Low Energy L0 Cluster Generation on Heterogeneous VLIW Processors. ESTIMedia Yuki Kobayashi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Masaharu Imai
2005	—	`conf`	Power Breakdown Analysis for a Heterogeneous NoC Platform Running a Video Application. ASAP Andy Lambrechts, Praveen Raghavan, Anthony Leroy, Guillermo Talavera, Tom Vander Aa, Murali Jayapala, Francky Catthoor, Diederik Verkest, Geert Deconinck, Henk Corporaal, Frédéric Robert, Jordi Carrabina