Praveen K. Murthy

21 papers A 2C 3Misc 2Journal 9Unranked 5
YearRankTypeTitle / Venue / Authors
2014 A conf
Top ten challenges in Big Data security and privacy.
ITC
Praveen K. Murthy
2007 J jnl
Beyond single-appearance schedules: Efficient DSP software synthesis using nested procedure calls.
ACM Trans. Embed. Comput. Syst.
Ming-Yung Ko, Praveen K. Murthy, Shuvra S. Bhattacharyya
2004 J jnl
Buffer merging - a powerful technique for reducing memory requirements of synchronous dataflow specifications.
ACM Trans. Design Autom. Electr. Syst.
Praveen K. Murthy, Shuvra S. Bhattacharyya
2004 C conf
Compact Procedural Implementation in DSP Software Synthesis Through Recursive Graph Decomposition.
SCOPES
Ming-Yung Ko, Praveen K. Murthy, Shuvra S. Bhattacharyya
2004 — conf
High level hardware validation using hierarchical message sequence charts.
HLDVT
Praveen K. Murthy, Sreeranga P. Rajan, Koichiro Takayama
2004 J jnl
The CBP Parameter: A Module Characterization Approach for DSP Software Optimization.
J. VLSI Signal Process.
Shuvra S. Bhattacharyya, Praveen K. Murthy
2003 Misc ed.
Proceedings of the International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2003, San Jose, California, USA, October 30 - November 1, 2003
CASES
Jaime H. Moreno, Praveen K. Murthy, Thomas M. Conte, Paolo Faraboschi
2002 J jnl
Multidimensional synchronous dataflow.
IEEE Trans. Signal Process.
Praveen K. Murthy, Edward A. Lee
2001 J jnl
Shared buffer implementations of signal processing systems usinglifetime analysis techniques.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Praveen K. Murthy, Shuvra S. Bhattacharyya
2001 — conf
System canvas: a new design environment for embedded DSP and telecommunication systems.
CODES
Praveen K. Murthy, Etan G. Cohen, Steve Rowland
2000 A conf
Shared Memory Implementations of Synchronous Dataflow Specifications.
DATE
Praveen K. Murthy, Shuvra S. Bhattacharyya
2000 C conf
The CBP parameter - a useful annotation to aid block-diagram compilers for DSP.
ISCAS
Shuvra S. Bhattacharyya, Praveen K. Murthy
1999 — conf
A Buffer Merging Technique for Reducing Memory Requirements of Synchronous Dataflow Specifications.
ISSS
Praveen K. Murthy, Shuvra S. Bhattacharyya
1999 J jnl
Synthesis of Embedded Software from Synchronous Dataflow Specifications.
J. VLSI Signal Process.
Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee
1998 J jnl
Scheduling for Embedded Real-Time Systems.
IEEE Des. Test Comput.
Felice Balarin, Luciano Lavagno, Praveen K. Murthy, Alberto L. Sangiovanni-Vincentelli
1997 J jnl
APGAN and RPMC: Complementary Heuristics for Translating DSP Block Diagrams into Efficient Software Implementations.
Des. Autom. Embed. Syst.
Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee
1997 J jnl
Joint Minimization of Code and Data for Synchronous Dataflow Programs.
Formal Methods Syst. Des.
Praveen K. Murthy, Shuvra S. Bhattacharyya, Edward A. Lee
1997 — conf
Optimized software synthesis for synchronous dataflow.
ASAP
Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee
1996 Misc conf
An extension of multidimensional synchronous dataflow to handle arbitrary sampling lattices.
ICASSP
Praveen K. Murthy, Edward A. Lee
1995 C conf
Converting graphical DSP programs into memory constrained software prototypes.
RSP
Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward A. Lee
1994 — conf
Minimizing memory requirements for chain-structured synchronous dataflow programs.
ICASSP (2)
Praveen K. Murthy, Shuvra S. Bhattacharyya, Edward A. Lee