Prashanth H. C.

26 papers C 5Journal 3Unranked 18
YearRankTypeTitle / Venue / Authors
2024 J jnl
Accelerated and Highly Correlated ASIC Synthesis of AI Hardware Subsystems Using CGP.
IET Comput. Digit. Tech.
Prashanth H. C., Madhav Rao
2024 — conf
Efficient Radix-4 Approximated Modified Booth Multiplier for Signal Processing and Computer Vision: A Probabilistic Design Approach.
ISQED
Bindu G. Gowda, Prashanth H. C., V. N. Muralidhara, Madhav Rao
2024 — conf
Evaluating Deep Neural Network Performance on Edge Accelerators: A Roofline Model Adopted Benchmarking Approach.
SOCC
Prashanth H. C., Madhav Rao
2024 — conf
Performance Analysis of OFA-NAS ResNet Topologies Across Diverse Hardware Compute Units.
ACM Great Lakes Symposium on VLSI
Prashanth H. C., Madhav Rao
2024 — conf
Roofline Performance Analysis of DNN Architectures on CPU and GPU Systems.
ISQED
Prashanth H. C., Madhav Rao
2023 C conf
ApproxCNN: Evaluation Of CNN With Approximated Layers Using In-Exact Multipliers.
ICCD
Bindu G. Gowda, S. N. Raghava, Prashanth H. C., Pratyush Nandi, Madhav Rao
2023 — conf
CellFlow: Automated Standard Cell Design Flow.
ISVLSI
Prashanth H. C., Prashanth Jonna, Madhav Rao
2023 J jnl
Correction: Trainable windows for SincNet architecture.
EURASIP J. Audio Speech Music. Process.
Prashanth H. C., Madhav Rao, Dhanya Eledath, V. Ramasubramanian
2023 — conf
Design and Evaluation of Inexact Computation based Systolic Array for Convolution.
LASCAS
Sai Karthik Nandigama, Prashanth H. C., Madhav Rao
2023 — conf
Design and Evaluation of multipliers for hardware accelerated on-chip EdDSA.
ISQED
Harshita Gupta, Mayank Kabra, Nitin D. Patwari, Prashanth H. C., Madhav Rao
2023 — conf
Design-Space Exploration of Multiplier Approximation in CNNs.
ISVLSI
S. N. Raghava, Prashanth H. C., Bindu G. Gowda, Pratyush Nandi, Madhav Rao
2023 — conf
Design-Space Exploration of Systolic Array for Edge Inferencing Applications.
AIMLSystems
Prashanth H. C., Yash Dharmesh Mogal, Madhav Rao
2023 — conf
EBASA: Error Balanced Approximate Systolic Array Architecture Design.
ACM Great Lakes Symposium on VLSI
Sai Karthik Nandigama, Bindu G. Gowda, Prashanth H. C., Madhav Rao
2023 — conf
Error Diluted Approximate Multipliers Using Positive And Negative Compressors.
ISQED
Bindu G. Gowda, Prashanth H. C., Madhav Rao
2023 C conf
GCells: A Graph-Search Approach to Design Custom Cells for Computational Subsystems.
DSD
Mayank Kabra, Shreyas V. S, Prashanth H. C., Kedar Deshpande, Madhav Rao
2023 — conf
HIE-DRAM: High Performance Efficient In-DRAM Computing Architecture for SIMD.
ISQED
Mayank Kabra, Prashanth H. C., Kedar Deshpande, Madhav Rao
2023 — conf
IMAC: : A Pre-Multiplier And Integrated Reduction Based Multiply-And-Accumulate Unit.
ACM Great Lakes Symposium on VLSI
Bindu G. Gowda, Prashanth H. C., Madhav Rao
2023 C conf
Meta-Heuristic Optimization of Transistor Sizing in CMOS Digital Designs.
IJCCI
Prashanth H. C., Madhav Rao
2023 — conf
SQRTLIB : Library of Hardware Square Root Designs.
ISQED
Prashanth H. C., Sriniketh S. S, Shrikrishna Hebbar, Chinmaye R, Madhav Rao
2023 J jnl
Trainable windows for SincNet architecture.
EURASIP J. Audio Speech Music. Process.
Prashanth H. C., Madhav Rao, Dhanya Eledath, Ramasubramanian C
2023 — conf
eDRAM-OESP: A novel performance efficient in-embedded-DRAM-compute design for on-edge signal processing application.
ISQED
Mayank Kabra, Prashanth H. C., Kedar Deshpande, Madhav Rao
2022 — conf
Design and Evaluation of In-Exact Compressor based Approximate Multipliers.
ACM Great Lakes Symposium on VLSI
Prashanth H. C., Soujanya S. R, Bindu G. Gowda, Madhav Rao
2022 — conf
Design and Evaluation of Performance-efficient SoC-on-FPGA for Cloud-based Healthcare Applications.
NorCAS
Mayank Kabra, Prashanth H. C., Madhav Rao
2022 — conf
Evolutionary Standard Cell Synthesis of Unconventional Designs.
ACM Great Lakes Symposium on VLSI
Prashanth H. C., Madhav Rao
2022 C conf
Improving Digital Circuit Synthesis of Complex Functions using Binary Weighted Fitness and Variable Mutation Rate in Cartesian Genetic Programming.
IJCCI
Prashanth H. C., Madhav Rao
2022 C conf
SOMALib: Library of Exact and Approximate Activation Functions for Hardware-efficient Neural Network Accelerators.
ICCD
Prashanth H. C., Madhav Rao