Prasanth Mangalagiri

12 papers A* 2A 2B 1C 1Journal 2Unranked 4
YearRankTypeTitle / Venue / Authors
2024 A* conf
CDLS: Constraint Driven Generative AI Framework for Analog Layout Synthesis.
DAC
Prasanth Mangalagiri, Lynn Qian, Farrukh Zafar, Praveen Mosalikanti, Phoebe Chang, Arun Kurian, Vinay Saripalli
2019 — conf
Analog Layout Synthesis: Are We There Yet?
ISPD
Prasanth Mangalagiri
2009 J jnl
An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization.
IEEE Trans. Computers
Jungsub Kim, Lanping Deng, Prasanth Mangalagiri, Kevin M. Irick, Kanwaldeep Sobti, Mahmut T. Kandemir, Vijaykrishnan Narayanan, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun
2009 A conf
Exploiting clock skew scheduling for FPGA.
DATE
Sungmin Bae, Prasanth Mangalagiri, Narayanan Vijaykrishnan
2009 — conf
Lifetime Reliability Aware Design Flow Techniques for Dual-Vdd Based Platform FPGAs.
ISVLSI
Prasanth Mangalagiri, Vijaykrishnan Narayanan
2008 — conf
A low-power phase change memory based hybrid cache architecture.
ACM Great Lakes Symposium on VLSI
Prasanth Mangalagiri, Karthik Sarpatwari, Aditya Yanamandra, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Osama Awadel Karim
2008 A conf
Thermal-aware reliability analysis for platform FPGAs.
ICCAD
Prasanth Mangalagiri, Sungmin Bae, Krishnan Ramakrishnan, Yuan Xie, Vijaykrishnan Narayanan
2008 J jnl
Toward Increasing FPGA Lifetime.
IEEE Trans. Dependable Secur. Comput.
Suresh Srinivasan, Krishnan Ramakrishnan, Prasanth Mangalagiri, Yuan Xie, Vijaykrishnan Narayanan, Mary Jane Irwin, Karthik Sarpatwari
2007 — conf
Efficient Function Evaluations with Lookup Tables for Structured Matrix Operations.
SiPS
Kanwaldeep Sobti, Lanping Deng, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun, Jungsub Kim, Prasanth Mangalagiri, Kevin M. Irick, Mahmut T. Kandemir, Vijaykrishnan Narayanan
2007 C conf
FPGA routing architecture analysis under variations.
ICCD
Suresh Srinivasan, Prasanth Mangalagiri, Yuan Xie, Narayanan Vijaykrishnan
2007 B conf
TANOR: A Tool for Accelerating N-Body Simulations on Reconfigurable Platforms.
FPL
Jungsub Kim, Prasanth Mangalagiri, Kevin M. Irick, Mahmut T. Kandemir, Vijaykrishnan Narayanan, Kanwaldeep Sobti, Lanping Deng, Chaitali Chakrabarti, Nikos Pitsianis, Xiaobai Sun
2006 A* conf
FLAW: FPGA lifetime awareness.
DAC
Suresh Srinivasan, Prasanth Mangalagiri, Yuan Xie, Narayanan Vijaykrishnan, Karthik Sarpatwari