Pramod Subramanyan

40 papers A* 2A 10B 3C 3Misc 1Journal 12Unranked 7
YearRankTypeTitle / Venue / Authors
2023 J jnl
Analysis of Linux-PRNG (Pseudo Random Number Generator).
CoRR
Ayush Bansal, Pramod Subramanyan, Satyadev Nandakumar
2021 A conf
PSec: Programming Secure Distributed Systems using Enclaves.
AsiaCCS
Shivendra Kushwah, Ankush Desai, Pramod Subramanyan, Sanjit A. Seshia
2020 J jnl
Functional Analysis Attacks on Logic Locking.
IEEE Trans. Inf. Forensics Secur.
Deepak Sirone, Pramod Subramanyan
2020 A conf
HyperFuzzing for SoC Security Validation.
ICCAD
Sujit Kumar Muduli, Gourav Takhar, Pramod Subramanyan
2020 C conf
Mining Hyperproperties from Behavioral Traces.
VLSI-SOC
Mayank Rawat, Sujit Kumar Muduli, Pramod Subramanyan
2020 J jnl
Strong Logic Obfuscation with Low Overhead against IC Reverse Engineering Attacks.
ACM Trans. Design Autom. Electr. Syst.
Qutaiba Alasad, Jiann-Shuin Yuan, Pramod Subramanyan
2020 — conf
Verification of Quantitative Hyperproperties Using Trace Enumeration Relations.
CAV (1)
Shubham Sahai, Pramod Subramanyan, Rohit Sinha
2020 J jnl
Verification of Quantitative Hyperproperties Using Trace Enumeration Relations.
CoRR
Shubham Sahai, Rohit Sinha, Pramod Subramanyan
2020 — conf
When Oblivious is Not: Attacks against OPAM.
WOOT @ USENIX Security Symposium
Nirjhar Roy, Nikhil Bansal, Gourav Takhar, Nikhil Mittal, Pramod Subramanyan
2019 A conf
A Formal Approach to Secure Speculation.
CSF
Kevin Cheang, Cameron Rasmussen, Sanjit A. Seshia, Pramod Subramanyan
2019 J jnl
A Formal Approach to Secure Speculation.
IACR Cryptol. ePrint Arch.
Kevin Cheang, Cameron Rasmussen, Sanjit A. Seshia, Pramod Subramanyan
2019 A conf
Functional Analysis Attacks on Logic Locking.
DATE
Deepak Sirone, Pramod Subramanyan
2019 J jnl
Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification.
ACM Trans. Design Autom. Electr. Syst.
Bo-Yuan Huang, Hongce Zhang, Pramod Subramanyan, Yakir Vizel, Aarti Gupta, Sharad Malik
2019 — conf
Towards Verifiably Secure Systems-on-Chip Platforms.
ATS
Sujit Kumar Muduli, Pramod Subramanyan
2019 J jnl
Verification of Authenticated Firmware Load.
IACR Cryptol. ePrint Arch.
Sujit Kumar Muduli, Pramod Subramanyan, Sayak Ray
2019 B conf
Verification of Authenticated Firmware Loaders.
FMCAD
Sujit Kumar Muduli, Pramod Subramanyan, Sayak Ray
2018 J jnl
Functional Analysis Attacks on Logic Locking.
CoRR
Deepak Sirone, Pramod Subramanyan
2018 J jnl
Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification.
CoRR
Bo-Yuan Huang, Hongce Zhang, Pramod Subramanyan, Yakir Vizel, Aarti Gupta, Sharad Malik
2018 — conf
Lazy Self-composition for Security Verification.
CAV (2)
Weikun Yang, Yakir Vizel, Pramod Subramanyan, Aarti Gupta, Sharad Malik
2018 J jnl
Template-Based Parameterized Synthesis of Uniform Instruction-Level Abstractions for SoC Verification.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Pramod Subramanyan, Bo-Yuan Huang, Yakir Vizel, Aarti Gupta, Sharad Malik
2018 C conf
UCLID5: Integrating Modeling, Verification, Synthesis and Learning.
MEMOCODE
Sanjit A. Seshia, Pramod Subramanyan
2017 A* conf
A Formal Foundation for Secure Remote Execution of Enclaves.
CCS
Pramod Subramanyan, Rohit Sinha, Ilia A. Lebedev, Srinivas Devadas, Sanjit A. Seshia
2017 J jnl
A Formal Foundation for Secure Remote Execution of Enclaves.
IACR Cryptol. ePrint Arch.
Pramod Subramanyan, Rohit Sinha, Ilia A. Lebedev, Srinivas Devadas, Sanjit A. Seshia
2017 — —
Deriving Abstractions to Address Hardware Platform Security Challenges
Pramod Subramanyan
2017 A conf
Malware detection using machine learning based analysis of virtual memory access patterns.
DATE
Zhixing Xu, Sayak Ray, Pramod Subramanyan, Sharad Malik
2016 A* conf
Invited - Specification and modeling for systems-on-chip security verification.
DAC
Sharad Malik, Pramod Subramanyan
2016 A conf
Verifying information flow properties of firmware using symbolic execution.
DATE
Pramod Subramanyan, Sharad Malik, Hareesh Khattri, Abhranil Maiti, Jason M. Fung
2015 — conf
Evaluating the security of logic encryption algorithms.
HOST
Pramod Subramanyan, Sayak Ray, Sharad Malik
2015 B conf
Template-based Synthesis of Instruction-Level Abstractions for SoC Verification.
FMCAD
Pramod Subramanyan, Yakir Vizel, Sayak Ray, Sharad Malik
2014 Misc conf
All-SAT Using Minimal Blocking Clauses.
VLSID
Yinlei Yu, Pramod Subramanyan, Nestan Tsiskaridze, Sharad Malik
2014 — ch.
Boolean Satisfiability: Solvers and Extensions.
Software Systems Safety
Georg Weissenbacher, Pramod Subramanyan, Sharad Malik
2014 A conf
Formal verification of taint-propagation security properties in a commercial SoC design.
DATE
Pramod Subramanyan, Divya Arora
2014 J jnl
Reverse Engineering Digital Circuits Using Structural and Functional Analyses.
IEEE Trans. Emerg. Top. Comput.
Pramod Subramanyan, Nestan Tsiskaridze, Wenchao Li, Adrià Gascón, Wei Yang Tan, Ashish Tiwari, Natarajan Shankar, Sanjit A. Seshia, Sharad Malik
2014 B conf
Template-based circuit understanding.
FMCAD
Adrià Gascón, Pramod Subramanyan, Bruno Dutertre, Ashish Tiwari, Dejan Jovanovic, Sharad Malik
2013 A conf
Reverse engineering digital circuits using functional analysis.
DATE
Pramod Subramanyan, Nestan Tsiskaridze, Kanika Pasricha, Dillon Reisman, Adriana Susnea, Sharad Malik
2013 — conf
WordRev: Finding word-level structures in a sea of bit-level gates.
HOST
Wenchao Li, Adrià Gascón, Pramod Subramanyan, Wei Yang Tan, Ashish Tiwari, Sharad Malik, Natarajan Shankar, Sanjit A. Seshia
2011 C conf
Adaptive execution assistance for multiplexed fault-tolerant chip multiprocessors.
ICCD
Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson
2010 A conf
Energy-efficient fault tolerance in chip multiprocessors using Critical Value Forwarding.
DSN
Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson
2010 — conf
Energy-efficient redundant execution for chip multiprocessors.
ACM Great Lakes Symposium on VLSI
Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson
2010 A conf
Multiplexed redundant execution: A technique for efficient fault tolerance in chip multiprocessors.
DATE
Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson