Prabhu Vellaisamy

26 papers A 1B 1C 2Journal 16Unranked 6

Year	Rank	Type	Title / Venue / Authors
2026	J	`jnl`	A-Graph: A Unified Graph Representation for At-Will Simulation across System Stacks. CoRR Daniel Price, Prabhu Vellaisamy, Patricia Gonzalez, George Michelogiannakis, John Paul Shen, Di Wu
2026	J	`jnl`	Exploration of Unary Arithmetic-Based Matrix Multiply Units for Low Precision DL Accelerators. CoRR Prabhu Vellaisamy, Harideep Nair, Di Wu, R. D. (Shawn) Blanton, John Paul Shen
2026	—	`conf`	Mugi: Value Level Parallelism For Efficient LLMs. ASPLOS (2) Daniel Price, Prabhu Vellaisamy, John Paul Shen, Di Wu
2026	J	`jnl`	Mugi: Value Level Parallelism For Efficient LLMs. CoRR Daniel Price, Prabhu Vellaisamy, John Paul Shen, Di Wu
2026	J	`jnl`	NeuroAI Temporal Neural Networks (NeuTNNs): Microarchitecture and Design Framework for Specialized Neuromorphic Processing Units. CoRR Shanmuga Venkatachalam, Prabhu Vellaisamy, Harideep Nair, Wei-Che Huang, YoungSeok Na, Yuyang Kang, Quinn Jacobson, John Paul Shen
2026	J	`jnl`	TaxBreak: Unmasking the Hidden Costs of LLM Inference Through Overhead Decomposition. CoRR Prabhu Vellaisamy, Shreesh Tripathi, Vignesh Natarajan, Surya Santhan Thenarasu, R. D. (Shawn) Blanton, John Paul Shen
2025	—	`conf`	Catwalk: Unary Top-K for Efficient Ramp-No-Leak Neuron Design for Temporal Neural Networks. ISVLSI Devon Lister, Prabhu Vellaisamy, John Paul Shen, Di Wu
2025	J	`jnl`	Catwalk: Unary Top-K for Efficient Ramp-No-Leak Neuron Design for Temporal Neural Networks. CoRR Devon Lister, Prabhu Vellaisamy, John Paul Shen, Di Wu
2025	B	`conf`	Characterizing and Optimizing LLM Inference Workloads on CPU-GPU Coupled Architectures. ISPASS Prabhu Vellaisamy, Thomas Labonte, Sourav Chakraborty, Matt Turner, Samantika Sury, John Paul Shen
2025	J	`jnl`	Characterizing and Optimizing LLM Inference Workloads on CPU-GPU Coupled Architectures. CoRR Prabhu Vellaisamy, Thomas Labonte, Sourav Chakraborty, Matt Turner, Samantika Sury, John Paul Shen
2025	A	`conf`	Tempus Core: Area-Power Efficient Temporal-Unary Convolution Core for Low-Precision Edge DLAs. DATE Prabhu Vellaisamy, Harideep Nair, Thomas Kang, Yichen Ni, Haoyang Fan, Bin Qi, Jeff Chen, R. D. Shawn Blanton, John Paul Shen
2024	C	`conf`	Commercial Evaluation of Zero-Skipping MAC Design for Bit Sparsity Exploitation in DL Inference. VLSI-SoC Harideep Nair, Prabhu Vellaisamy, Tsung-Han Lin, Perry H. Wang, Ronald Shawn Blanton, John Paul Shen
2024	—	`conf`	Exploration of Unary Arithmetic-Based Matrix Multiply Units for Low Precision DL Accelerators. ISVLSI Prabhu Vellaisamy, Harideep Nair, Di Wu, R. D. Shawn Blanton, John Paul Shen
2024	J	`jnl`	OzMAC: An Energy-Efficient Sparsity-Exploiting Multiply-Accumulate-Unit Design for DL Inference. CoRR Harideep Nair, Prabhu Vellaisamy, Tsung-Han Lin, Perry H. Wang, Ronald Shawn Blanton, John Paul Shen
2024	—	`conf`	Realtime Person Identification via Gait Analysis Using IMU Sensors on Edge Devices. ICONS Shanmuga Venkatachalam, Harideep Nair, Prabhu Vellaisamy, Yongqi Zhou, Ziad Youssfi, John Paul Shen
2024	J	`jnl`	Realtime Person Identification via Gait Analysis. CoRR Shanmuga Venkatachalam, Harideep Nair, Prabhu Vellaisamy, Yongqi Zhou, Ziad Youssfi, John Paul Shen
2024	J	`jnl`	TNNGen: Automated Design of Neuromorphic Sensory Processing Units for Time-Series Clustering. CoRR Prabhu Vellaisamy, Harideep Nair, Vamsikrishna Ratnakaram, Dhruv Gupta, John Paul Shen
2024	J	`jnl`	TNNGen: Automated Design of Neuromorphic Sensory Processing Units for Time-Series Clustering. IEEE Trans. Circuits Syst. II Express Briefs Prabhu Vellaisamy, Harideep Nair, Vamsikrishna Ratnakaram, Dhruv Gupta, John Paul Shen
2024	J	`jnl`	Tempus Core: Area-Power Efficient Temporal-Unary Convolution Core for Low-Precision Edge DLAs. CoRR Prabhu Vellaisamy, Harideep Nair, Thomas Kang, Yichen Ni, Haoyang Fan, Bin Qi, Jeff Chen, R. D. Shawn Blanton, John Paul Shen
2024	J	`jnl`	tuGEMM: Area-Power-Efficient Temporal Unary GEMM Architecture for Low-Precision Edge AI. CoRR Harideep Nair, Prabhu Vellaisamy, Albert Chen, Joseph Finn, Anna Li, Manav Trivedi, John Paul Shen
2024	J	`jnl`	tubGEMM: Energy-Efficient and Sparsity-Effective Temporal-Unary-Binary Based Matrix Multiply Unit. CoRR Prabhu Vellaisamy, Harideep Nair, Joseph Finn, Manav Trivedi, Albert Chen, Anna Li, Tsung-Han Lin, Perry H. Wang, R. D. (Shawn) Blanton, John Paul Shen
2023	C	`conf`	tuGEMM: Area-Power-Efficient Temporal Unary GEMM Architecture for Low-Precision Edge AI. ISCAS Harideep Nair, Prabhu Vellaisamy, Albert Chen, Joseph Finn, Anna Li, Manav Trivedi, John Paul Shen
2023	—	`conf`	tubGEMM: Energy-Efficient and Sparsity-Effective Temporal-Unary-Binary Based Matrix Multiply Unit. ISVLSI Prabhu Vellaisamy, Harideep Nair, Joseph Finn, Manav Trivedi, Albert Chen, Anna Li, Tsung-Han Lin, Perry H. Wang, Ronald Shawn Blanton, John Paul Shen
2022	—	`conf`	TNN7: A Custom Macro Suite for Implementing Highly Optimized Designs of Neuromorphic TNNs. ISVLSI Harideep Nair, Prabhu Vellaisamy, Santha Bhasuthkar, John Paul Shen
2022	J	`jnl`	TNN7: A Custom Macro Suite for Implementing Highly Optimized Designs of Neuromorphic TNNs. CoRR Harideep Nair, Prabhu Vellaisamy, Santha Bhasuthkar, John Paul Shen
2022	J	`jnl`	Towards a Design Framework for TNN-Based Neuromorphic Sensory Processing Units. CoRR Prabhu Vellaisamy, John Paul Shen