Prabhat Mishra

267 papers A* 8A 33B 1C 12Misc 34Journal 119Unranked 55
YearRankTypeTitle / Venue / Authors
2026 J jnl
Secure Multi-Path Routing with All-or-Nothing Transform for Network-on-Chip Architectures.
CoRR
Hansika Weerasena, Matthew Randall, Prabhat Mishra
2026 J jnl
Sleep Reveals the Nonce: Breaking ECDSA using Sleep-Based Power Side-Channel Vulnerability.
CoRR
Sahan Sanjaya, Prabhat Mishra
2026 J jnl
SysFuSS: System-Level Firmware Fuzzing with Selective Symbolic Execution.
CoRR
Dakshina Tharindu, Aruna Jayasena, Prabhat Mishra
2026 J jnl
TroLL: Exploiting Structural Similarities Between Logic Locking and Hardware Trojans.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yuntao Liu, Aruna Jayasena, Prabhat Mishra, Ankur Srivastava
2025 J jnl
AI Trojan Attack for Evading Machine Learning-Based Detection of Hardware Trojans.
IEEE Trans. Computers
Zhixin Pan, Prabhat Mishra
2025 — conf
Adversarial Assertions.
ISQED
Prabhat Mishra
2025 J jnl
Application-Specific Power Side-Channel Attacks and Countermeasures: A Survey.
CoRR
Sahan Sanjaya, Aruna Jayasena, Prabhat Mishra
2025 J jnl
CiseLeaks: Information Leakage Assessment of Cryptographic Instruction Set Extension Prototypes.
IEEE Trans. Inf. Forensics Secur.
Aruna Jayasena, Richard Bachmann, Prabhat Mishra
2025 J jnl
FirmWall: Directed Symbolic Execution of Firmware Binaries for Defending Against Unauthorized System Calls.
IEEE Trans. Inf. Forensics Secur.
Aruna Jayasena, Prabhat Mishra
2025 J jnl
Formal verification of bioinformatics software using model checking and theorem proving.
Briefings Bioinform.
Hansika Weerasena, Aruna Jayasena, Christina Boucher, Prabhat Mishra
2025 J jnl
FuSS: Coverage-Directed Hardware Fuzzing with Selective Symbolic Execution.
ACM Trans. Embed. Comput. Syst.
Aruna Jayasena, Sai Suprabhanu Nallapaneni, Prabhat Mishra
2025 J jnl
Information Leakage Through Physical Layer Supply Voltage Coupling Vulnerability.
IEEE Trans. Very Large Scale Integr. Syst.
Sahan Sanjaya, Aruna Jayasena, Prabhat Mishra
2025 Misc ed.
International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2025, Taipei, Taiwan, September 28 - Oct. 3, 2025
CODES+ISSS
Prabhat Mishra, Paul Bogdan
2025 J jnl
Quantum Masked Autoencoders for Vision Learning.
CoRR
Emma Andrews, Prabhat Mishra
2025 A conf
Security Assertions for Trusted Execution Environments.
DATE
Hasini Witharana, Hansika Weerasena, Prabhat Mishra
2025 J jnl
SleepWalk: Exploiting Context Switching and Residual Power for Physical Side-Channel Attacks.
CoRR
Sahan Sanjaya, Aruna Jayasena, Prabhat Mishra
2025 J jnl
Topology-aware Detection and Localization of Distributed Denial-of-Service Attacks in Network-on-Chips.
CoRR
Hansika Weerasena, Xiaoguo Jia, Prabhat Mishra
2025 — conf
Traffic Analysis Attacks on Wireless NoC-Based SoCs.
HOST
Hansika Weerasena, Prabhat Mishra
2024 J jnl
Assertion-Based Validation using Clustering and Dynamic Refinement of Hardware Checkers.
ACM Trans. Design Autom. Electr. Syst.
Sahan Sanjaya, Hasini Witharana, Prabhat Mishra
2024 J jnl
Breaking On-Chip Communication Anonymity Using Flow Correlation Attacks.
ACM J. Emerg. Technol. Comput. Syst.
Hansika Weerasena, Prabhat Mishra
2024 J jnl
CISELeaks: Information Leakage Assessment of Cryptographic Instruction Set Extension Prototypes.
IACR Cryptol. ePrint Arch.
Aruna Jayasena, Richard Bachmann, Prabhat Mishra
2024 Misc conf
Design for Trust Utilizing Rareness Reduction.
VLSID
Aruna Jayasena, Prabhat Mishra
2024 J jnl
Directed Test Generation for Hardware Validation: A Survey.
ACM Comput. Surv.
Aruna Jayasena, Prabhat Mishra
2024 A conf
EvilCS: An Evaluation of Information Leakage through Context Switching on Security Enclaves.
DATE
Aruna Jayasena, Richard Bachmann, Prabhat Mishra
2024 J jnl
Explainable Metric Learning for Deflating Data Bias.
CoRR
Emma Andrews, Prabhat Mishra
2024 Misc conf
Fast Quantum Characterization via Riemannian Optimization.
QCE
Daniel Volya, Andrey Nikitin, Prabhat Mishra
2024 J jnl
Fast Quantum Process Tomography via Riemannian Gradient Descent.
CoRR
Daniel Volya, Andrey Nikitin, Prabhat Mishra
2024 J jnl
Formal Verification of Virtualization-Based Trusted Execution Environments.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Hasini Witharana, Hansika Weerasena, Prabhat Mishra
2024 J jnl
HIVE: Scalable Hardware-Firmware Co-Verification Using Scenario-Based Decomposition and Automated Hint Extraction.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Aruna Jayasena, Prabhat Mishra
2024 J jnl
Incremental Concolic Testing of Register-Transfer Level Designs.
ACM Trans. Design Autom. Electr. Syst.
Hasini Witharana, Aruna Jayasena, Prabhat Mishra
2024 J jnl
Information Leakage through Physical Layer Supply Voltage Coupling Vulnerability.
CoRR
Sahan Sanjaya, Aruna Jayasena, Prabhat Mishra
2024 — conf
Lightweight Multicast Authentication in NoC-based SoCs.
ISQED
Hansika Weerasena, Prabhat Mishra
2024 J jnl
Privacy-Preserving Debiasing using Data Augmentation and Machine Unlearning.
CoRR
Zhixin Pan, Emma Andrews, Laura Chang, Prabhat Mishra
2024 B conf
QcAssert: Quantum Device Testing with Concurrent Assertions.
ASPDAC
Hasini Witharana, Daniel Volya, Prabhat Mishra
2024 Misc conf
Quantum Benchmarking via Random Dynamical Quantum Maps.
QCE
Daniel Volya, Prabhat Mishra
2024 J jnl
Quantum Measurement Classification Using Statistical Learning.
ACM Trans. Quantum Comput.
Zachery Utt, Daniel Volya, Prabhat Mishra
2024 J jnl
Revealing CNN Architectures via Side-Channel Analysis in Dataflow-based Inference Accelerators.
ACM Trans. Embed. Comput. Syst.
Hansika Weerasena, Prabhat Mishra
2024 J jnl
Security of Electrical, Optical, and Wireless On-chip Interconnects: A Survey.
ACM Trans. Design Autom. Electr. Syst.
Hansika Weerasena, Prabhat Mishra
2024 J jnl
TD-Zero: Automatic Golden-Free Hardware Trojan Detection Using Zero-Shot Learning.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Zhixin Pan, Prabhat Mishra
2024 Misc conf
Variational Quantum Algorithms via Measurement-Induced Passive Steering.
QCE
Sahan Sanjaya, Daniel Volya, Prabhat Mishra
2024 — conf
Verifying Memory Confidentiality and Integrity of Intel TDX Trusted Execution Environments.
HOST
Hasini Witharana, Debapriya Chatterjee, Prabhat Mishra
2023 J jnl
Automated Generation of Security Assertions for RTL Models.
ACM J. Emerg. Technol. Comput. Syst.
Hasini Witharana, Aruna Jayasena, Andrew Whigham, Prabhat Mishra
2023 J jnl
Breaking NoC Anonymity using Flow Correlation Attack.
CoRR
Hansika Weerasena, Zhixin Pan, Khushboo Rani, Prabhat Mishra
2023 J jnl
DETER: Design for Trust utilizing Rareness Reduction.
CoRR
Aruna Jayasena, Prabhat Mishra
2023 A conf
Dynamic Refinement of Hardware Assertion Checkers.
DATE
Hasini Witharana, Sahan Sanjaya, Prabhat Mishra
2023 J jnl
Efficient Detection and Localization of DoS Attacks in Heterogeneous Vehicular Networks.
IEEE Trans. Veh. Technol.
Meenu Rani Dey, Moumita Patra, Prabhat Mishra
2023 Misc conf
Feedback-Based Steering for Quantum State Preparation.
QCE
Daniel Volya, Zhixin Pan, Prabhat Mishra
2023 J jnl
HIVE: Scalable Hardware-Firmware Co-Verification using Scenario-based Decomposition and Automated Hint Extraction.
CoRR
Aruna Jayasena, Prabhat Mishra
2023 J jnl
Hardware Acceleration of Explainable Artificial Intelligence.
CoRR
Zhixin Pan, Prabhat Mishra
2023 — conf
Hardware Trojan Detection Using Shapley Ensemble Boosting.
ASP-DAC
Zhixin Pan, Prabhat Mishra
2023 J jnl
Lightweight Encryption and Anonymous Routing in NoC based SoCs.
CoRR
Subodha Charles, Prabhat Mishra
2023 J jnl
Logic Locking based Trojans: A Friend Turns Foe.
CoRR
Yuntao Liu, Aruna Jayasena, Prabhat Mishra, Ankur Srivastava
2023 J jnl
Modeling and Exploration of Gain Competition Attacks in Optical Network-on-Chip Architectures.
CoRR
Khushboo Rani, Hansika Weerasena, Stephen A. Butler, Subodha Charles, Prabhat Mishra
2023 — conf
Quantum Data Compression for Efficient Generation of Control Pulses.
ASP-DAC
Daniel Volya, Prabhat Mishra
2023 A conf
Quantum Measurement Discrimination using Cumulative Distribution Functions.
DATE
Zachery Utt, Daniel Volya, Prabhat Mishra
2023 Misc conf
Quantum Steering of Surface Error Correcting Codes.
QCE
Daniel Volya, Prabhat Mishra
2023 J jnl
QudCom: Towards Quantum Compilation for Qudit Systems.
CoRR
Daniel Volya, Prabhat Mishra
2023 J jnl
Revealing CNN Architectures via Side-Channel Analysis in Dataflow-based Inference Accelerators.
CoRR
Hansika Weerasena, Prabhat Mishra
2023 J jnl
Scalable Detection of Hardware Trojans Using ATPG-Based Activation of Rare Events.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Aruna Jayasena, Prabhat Mishra
2023 J jnl
Security of Electrical, Optical and Wireless On-Chip Interconnects: A Survey.
CoRR
Hansika Weerasena, Prabhat Mishra
2023 J jnl
Sequence-Based Incremental Concolic Testing of RTL Models.
CoRR
Hasini Witharana, Aruna Jayasena, Prabhat Mishra
2023 J jnl
TVLA*: Test Vector Leakage Assessment on Hardware Implementations of Asymmetric Cryptography Algorithms.
IEEE Trans. Very Large Scale Integr. Syst.
Aruna Jayasena, Emma Andrews, Prabhat Mishra
2023 — conf
Towards Secure Classical-Quantum Systems.
HOST
Daniel Volya, Tao Zhang, Nashmin Alam, Mark Tehranipoor, Prabhat Mishra
2023 J jnl
quAssert: Automatic Generation of Quantum Assertions.
CoRR
Hasini Witharana, Daniel Volya, Prabhat Mishra
2022 J jnl
A Survey of Network-on-Chip Security Attacks and Countermeasures.
ACM Comput. Surv.
Subodha Charles, Prabhat Mishra
2022 J jnl
A Survey on Assertion-based Hardware Verification.
ACM Comput. Surv.
Hasini Witharana, Yangdi Lyu, Subodha Charles, Prabhat Mishra
2022 J jnl
A Survey on Hardware Vulnerability Analysis Using Machine Learning.
IEEE Access
Zhixin Pan, Prabhat Mishra
2022 J jnl
Backdoor Attacks on Bayesian Neural Networks using Reverse Distribution.
CoRR
Zhixin Pan, Prabhat Mishra
2022 J jnl
Data Perturbation and Recovery of Time Series Gene Expression Data.
IEEE ACM Trans. Comput. Biol. Bioinform.
Aisharjya Sarkar, Prabhat Mishra, Tamer Kahveci
2022 A conf
Design of AI Trojans for Evading Machine Learning-based Detection of Hardware Trojans.
DATE
Zhixin Pan, Prabhat Mishra
2022 J jnl
Digital Watermarking for Detecting Malicious Intellectual Property Cores in NoC Architectures.
IEEE Trans. Very Large Scale Integr. Syst.
Subodha Charles, Vincent Bindschaedler, Prabhat Mishra
2022 J jnl
Eavesdropping Attack Detection Using Machine Learning in Network-on-Chip Architectures.
IEEE Des. Test
Chamika Sudusinghe, Subodha Charles, Sapumal Ahangama, Prabhat Mishra
2022 C conf
Efficient Finite State Machine Encoding for Defending Against Laser Fault Injection Attacks.
ICCD
Aruna Jayasena, Khushboo Rani, Prabhat Mishra
2022 A conf
Hardware Acceleration of Explainable Machine Learning.
DATE
Zhixin Pan, Prabhat Mishra
2022 J jnl
Hardware-Assisted Malware Detection and Localization Using Explainable Machine Learning.
IEEE Trans. Computers
Zhixin Pan, Jennifer Sheldon, Prabhat Mishra
2022 C conf
Modeling of Noisy Quantum Circuits using Random Matrix Theory.
ICCD
Daniel Volya, Prabhat Mishra
2022 J jnl
Network-on-Chip Trust Validation Using Security Assertions.
J. Hardw. Syst. Secur.
Aruna Jayasena, Binod Kumar, Subodha Charles, Hasini Witharana, Prabhat Mishra
2022 J jnl
Secure Register Allocation for Trusted Code Generation.
IEEE Embed. Syst. Lett.
Priyanka Panigrahi, Vemuri Sahithya, Chandan Karfa, Prabhat Mishra
2022 A conf
Speculative Load Forwarding Attack on Modern Processors.
ICCAD
Hasini Witharana, Prabhat Mishra
2021 — conf
Accelerating Spectral Normalization for Enhancing Robustness of Deep Neural Networks.
ISVLSI
Zhixin Pan, Prabhat Mishra
2021 — conf
Automated Detection of Spectre and Meltdown Attacks Using Explainable Machine Learning.
HOST
Zhixin Pan, Prabhat Mishra
2021 — conf
Automated Test Generation for Hardware Trojan Detection using Reinforcement Learning.
ASP-DAC
Zhixin Pan, Prabhat Mishra
2021 J jnl
Data Criticality in Multi-Threaded Applications: An Insight for Many-Core Systems.
CoRR
Abhijit Das, John Jose, Prabhat Mishra
2021 J jnl
Data Criticality in Multithreaded Applications: An Insight for Many-Core Systems.
IEEE Trans. Very Large Scale Integr. Syst.
Abhijit Das, John Jose, Prabhat Mishra
2021 — conf
Denial-of-service attack detection using machine learning in network-on-chip architectures.
NOCS
Chamika Sudusinghe, Subodha Charles, Prabhat Mishra
2021 J jnl
Directed Test Generation for Activation of Security Assertions in RTL Models.
ACM Trans. Design Autom. Electr. Syst.
Hasini Witharana, Yangdi Lyu, Prabhat Mishra
2021 J jnl
Fast Approximate Spectral Normalization for Robust Deep Neural Networks.
CoRR
Zhixin Pan, Prabhat Mishra
2021 J jnl
Hardware Acceleration of Explainable Machine Learning using Tensor Processing Units.
CoRR
Zhixin Pan, Prabhat Mishra
2021 A conf
Hardware-Assisted Malware Detection using Machine Learning.
DATE
Zhixin Pan, Jennifer Sheldon, Chamika Sudusinghe, Subodha Charles, Prabhat Mishra
2021 — conf
Lightweight Encryption Using Chaffing and Winnowing with All-or-Nothing Transform for Network-on-Chip Architectures.
HOST
Hansika Weerasena, Subodha Charles, Prabhat Mishra
2021 J jnl
MaxSense: Side-channel Sensitivity Maximization for Trojan Detection Using Statistical Test Patterns.
ACM Trans. Design Autom. Electr. Syst.
Yangdi Lyu, Prabhat Mishra
2021 A* conf
Quantum Spectral Clustering of Mixed Graphs.
DAC
Daniel Volya, Prabhat Mishra
2021 A conf
Real-Time Detection and Localization of Denial-of-Service Attacks in Heterogeneous Vehicular Networks.
DATE
Meenu Rani Dey, Moumita Patra, Prabhat Mishra
2021 J jnl
Scalable Activation of Rare Triggers in Hardware Trojans by Repeated Maximal Clique Sampling.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yangdi Lyu, Prabhat Mishra
2021 J jnl
Scalable Concolic Testing of RTL Models.
IEEE Trans. Computers
Yangdi Lyu, Prabhat Mishra
2020 — conf
Automated Test Generation for Activation of Assertions in RTL Models.
ASP-DAC
Yangdi Lyu, Prabhat Mishra
2020 A conf
Automated Test Generation for Trojan Detection using Delay-based Side Channel Analysis.
DATE
Yangdi Lyu, Prabhat Mishra
2020 — conf
Automated Trigger Activation by Repeated Maximal Clique Sampling.
ASP-DAC
Yangdi Lyu, Prabhat Mishra
2020 J jnl
Feature-Based Signal Selection for Post-Silicon Debug Using Machine Learning.
IEEE Trans. Emerg. Top. Comput.
Kamran Rahmani, Prabhat Mishra
2020 C conf
Hardware-Assisted Malware Detection using Explainable Machine Learning.
ICCD
Zhixin Pan, Jennifer Sheldon, Prabhat Mishra
2020 A conf
Lightweight Anonymous Routing in NoC based SoCs.
DATE
Subodha Charles, Megan Logan, Prabhat Mishra
2020 — conf
Lightweight and Trust-Aware Routing in NoC-Based SoCs.
ISVLSI
Subodha Charles, Prabhat Mishra
2020 J jnl
Real-Time Detection and Localization of Distributed DoS Attacks in NoC-Based SoCs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Subodha Charles, Yangdi Lyu, Prabhat Mishra
2020 J jnl
Reconfigurable Network-on-Chip Security Architecture.
ACM Trans. Design Autom. Electr. Syst.
Subodha Charles, Prabhat Mishra
2020 — conf
SECTAR: Secure NoC using Trojan Aware Routing.
NOCS
Manju Rajan, Abhijit Das, John Jose, Prabhat Mishra
2020 — conf
Securing Network-on-Chip Using Incremental Cryptography.
ISVLSI
Subodha Charles, Prabhat Mishra
2020 C conf
Special Session: Impact of Noise on Quantum Algorithms in Noisy Intermediate-Scale Quantum Systems.
ICCD
Daniel Volya, Prabhat Mishra
2020 J jnl
System-on-Chip Security Assertions.
CoRR
Yangdi Lyu, Prabhat Mishra
2020 A conf
Test Generation using Reinforcement Learning for Delay-based Side-Channel Analysis.
ICCAD
Zhixin Pan, Jennifer Sheldon, Prabhat Mishra
2020 — conf
Vulnerability-aware Dynamic Reconfiguration of Partially Protected Caches.
ISQED
Yuanwen Huang, Prabhat Mishra
2019 A conf
Automated Activation of Multiple Targets in RTL Models using Concolic Testing.
DATE
Yangdi Lyu, Alif Ahmed, Prabhat Mishra
2019 J jnl
Automated Test Generation for Debugging Multiple Bugs in Arithmetic Circuits.
IEEE Trans. Computers
Farimah Farahmandi, Prabhat Mishra
2019 J jnl
Cache Reconfiguration Using Machine Learning for Vulnerability-aware Energy Optimization.
ACM Trans. Embed. Comput. Syst.
Alif Ahmed, Yuanwen Huang, Prabhat Mishra
2019 J jnl
Directed Test Generation for Validation of Cache Coherence Protocols.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yangdi Lyu, Xiaoke Qin, Mingsong Chen, Prabhat Mishra
2019 J jnl
Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory.
IEEE Trans. Very Large Scale Integr. Syst.
Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho, Rolf Drechsler, Ibrahim Abe M. Elfadel, Ruonan Han, Masanori Hashimoto, Chun-Huat Heng, Deukhyoun Heo, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Ajay Joshi, Rajiv V. Joshi, Tanay Karnik, Chulwoo Kim, Tony Tae-Hyoung Kim, Jaydeep P. Kulkarni, Volkan Kursun, Yoonmyung Lee, Hai Helen Li, Huawei Li, Prabhat Mishra, Baker Mohammad, Mehran Mozaffari Kermani, Makoto Nagata, Koji Nii, Partha Pratim Pande, Bipul C. Paul, Vasilis F. Pavlidis, José Pineda de Gyvez, Ioannis Savidis, Patrick Schaumont, Fabio Sebastiano, Anirban Sengupta, Mingoo Seok, Mircea R. Stan, Mark Tehranipoor, Aida Todri-Sanial, Marian Verhelst, Valerio Vignoli, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Jun Zhou, Mark Zwolinski, Stacey Weber
2019 J jnl
Efficient Cache Reconfiguration Using Machine Learning in NoC-Based Many-Core CMPs.
ACM Trans. Design Autom. Electr. Syst.
Subodha Charles, Alif Ahmed, Ümit Y. Ogras, Prabhat Mishra
2019 A conf
Efficient Test Generation for Trojan Detection using Side Channel Analysis.
DATE
Yangdi Lyu, Prabhat Mishra
2019 J jnl
Guest Editorial: Special Section on Autonomous Intelligence for Security and Privacy Analytics.
IEEE Trans. Very Large Scale Integr. Syst.
Prabhat Mishra, Debdeep Mukhopadhyay, Swarup Bhunia
2019 A conf
Real-time Detection and Localization of DoS Attacks in NoC based SoCs.
DATE
Subodha Charles, Yangdi Lyu, Prabhat Mishra
2019 — ch.
Security and Trust Verification of IoT SoCs.
Security and Fault Tolerance in Internet of Things
Alif Ahmed, Farimah Farahmandi, Yousef Iskander, Prabhat Mishra
2019 J jnl
Security-Aware FSM Design Flow for Identifying and Mitigating Vulnerabilities to Fault Attacks.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Adib Nahiyan, Farimah Farahmandi, Prabhat Mishra, Domenic Forte, Mark Tehranipoor
2019 A* conf
The Metric Matters: The Art of Measuring Trust in Electronics.
DAC
Jonathan Cruz, Prabhat Mishra, Swarup Bhunia
2019 J jnl
Vulnerability-Aware Energy Optimization for Reconfigurable Caches in Multitasking Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Yuanwen Huang, Prabhat Mishra
2018 J jnl
A Survey of Side-Channel Attacks on Caches and Countermeasures.
J. Hardw. Syst. Secur.
Yangdi Lyu, Prabhat Mishra
2018 A conf
An automated configurable Trojan insertion framework for dynamic trust benchmarks.
DATE
Jonathan Cruz, Yuanwen Huang, Prabhat Mishra, Swarup Bhunia
2018 A conf
Directed test generation using concolic testing on RTL models.
DATE
Alif Ahmed, Farimah Farahmandi, Prabhat Mishra
2018 — conf
Exploration of Memory and Cluster Modes in Directory-Based Many-Core CMPs.
NOCS
Subodha Charles, Chetan Arvind Patil, Ümit Y. Ogras, Prabhat Mishra
2018 Misc conf
Hardware Trojan Detection Using ATPG and Model Checking.
VLSID
Jonathan Cruz, Farimah Farahmandi, Alif Ahmed, Prabhat Mishra
2018 — conf
Proactive Thermal Management using Memory-based Computing in Multicore Architectures.
IGSC
Subodha Charles, Hadi Hajimiri, Prabhat Mishra
2018 A conf
Scalable Hardware Trojan Activation by Interleaving Concrete Simulation and Symbolic Execution.
ITC
Alif Ahmed, Farimah Farahmandi, Yousef Iskander, Prabhat Mishra
2018 J jnl
Scalable Test Generation for Trojan Detection Using Side Channel Analysis.
IEEE Trans. Inf. Forensics Secur.
Yuanwen Huang, Swarup Bhunia, Prabhat Mishra
2017 C conf
Automated Debugging of Arithmetic Circuits Using Incremental Gröbner Basis Reduction.
ICCD
Farimah Farahmandi, Prabhat Mishra
2017 J jnl
Automatic Code Converter Enhanced PCH Framework for SoC Trust Verification.
IEEE Trans. Very Large Scale Integr. Syst.
Xiaolong Guo, Raj Gautam Dutta, Prabhat Mishra, Yier Jin
2017 A conf
Cost-effective analysis of post-silicon functional coverage events.
DATE
Farimah Farahmandi, Ronny Morad, Avi Ziv, Ziv Nevo, Prabhat Mishra
2017 J jnl
DyPO: Dynamic Pareto-Optimal Configuration Selection for Heterogeneous MpSoCs.
ACM Trans. Embed. Comput. Syst.
Ujjwal Gupta, Chetan Arvind Patil, Ganapati Bhat, Prabhat Mishra, Ümit Y. Ogras
2017 J jnl
Editorial.
IEEE Trans. Very Large Scale Integr. Syst.
Krishnendu Chakrabarty, Massimo Alioto, Bevan M. Baas, Chirn Chye Boon, Meng-Fan Chang, Naehyuck Chang, Yao-Wen Chang, Chip-Hong Chang, Shih-Chieh Chang, Poki Chen, Masud H. Chowdhury, Pasquale Corsonello, Ibrahim Abe M. Elfadel, Said Hamdioui, Masanori Hashimoto, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Rajiv V. Joshi, Tanay Karnik, Mehran Mozaffari Kermani, Chulwoo Kim, Tae-Hyoung Kim, Jaydeep P. Kulkarni, Eren Kursun, Erik Larsson, Hai (Helen) Li, Huawei Li, Patrick P. Mercier, Prabhat Mishra, Makoto Nagata, Arun S. Natarajan, Koji Nii, Partha Pratim Pande, Ioannis Savidis, Mingoo Seok, Sheldon X.-D. Tan, Mark Tehranipoor, Aida Todri-Sanial, Miroslav N. Velev, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Stacey Weber Jackson
2017 C conf
FSM Anomaly Detection Using Formal Analysis.
ICCD
Farimah Farahmandi, Prabhat Mishra
2017 J jnl
Post-Silicon Validation in the SoC Era: A Tutorial Introduction.
IEEE Des. Test
Prabhat Mishra, Ronny Morad, Avi Ziv, Sandip Ray
2017 J jnl
Postsilicon Trace Signal Selection Using Machine Learning Techniques.
IEEE Trans. Very Large Scale Integr. Syst.
Kamran Rahmani, Sandip Ray, Prabhat Mishra
2017 C conf
QUEBS: Qualifying Event Based Search in Concolic Testing for Validation of RTL Models.
ICCD
Alif Ahmed, Prabhat Mishra
2017 J jnl
Trace Buffer Attack on the AES Cipher.
J. Hardw. Syst. Secur.
Yuanwen Huang, Prabhat Mishra
2017 — conf
Trojan localization using symbolic algebra.
ASP-DAC
Farimah Farahmandi, Yuanwen Huang, Prabhat Mishra
2017 C conf
Vulnerability-Aware Energy Optimization Using Reconfigurable Caches in Multicore Systems.
ICCD
Yuanwen Huang, Prabhat Mishra
2016 A conf
Automated test generation for Debugging arithmetic circuits.
DATE
Farimah Farahmandi, Prabhat Mishra
2016 — conf
Automatic RTL-to-Formal Code Converter for IP Security Formal Verification.
MTV
Xiaolong Guo, Raj Gautam Dutta, Prabhat Mishra, Yier Jin
2016 J jnl
Efficient Resource Constrained Scheduling Using Parallel Structure-Aware Pruning Techniques.
IEEE Trans. Computers
Mingsong Chen, Xinqian Zhang, Geguang Pu, Xin Fu, Prabhat Mishra
2016 J jnl
Efficient Selection of Trace and Scan Signals for Post-Silicon Debug.
IEEE Trans. Very Large Scale Integr. Syst.
Kamran Rahmani, Sudhi Proch, Prabhat Mishra
2016 A conf
Exploiting transaction level models for observability-aware post-silicon test generation.
DATE
Farimah Farahmandi, Prabhat Mishra, Sandip Ray
2016 A* conf
MERS: Statistical Test Generation for Side-Channel Analysis based Trojan Detection.
CCS
Yuanwen Huang, Swarup Bhunia, Prabhat Mishra
2016 — conf
Reliability and energy-aware cache reconfiguration for embedded systems.
ISQED
Yuanwen Huang, Prabhat Mishra
2016 — conf
Scalable SoC trust verification using integrated theorem proving and model checking.
HOST
Xiaolong Guo, Raj Gautam Dutta, Prabhat Mishra, Yier Jin
2016 Misc conf
Test Generation for Hybrid Systems Using Clustering and Learning Techniques.
VLSID
Sudhi Proch, Prabhat Mishra
2015 Misc conf
Efficient Peak Power Estimation Using Probabilistic Cost-Benefit Analysis.
VLSID
Hadi Hajimiri, Kamran Rahmani, Prabhat Mishra
2015 A* conf
Pre-silicon security verification and validation: a formal perspective.
DAC
Xiaolong Guo, Raj Gautam Dutta, Yier Jin, Farimah Farahmandi, Prabhat Mishra
2015 C conf
Trace Buffer Attack: Security versus observability study in post-silicon debug.
VLSI-SoC
Yuanwen Huang, Anupam Chattopadhyay, Prabhat Mishra
2015 Misc conf
Tutorial T2: Validation and Debug of Security and Trust Issues in Embedded Systems.
VLSID
Prabhat Mishra, Swarup Bhunia, Srivaths Ravi
2015 A conf
Variation-aware evaluation of MPSoC task allocation and scheduling strategies using statistical model checking.
DATE
Mingsong Chen, Daian Yue, Xiaoke Qin, Xin Fu, Prabhat Mishra
2014 — conf
Directed test generation for hybrid systems.
ISQED
Sudhi Proch, Prabhat Mishra
2014 — conf
Efficient trace signal selection using augmentation and ILP techniques.
ISQED
Kamran Rahmani, Prabhat Mishra, Sandip Ray
2014 — conf
Layout-Aware Selection of Trace Signals for Post-Silicon Debug.
ISVLSI
Prateek Thakyal, Prabhat Mishra
2014 — conf
Layout-aware signal selection in reconfigurable architectures.
VDAT
Prateek Thakyal, Prabhat Mishra
2014 J jnl
Learning-oriented Property Decomposition for Automated Generation of Directed Tests.
J. Electron. Test.
Mingsong Chen, Xiaoke Qin, Prabhat Mishra
2014 Misc conf
Scalable Test Generation by Interleaving Concrete and Symbolic Execution.
VLSID
Xiaoke Qin, Prabhat Mishra
2014 Misc conf
TECS: Temperature- and Energy-Constrained Scheduling for Multicore Systems.
VLSID
Xiaoke Qin, Prabhat Mishra
2013 Misc conf
Assertion-Based Functional Consistency Checking between TLM and RTL Models.
VLSI Design
Mingsong Chen, Prabhat Mishra
2013 J jnl
Bitmask aware compression of NISC control words.
Integr.
Kanad Basu, Chetan Murthy, Prabhat Mishra
2013 — conf
Branch-and-bound style resource constrained scheduling using efficient structure-aware pruning.
ISVLSI
Mingsong Chen, Saijie Huang, Geguang Pu, Prabhat Mishra
2013 — conf
Content-aware encoding for improving energy efficiency in multi-level cell resistive random access memory.
NANOARCH
Hadi Hajimiri, Prabhat Mishra, Swarup Bhunia, Branden Long, Yibo Li, Rashmi Jha
2013 Misc conf
Dynamic Cache Tuning for Efficient Memory Based Computing in Multicore Architectures.
VLSI Design
Hadi Hajimiri, Prabhat Mishra, Swarup Bhunia
2013 — conf
Dynamic Selection of Trace Signals for Post-Silicon Debug.
MTV
Kanad Basu, Prabhat Mishra, Priyadarsan Patra, Amir Nahir, Allon Adir
2013 Misc conf
Efficient Signal Selection Using Fine-grained Combination of Scan and Trace Buffers.
VLSI Design
Kamran Rahmani, Prabhat Mishra
2013 Misc conf
Observability-aware Directed Test Generation for Soft Errors and Crosstalk Faults.
VLSI Design
Kanad Basu, Prabhat Mishra, Priyadarsan Patra
2013 — conf
Proactive thermal management using memory based computing.
NANOARCH
Hadi Hajimiri, Mimonah Al Qathrady, Prabhat Mishra
2013 J jnl
RATS: Restoration-Aware Trace Signal Selection for Post-Silicon Validation.
IEEE Trans. Very Large Scale Integr. Syst.
Kanad Basu, Prabhat Mishra
2013 C conf
Scalable trace signal selection using machine learning.
ICCD
Kamran Rahmani, Prabhat Mishra, Sandip Ray
2013 Misc conf
Tutorial T10: Post - Silicon Validation, Debug and Diagnosis.
VLSI Design
Prabhat Mishra, Masahiro Fujita, Virendra Singh, Nagesh Tamarapalli, Sharad Kumar, Rajesh Mittal
2012 A conf
Automated generation of directed tests for transition coverage in cache coherence protocols.
DATE
Xiaoke Qin, Prabhat Mishra
2012 J jnl
Automatic RTL Test Generation from SystemC TLM Specifications.
ACM Trans. Embed. Comput. Syst.
Mingsong Chen, Prabhat Mishra, Dhrubajyoti Kalita
2012 J jnl
Compression-aware dynamic cache reconfiguration for embedded systems.
Sustain. Comput. Informatics Syst.
Hadi Hajimiri, Kamran Rahmani, Prabhat Mishra
2012 — conf
Constrained signal selection for post-silicon validation.
HLDVT
Kanad Basu, Prabhat Mishra, Priyadarsan Patra
2012 J jnl
Directed test generation for validation of multicore architectures.
ACM Trans. Design Autom. Electr. Syst.
Xiaoke Qin, Prabhat Mishra
2012 J jnl
Dynamic Cache Reconfiguration for Soft Real-Time Systems.
ACM Trans. Embed. Comput. Syst.
Weixun Wang, Prabhat Mishra, Ann Gordon-Ross
2012 — ch.
Energy-Aware Scheduling and Dynamic Reconfiguration in Real-Time Systems.
Handbook of Energy-Aware and Green Computing
Weixun Wang, Xiaoke Qin, Prabhat Mishra
2012 J jnl
Energy-aware dynamic slack allocation for real-time multitasking systems.
Sustain. Comput. Informatics Syst.
Weixun Wang, Sanjay Ranka, Prabhat Mishra
2012 Misc conf
Intra-Task Dynamic Cache Reconfiguration.
VLSI Design
Hadi Hajimiri, Prabhat Mishra
2012 — conf
Memory-based computing for performance and energy improvement in multicore architectures.
ACM Great Lakes Symposium on VLSI
Kamran Rahmani, Prabhat Mishra, Swarup Bhunia
2012 — conf
Synergistic integration of code encryption and compression in embedded systems.
ACM Great Lakes Symposium on VLSI
Kamran Rahmani, Hadi Hajimiri, Kartik Shrivastava, Prabhat Mishra
2012 J jnl
System-Wide Leakage-Aware Energy Minimization Using Dynamic Voltage Scaling and Cache Reconfiguration in Multitasking Systems.
IEEE Trans. Very Large Scale Integr. Syst.
Weixun Wang, Prabhat Mishra
2012 J jnl
TCEC: Temperature and Energy-Constrained Scheduling in Real-Time Multitasking Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xiaoke Qin, Weixun Wang, Prabhat Mishra
2012 Misc conf
Temperature-aware Task Partitioning for Real-Time Scheduling in Embedded Systems.
VLSI Design
Zhe Wang, Sanjay Ranka, Prabhat Mishra
2011 J jnl
A Brief History of Multiprocessors and EDA.
IEEE Des. Test Comput.
Sandeep K. Shukla, Prabhat Mishra, Zeljko Zilic
2011 Misc conf
A General Algorithm for Energy-Aware Dynamic Reconfiguration in Multitasking Systems.
VLSI Design
Weixun Wang, Sanjay Ranka, Prabhat Mishra
2011 J jnl
Challenges of Rapidly Emerging Consumer Space Multiprocessors.
IEEE Des. Test Comput.
Zeljko Zilic, Prabhat Mishra, Sandeep K. Shukla
2011 A conf
Decision ordering based property decomposition for functional test generation.
DATE
Mingsong Chen, Prabhat Mishra
2011 J jnl
Decoding-Aware Compression of FPGA Bitstreams.
IEEE Trans. Very Large Scale Integr. Syst.
Xiaoke Qin, Chetan Muthry, Prabhat Mishra
2011 Misc conf
Dual Code Compression for Embedded Systems.
VLSI Design
Kartik Shrivastava, Prabhat Mishra
2011 J jnl
Dynamic Reconfiguration of Two-Level Cache Hierarchy in Real-Time Embedded Systems.
J. Low Power Electron.
Weixun Wang, Prabhat Mishra
2011 A* conf
Dynamic cache reconfiguration and partitioning for energy optimization in real-time multi-core systems.
DAC
Weixun Wang, Prabhat Mishra, Sanjay Ranka
2011 Misc conf
Efficient Trace Signal Selection for Post Silicon Validation and Debug.
VLSI Design
Kanad Basu, Prabhat Mishra
2011 A conf
Efficient combination of trace and scan signals for post silicon validation and debug.
ITC
Kanad Basu, Prabhat Mishra, Priyadarsan Patra
2011 — conf
Efficient directed test generation for validation of multicore architectures.
ISQED
Xiaoke Qin, Prabhat Mishra
2011 Misc conf
Efficient trace data compression using statically selected dictionary.
VTS
Kanad Basu, Prabhat Mishra
2011 J jnl
Energy-aware dynamic reconfiguration algorithms for real-time multitasking systems.
Sustain. Comput. Informatics Syst.
Weixun Wang, Sanjay Ranka, Prabhat Mishra
2011 J jnl
Guest Editors' Introduction: Multicore SoC Validation with Transaction-Level Models.
IEEE Des. Test Comput.
Prabhat Mishra, Zeljko Zilic, Sandeep K. Shukla
2011 J jnl
Property Learning Techniques for Efficient Generation of Directed Tests.
IEEE Trans. Computers
Mingsong Chen, Prabhat Mishra
2011 — conf
Synergistic integration of dynamic cache reconfiguration and code compression in embedded systems.
IGCC
Hadi Hajimiri, Kamran Rahmani, Prabhat Mishra
2010 — ed.
Contemporary Computing - Third International Conference, IC3 2010, Noida, India, August 9-11, 2010, Proceedings, Part II
IC3 (2)
Sanjay Ranka, Arunava Banerjee, Kanad Kishore Biswas, Sumeet Dua, Prabhat Mishra, Rajat Moona, Sheung-Hung Poon, Cho-Li Wang
2010 — ed.
Contemporary Computing - Third International Conference, IC3 2010, Noida, India, August 9-11, 2010. Proceedings, Part I
IC3 (1)
Sanjay Ranka, Arunava Banerjee, Kanad Kishore Biswas, Sumeet Dua, Prabhat Mishra, Rajat Moona, Sheung-Hung Poon, Cho-Li Wang
2010 A conf
Efficient decision ordering techniques for SAT-based test generation.
DATE
Mingsong Chen, Xiaoke Qin, Prabhat Mishra
2010 J jnl
Efficient test case generation for validation of UML activity diagrams.
Des. Autom. Embed. Syst.
Mingsong Chen, Prabhat Mishra, Dhrubajyoti Kalita
2010 J jnl
Functional Test Generation Using Efficient Property Clustering and Learning Techniques.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Mingsong Chen, Prabhat Mishra
2010 J jnl
Guest Editorial.
J. Electron. Test.
Prabhat Mishra
2010 Misc conf
Leakage-Aware Energy Minimization Using Dynamic Voltage Scaling and Cache Reconfiguration in Real-Time Systems.
VLSI Design
Weixun Wang, Prabhat Mishra
2010 A* conf
PreDVS: preemptive dynamic voltage scaling for real-time systems using approximation scheme.
DAC
Weixun Wang, Prabhat Mishra
2010 Misc conf
Synchronized Generation of Directed Tests Using Satisfiability Solving.
VLSI Design
Xiaoke Qin, Mingsong Chen, Prabhat Mishra
2010 A conf
Temperature- and energy-constrained scheduling in multitasking systems: a model checking approach.
ISLPED
Weixun Wang, Xiaoke Qin, Prabhat Mishra
2010 J jnl
Test Data Compression Using Efficient Bitmask and Dictionary Selection Methods.
IEEE Trans. Very Large Scale Integr. Syst.
Kanad Basu, Prabhat Mishra
2009 J jnl
A Universal Placement Technique of Compressed Instructions for Efficient Parallel Decompression.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Xiaoke Qin, Prabhat Mishra
2009 — conf
Bitmask-based control word compression for NISC architectures.
ACM Great Lakes Symposium on VLSI
Chetan Murthy, Prabhat Mishra
2009 — conf
Chairs' welcome message.
HLDVT
Priyank Kalla, Prabhat Mishra
2009 — conf
Dynamic Reconfiguration of Two-Level Caches in Soft Real-Time Embedded Systems.
ISVLSI
Weixun Wang, Prabhat Mishra
2009 Misc conf
Efficient Placement of Compressed Code for Parallel Decompression.
VLSI Design
Xiaoke Qin, Prabhat Mishra
2009 Misc conf
Efficient Techniques for Directed Test Generation Using Incremental Satisfiability.
VLSI Design
Prabhat Mishra, Mingsong Chen
2009 J jnl
Functional test generation using design and property decomposition techniques.
ACM Trans. Embed. Comput. Syst.
Heon-Mo Koo, Prabhat Mishra
2009 A* conf
Generating test programs to cover pipeline interactions.
DAC
Thanh Nga Dang, Abhik Roychoudhury, Tulika Mitra, Prabhat Mishra
2009 J jnl
Guest Editor Introduction: Special Issue on Nano/Bio-Inspired Applications and Architectures.
Int. J. Parallel Program.
Prabhat Mishra
2009 J jnl
Hybrid-compiled simulation: An efficient technique for instruction-set architecture simulation.
ACM Trans. Embed. Comput. Syst.
Mehrdad Reshadi, Prabhat Mishra, Nikil D. Dutt
2009 — conf
Lossless Compression Using Efficient Encoding of Bitmasks.
ISVLSI
Chetan Murthy, Prabhat Mishra
2009 Misc conf
SACR: Scheduling-Aware Cache Reconfiguration for Real-Time Embedded Systems.
VLSI Design
Weixun Wang, Prabhat Mishra, Ann Gordon-Ross
2008 — conf
A novel test-data compression technique using application-aware bitmask and dictionary selection methods.
ACM Great Lakes Symposium on VLSI
Kanad Basu, Prabhat Mishra
2008 J jnl
Bitmask-Based Code Compression for Embedded Systems.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Seok-Won Seong, Prabhat Mishra
2008 — conf
Coverage-driven automatic test generation for uml activity diagrams.
ACM Great Lakes Symposium on VLSI
Mingsong Chen, Prabhat Mishra, Dhrubajyoti Kalita
2008 Misc conf
Specification-based compaction of directed tests for functional validation of pipelined processors.
CODES+ISSS
Heon-Mo Koo, Prabhat Mishra
2008 J jnl
Specification-driven directed test generation for validation of pipelined processors.
ACM Trans. Design Autom. Electr. Syst.
Prabhat Mishra, Nikil D. Dutt
2007 — conf
A Retargetable Software Timing Analyzer Using Architecture Description Language.
ASP-DAC
Xianfeng Li, Abhik Roychoudhury, Tulika Mitra, Prabhat Mishra, Xu Cheng
2007 A conf
An efficient code compression technique using application-aware bitmask and dictionary selection methods.
DATE
Seok-Won Seong, Prabhat Mishra
2007 — conf
Towards RTL test generation from SystemC TLM specifications.
HLDVT
Mingsong Chen, Prabhat Mishra, Dhrubajyoti Kalita
2006 A conf
A bitmask-based code compression technique for embedded systems.
ICCAD
Seok-Won Seong, Prabhat Mishra
2006 J jnl
A retargetable framework for instruction-set architecture simulation.
ACM Trans. Embed. Comput. Syst.
Mehrdad Reshadi, Nikil D. Dutt, Prabhat Mishra
2006 J jnl
Architecture description language (ADL)-driven software toolkit generation for architectural exploration of programmable SOCs.
ACM Trans. Design Autom. Electr. Syst.
Prabhat Mishra, Aviral Shrivastava, Nikil D. Dutt
2006 — conf
Directed Micro-architectural Test Generation for an Industrial Processor: A Case Study.
MTV
Heon-Mo Koo, Prabhat Mishra, Jayanta Bhadra, Magdy S. Abadir
2006 A conf
Functional test generation using property decompositions for validation of pipelined processors.
DATE
Heon-Mo Koo, Prabhat Mishra
2006 — conf
Test generation using SAT-based bounded model checking for validation of pipelined processors.
ACM Great Lakes Symposium on VLSI
Heon-Mo Koo, Prabhat Mishra
2005 J jnl
A methodology for validation of microprocessors using symbolic simulation.
Int. J. Embed. Syst.
Prabhat Mishra, Nikil D. Dutt, Narayanan Krishnamurthy, Magdy S. Abadir
2005 A conf
Functional Coverage Driven Test Generation for Validation of Pipelined Processors.
DATE
Prabhat Mishra, Nikil D. Dutt
2005 — book
Functional verification of programmable embedded architectures - a top-down approach.
Prabhat Mishra, Nikil D. Dutt
2005 — conf
Language-driven Validation of Pipelined Processors using Satisfiability Solvers.
MTV
Prabhat Mishra, Heon-Mo Koo, Zhuo Huang
2005 Misc conf
Memory access optimizations in instruction-set simulators.
CODES+ISSS
Mehrdad Reshadi, Prabhat Mishra
2004 J jnl
A Top-Down Methodology for Microprocessor Validation.
IEEE Des. Test Comput.
Prabhat Mishra, Nikil D. Dutt, Narayanan Krishnamurthy, Magdy S. Abadir
2004 C conf
Functional Validation of Programmable Architectures.
DSD
Prabhat Mishra, Nikil D. Dutt
2004 — conf
Functional Verification of Pipelined Processors: A Case Study.
MTV
Prabhat Mishra, Nikil D. Dutt, Yaron Kashai
2004 A conf
Graph-Based Functional Test Program Generation for Pipelined Processors.
DATE
Prabhat Mishra, Nikil D. Dutt
2004 J jnl
Modeling and validation of pipeline specifications.
ACM Trans. Embed. Comput. Syst.
Prabhat Mishra, Nikil D. Dutt
2004 J jnl
Processor-memory coexploration using an architecture description language.
ACM Trans. Embed. Comput. Syst.
Prabhat Mishra, Mahesh Mamidipaka, Nikil D. Dutt
2004 Misc conf
Synthesis-driven Exploration of Pipelined Embedded Processors.
VLSI Design
Prabhat Mishra, Arun Kejariwal, Nikil D. Dutt
2003 — conf
A Methodology for Validation of Microprocessors using Equivalence Checking.
MTV
Prabhat Mishra, Nikil D. Dutt
2003 Misc conf
An efficient retargetable framework for instruction-set simulation.
CODES+ISSS
Mehrdad Reshadi, Nikhil Bansal, Prabhat Mishra, Nikil D. Dutt
2003 A* conf
Instruction set compiled simulation: a technique for fast and flexible instruction set simulation.
DAC
Mehrdad Reshadi, Prabhat Mishra, Nikil D. Dutt
2003 C conf
Rapid Exploration of Pipelined Processors through Automatic Generation of Synthesizable RTL Models.
IEEE International Workshop on Rapid System Prototyping
Prabhat Mishra, Arun Kejariwal, Nikil D. Dutt
2003 J jnl
Towards Automatic Validation of Dynamic Behavior in Pipelined Processor Specifications.
Des. Autom. Embed. Syst.
Prabhat Mishra, Nikil D. Dutt, Hiroyuki Tomiyama
2002 — conf
Automatic Modeling and Validation of Pipeline Specifications Driven by an Architecture Description Language.
ASP-DAC/VLSI Design
Prabhat Mishra, Hiroyuki Tomiyama, Ashok Halambi, Peter Grun, Nikil D. Dutt, Alexandru Nicolau
2002 A conf
Automatic Verification of In-Order Execution In Microprocessors with Fragmented Pipelines and Multicycle Functional Units.
DATE
Prabhat Mishra, Nikil D. Dutt, Alexandru Nicolau, Hiroyuki Tomiyama
2002 — conf
Automatic functional test program generation for pipelined processors using model checking.
HLDVT
Prabhat Mishra, Nikil D. Dutt
2002 — conf
Modeling and Verification of Pipelined Embedded Processors in the Presence of Hazards and Exceptions.
DIPES
Prabhat Mishra, Nikil D. Dutt
2001 — conf
Automatic validation of pipeline specifications.
HLDVT
Prabhat Mishra, Nikil D. Dutt, Alex Nicolau
2001 — conf
Functional abstraction driven design space exploration of heterogeneous programmable architectures.
ISSS
Prabhat Mishra, Nikil D. Dutt, Alexandru Nicolau
2001 Misc conf
Processor-Memory Co-Exploration driven by a Memory-Aware Architecture Description Language.
VLSI Design
Prabhat Mishra, Peter Grun, Nikil D. Dutt, Alexandru Nicolau