Poki Chen

33 papers C 1Journal 21Unranked 11
YearRankTypeTitle / Venue / Authors
2024 J jnl
Area Efficient 0.009-mm
IEEE Trans. Very Large Scale Integr. Syst.
Joshua Adiel Wijaya, Poki Chen, Lucky Kumar Pradhan, Ahmad Shahid Bhatti, Seiji Kajihara
2023 J jnl
A 216 × 216 Global-Shutter CMOS Image Sensor With Embedded Analog Memory and Automatic Exposure Control for Under-Display Optical Fingerprint Sensing Applications.
IEEE Trans. Circuits Syst. I Regul. Pap.
Ping-Hung Yin, Chih-Wen Lu, Jia-Shyang Wang, Yuan-Chang Chien, Cheng-Te Chou, Guo-Dung John Su, Poki Chen
2022 J jnl
A 1-ps Bin Size 4.87-ps Resolution FPGA Time-to-Digital Converter Based on Phase Wrapping Sorting and Selection.
IEEE Access
Poki Chen, Joshua Adiel Wijaya, Seiji Kajihara, Trio Adiono, Hsiang-Yu Chen, Ruei-Ting Wang, Yousuke Miyake
2021 — conf
A 1280 x 720 Micro-LED Display Driver with 10-Bit Current-Mode Pulse Width Modulation.
A-SSCC
Pei-Yi Lai Lee, Ya-Wen Yang, Sih-Han Li, Jian-Jhih Sun, Tzu Yi Hung, Chih-Wen Lu, Yen-Hsiang Fang, Wei-Hung Kuo, Li-Chun Huang, Guo-Dung John Su, Poki Chen
2021 J jnl
A 368 × 184 Optical Under-Display Fingerprint Sensor Comprising Hybrid Arrays of Global and Rolling Shutter Pixels With Shared Pixel-Level ADCs.
IEEE J. Solid State Circuits
Ping-Hung Yin, Chih-Wen Lu, Jia-Shyang Wang, Keng-Li Chang, Fu-Kuo Lin, Poki Chen
2021 J jnl
An 18.39 fJ/Conversion-Step 1-MS/s 12-bit SAR ADC With Non-Binary Multiple-LSB-Redundant and Non-Integer-and-Split-Capacitor DAC.
IEEE Access
Hsuan-Lun Kuo, Chih-Wen Lu, Poki Chen
2021 J jnl
Real-Time Semantic Segmentation with Dual Encoder and Self-Attention Mechanism for Autonomous Driving.
Sensors
Yu-Bang Chang, Chieh Tsai, Chang Hong Lin, Poki Chen
2020 J jnl
Design and Implementation of a 256-Bit RISC-V-Based Dynamically Scheduled Very Long Instruction Word on FPGA.
IEEE Access
Nguyen My Qui, Chang Hong Lin, Poki Chen
2020 J jnl
High-Precision PLL Delay Matrix With Overclocking and Double Data Rate for Accurate FPGA Time-to-Digital Converters.
IEEE Trans. Very Large Scale Integr. Syst.
Poki Chen, Jian-Ting Lan, Ruei-Ting Wang, Nguyen My Qui, John Carl Joel Salao Marquez, Seiji Kajihara, Yousuke Miyake
2020 J jnl
Low Flicker Dimmable Multichannel LED Driver With Matrix-Style DPWM and Precise Current Matching.
IEEE Trans. Very Large Scale Integr. Syst.
Poki Chen, Yung-Hsuan Chen, John Carl Joel Salao Marquez, Ruei-Ting Wang, Jiann-Jong Chen, Yuh-Shyan Hwang
2019 J jnl
A 10-bit 1026-Channel Column Driver IC With Partially Segmented Piecewise Linear Digital-to-Analog Converters for UHD TFT-LCDs With One Billion Color Display.
IEEE J. Solid State Circuits
Chih-Wen Lu, Pei-Yi Lai Lee, You-Gang Chang, Xing-Wei Huang, Jhih-Siou Cheng, Po-Yu Tseng, Chih-Hsien Chou, Poki Chen, Tsin-Yuan Chang, Jenny Yi-Chun Liu
2019 J jnl
Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory.
IEEE Trans. Very Large Scale Integr. Syst.
Massimo Alioto, Magdy S. Abadir, Tughrul Arslan, Chirn Chye Boon, Andreas Burg, Chip-Hong Chang, Meng-Fan Chang, Yao-Wen Chang, Poki Chen, Pasquale Corsonello, Paolo Crovetti, Shiro Dosho, Rolf Drechsler, Ibrahim Abe M. Elfadel, Ruonan Han, Masanori Hashimoto, Chun-Huat Heng, Deukhyoun Heo, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Ajay Joshi, Rajiv V. Joshi, Tanay Karnik, Chulwoo Kim, Tony Tae-Hyoung Kim, Jaydeep P. Kulkarni, Volkan Kursun, Yoonmyung Lee, Hai Helen Li, Huawei Li, Prabhat Mishra, Baker Mohammad, Mehran Mozaffari Kermani, Makoto Nagata, Koji Nii, Partha Pratim Pande, Bipul C. Paul, Vasilis F. Pavlidis, José Pineda de Gyvez, Ioannis Savidis, Patrick Schaumont, Fabio Sebastiano, Anirban Sengupta, Mingoo Seok, Mircea R. Stan, Mark Tehranipoor, Aida Todri-Sanial, Marian Verhelst, Valerio Vignoli, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Jun Zhou, Mark Zwolinski, Stacey Weber
2019 — conf
On-Chip Test Clock Validation Using A Time-to-Digital Converter in FPGAs.
ITC-Asia
Yousuke Miyake, Seiji Kajihara, Poki Chen
2018 J jnl
Device Array Layout Synthesis With Nonlinear Gradient Compensation for a High-Accuracy Current-Steering DAC.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
Tao-Chun Yu, Shao-Yun Fang, Chia-Ching Chen, Yulong Sun, Poki Chen
2017 J jnl
A 2.5-ps Bin Size and 6.7-ps Resolution FPGA Time-to-Digital Converter Based on Delay Wrapping and Averaging.
IEEE Trans. Very Large Scale Integr. Syst.
Poki Chen, Ya-Yun Hsiao, Yi-Su Chung, Wei Xiang Tsai, Jhih-Min Lin
2017 J jnl
Editorial.
IEEE Trans. Very Large Scale Integr. Syst.
Krishnendu Chakrabarty, Massimo Alioto, Bevan M. Baas, Chirn Chye Boon, Meng-Fan Chang, Naehyuck Chang, Yao-Wen Chang, Chip-Hong Chang, Shih-Chieh Chang, Poki Chen, Masud H. Chowdhury, Pasquale Corsonello, Ibrahim Abe M. Elfadel, Said Hamdioui, Masanori Hashimoto, Tsung-Yi Ho, Houman Homayoun, Yuh-Shyan Hwang, Rajiv V. Joshi, Tanay Karnik, Mehran Mozaffari Kermani, Chulwoo Kim, Tae-Hyoung Kim, Jaydeep P. Kulkarni, Eren Kursun, Erik Larsson, Hai (Helen) Li, Huawei Li, Patrick P. Mercier, Prabhat Mishra, Makoto Nagata, Arun S. Natarajan, Koji Nii, Partha Pratim Pande, Ioannis Savidis, Mingoo Seok, Sheldon X.-D. Tan, Mark Tehranipoor, Aida Todri-Sanial, Miroslav N. Velev, Xiaoqing Wen, Jiang Xu, Wei Zhang, Zhengya Zhang, Stacey Weber Jackson
2015 C conf
A 486k S/s CMOS time-domain smart temperature sensor with -0.85°C/0.78°C voltage-calibrated error.
ISCAS
Poki Chen, Yi-Jiang Hu, Jian-Cheng Liou, Bo-Chang Ren
2015 — conf
A multi-channel high precision current matching LED Driver for intelligent dimming.
ISPACS
Poki Chen, Hsien-Chih Liu, Ya-Wen Yang, Ya-Ying Li, Fajar Budiman
2011 J jnl
All-Digital Time-Domain Smart Temperature Sensor With an Inter-Batch Inaccuracy of -0.7~°C - +0.6~°C After One-Point Calibration.
IEEE Trans. Circuits Syst. I Regul. Pap.
Poki Chen, Shou-Chih Chen, You-Sheng Shen, You-Jyun Peng
2010 J jnl
A Time-Domain SAR Smart Temperature Sensor With Curvature Compensation and a 3σ Inaccuracy of -0.4°C ∼ +0.6°C Over a 0°C to 90°C Range.
IEEE J. Solid State Circuits
Poki Chen, Chun-Chi Chen, Yu-Han Peng, Kai-Ming Wang, Yu-Shin Wang
2010 J jnl
FPGA Vernier Digital-to-Time Converter With 1.58 ps Resolution and 59.3 Minutes Operation Range.
IEEE Trans. Circuits Syst. I Regul. Pap.
Poki Chen, Po-Yu Chen, Juan-Shan Lai, Yi-Jin Chen
2009 J jnl
Switching Schemes for Reducing Capacitor Mismatch Sensitivity of Quasi-Passive Cyclic DAC.
IEEE Trans. Circuits Syst. II Express Briefs
Poki Chen, Ting-Chun Liu
2008 — conf
A FPGA vernier digital-to-time converter with 3.56ps resolution and -0.23∼+0.2LSB inaccuracy.
CICC
Poki Chen, Juan-Shan Lai, Po-Yu Chen
2008 — conf
A time-domain SAR smart temperature sensor with -0.25∼+0.35°C inaccuracy for on-chip monitoring.
ESSCIRC
Poki Chen, Kai-Ming Wang, Yu-Han Peng, Yu-Shin Wang, Chun-Chi Chen
2007 J jnl
A Fully Digital Time-Domain Smart Temperature Sensor Realized With 140 FPGA Logic Elements.
IEEE Trans. Circuits Syst. I Regul. Pap.
Poki Chen, Mon-Chau Shie, Zhi-Yuan Zheng, Zi-Fan Zheng, Chun-Yan Chu
2006 — conf
A Time Domain Mixed-Mode Temperature Sensor with Digital Set-Point Programming.
CICC
Poki Chen, Chun-Chi Chen, Tuo-Kuang Chen, Shi-Wei Chen
2005 — conf
A monolithic vernier-based time-to-digital converter with dual PLLs for self-calibration.
CICC
Poki Chen, Jia-Chi Zheng, Chun-Chi Chen
2005 — conf
A time-to-digital-converter-based CMOS smart temperature sensor.
ISCAS (1)
Chun-Chi Chen, Wen-Fu Lu, Chin-Chung Tsai, Poki Chen
2005 J jnl
A time-to-digital-converter-based CMOS smart temperature sensor.
IEEE J. Solid State Circuits
Poki Chen, Chun-Chi Chen, Chin-Chung Tsai, Wen-Fu Lu
2004 — conf
A wide-range and fast-locking clock synthesizer IP based on delay-locked loop.
ISCAS (1)
Chorng-Sii Hwang, Poki Chen, Hen-Wai Tsao
2003 — conf
A high-resolution and fast-conversion time-to-digital converter.
ISCAS (1)
Chorng-Sii Hwang, Poki Chen, Hen-Wai Tsao
1999 — conf
A cyclic CMOS time-to-digital converter with deep sub-nanosecond resolution.
CICC
Poki Chen, Shen-Iuan Liu
1991 J jnl
An improved transmission protocol for two interfering queues in packet radio networks.
IEEE Trans. Commun.
Poki Chen, Jin-Fu Chang